This work presents a summary of experimental data and theoretical models that characterize the temperature-dependent behavior of key carrier-transport parameters in silicon down to cryogenic temperatures. In extreme environment applications such as space-based electronics, accurate models of carrier recombination, carrier mobility, and incomplete ionization of dopants form a necessary foundation for the development of reliable high-performance devices and circuits. Not only do these models have a wide impact on the simulated DC and AC performance of devices, but they also play a critical role in predicting the behavior of important phenomena such as single event upset in digital logic circuits. With this motivation, an overview is given of SRH recombination theory, addressing in particular the dependence of recombination lifetime on temperature and injection level. Carrier lifetime measurement methods are reviewed, and experiments to study carrier lifetimes in the substrate of a commercial SiGe BiCMOS process are presented. The experimental data is analyzed and leveraged in order to develop calibrated TCAD-relevant models. Similarly, an overview of low-temperature resistivity in silicon is presented. Modeling of resistivity over temperature is discussed, addressing the prevailing theoretical models for both carrier mobility and incomplete ionization of dopants. Experimental measurements of the temperature dependence of resistivity in both p-type and n-type silicon are presented, and calibrated TCAD-relevant models for carrier mobility and incomplete ionization are developed. Finally, the ability to integrate these calibrated models within commercial TCAD software is demonstrated. In addition, applications for these accurate temperature-dependent models are discussed, and future directions are outlined for research into cryogenic modeling of fundamental physical parameters.

<p dir="ltr">Interconnects pose severe performance bottlenecks in advanced technology nodes due to multiple scaling challenges. To understand such problems and explore potential solutions, it is important to develop advanced models. This is particularly relevant for modern interconnects (especially vias) with complex structures with non- trivial current paths. In this dissertation, we develop a comprehensive physics-based interconnect models to capture surface and grain boundary scattering. We further analyze the circuit implications of 2D transition metal dichalcogenide (TMD)-augmented interconnects, which show potential in mitigating some of the scalability concerns of state-of-the-art interconnects. First, we propose a 2D spatially resolved model for surface scattering in rectangular interconnects based on the Fuchs-Sondheimer (FS) theory. The proposed spatially resolved FS (SRFS) model offers both spatial dependence and explicit relation of conductivity to physical parameters. We also couple the SRFS model with grain boundary scattering based on the Mayadas−Shatzkes (MS) theory. The SRFS-MS model is exact for diffusive surface scattering and offers a good approximation for elastic surface scattering. Furthermore, we develop a circuit-compatible version of the SRFS-MS model and show a close match with the physical SRFS-MS model (error < 0.7%). Moreover, we integrate temperature dependency, confirming that surface scattering has a negligible temperature-dependence. Second, we analyze the circuit implications of 2D TMD augmented interconnects and show the effective clock frequency of an AES circuit is boosted by 2%-32%. We also establish that the vertical resistivity of the TMD material must be below 22 kΩ-nm to obtain performance benefits over state-of-the-art interconnects in the worst-case process-temperature corner.</p>