Consumers’ perceptions of their resources in consumption tasks (that is, their abilities and endowments to perform consumption tasks) are many times not accurate. This misjudgement of resources negatively influences their performance in consuming or using products and services. Further, this carries on to influence consumers’ perceived value of products or services. In order to represent this phenomenon, consumer calibration is defined as the agreement between the subjective and objective assessment of consumer resources required in a consumption task. Therefore, it is crucial to discover the role of consumer calibration in the consumption experience. This paper proposes that consumer calibration occurs at two levels: of the task and of the self. Consumer task calibration refers to the extent of error in the task-required resource appraisal, whereas consumer self-calibration is the degree of accuracy in one’s self-perception of abilities. This systematic literature review is conducted to explore the relationships between consumer self and task calibration, on the one hand, and consumer value, on the other hand. After screening 2297 studies, based on their relevance and quality, forty texts in three main academic domains of Marketing, Psychology and Information Systems are selected for analysis and synthesis. The results reveal that subjective and objective assessments of consumer resources and task-required resources influence consumer value through their impact on functional performance and emotional consequences. The findings also suggest that, although a relationship between consumer task and self-calibration exists, their relationship with consumer value and their emotional consequences need further scrutiny. Consequently, a model for the effect of consumer calibration on consumer value is developed, based on the relationships established in the literature reviewed and the interpretation of the findings in the studies reviewed.

Modern cars can be bought with camera systems that watch the road ahead. They can be used for many purposes, one use is to alert the driver when other cars are in the path of collision. If the warning system is to be reliable, the input data must be correct. One input can be the depth image from a stereo camera system; one reason for the depth image to be wrong is if the vergence angle between the cameras are erroneously calibrated. Even if the calibration is accurate from production there's a risk that the vergence changes due to temperature variations when the car is started. This thesis proposes one solution for short-time live calibration of a stereo camera system; where the speedometer data available on the CAN-bus is used as reference. The motion of the car is estimated using visual odometry, which will be affected by any errors in the calibration. The vergence angle is then altered virtually until the estimated speed is equal to the reference speed. The method is analyzed for noise and tested on real data. It is shown that detection of calibration errors down to 0.01 degrees is possible under certain circumstances using the proposed method.

The recent advances in the field of computer vision have brought many of the laboratory algorithms into the realm of industry. However, one problem that still remains open in the field of 3D vision is the problem of noise. The challenging problem of 3D structure recovery from images is highly sensitive to the presence of input data that are contaminated by errors that do not conform to ideal assumptions. Tackling the problem of extreme data, or outliers has led to many robust methods in the field that are able to handle moderate levels of outliers and still provide accurate outputs. However, this problem remains open, especially for higher noise levels and so it has been the goal of this thesis to address the issue of robustness with respect to two central problems in 3D computer vision. The two problems are highly related and they have been presented together within a Structure from Motion (SfM) context. The first, is the problem of robustly estimating the fundamental matrix from images whose correspondences contain high outlier levels. Even though this area has been extensively studied, two algorithms have been proposed that significantly speed up the computation of the fundamental matrix and achieve accurate results in scenarios containing more than 50% outliers. The presented algorithms rely on ideas from the field of robust statistics in order to develop guided sampling techniques that rely on information inferred from residual analysis. The second, problem addressed in this thesis is the robust estimation of camera intrinsic parameters from fundamental matrices, or self-calibration. Self-calibration algorithms are notoriously unreliable for general cases and it is shown that the existing methods are highly sensitive to noise. In spite of this, robustness in self-calibration has received little attention in the literature. Through experimental results, it is shown that it is essential for a real-world self-calibration algorithm to be robust. In order to introduce robustness to the existing methods, three robust algorithms have been proposed that utilize existing constraints for self-calibration from the fundamental matrix. However, the resulting algorithms are less affected by noise than existing algorithms based on these constraints. This is an important milestone since self-calibration offers many possibilities by providing estimates of camera parameters without requiring access to the image acquisition device. The proposed algorithms rely on perturbation theory, guided sampling methods and a robust root finding method for systems of higher order polynomials. By adding robustness to self-calibration it is hoped that this idea is one step closer to being a practical method of camera calibration rather than merely a theoretical possibility.

The recent advances in the field of computer vision have brought many of the laboratory algorithms into the realm of industry. However, one problem that still remains open in the field of 3D vision is the problem of noise. The challenging problem of 3D structure recovery from images is highly sensitive to the presence of input data that are contaminated by errors that do not conform to ideal assumptions. Tackling the problem of extreme data, or outliers has led to many robust methods in the field that are able to handle moderate levels of outliers and still provide accurate outputs. However, this problem remains open, especially for higher noise levels and so it has been the goal of this thesis to address the issue of robustness with respect to two central problems in 3D computer vision. The two problems are highly related and they have been presented together within a Structure from Motion (SfM) context. The first, is the problem of robustly estimating the fundamental matrix from images whose correspondences contain high outlier levels. Even though this area has been extensively studied, two algorithms have been proposed that significantly speed up the computation of the fundamental matrix and achieve accurate results in scenarios containing more than 50% outliers. The presented algorithms rely on ideas from the field of robust statistics in order to develop guided sampling techniques that rely on information inferred from residual analysis. The second, problem addressed in this thesis is the robust estimation of camera intrinsic parameters from fundamental matrices, or self-calibration. Self-calibration algorithms are notoriously unreliable for general cases and it is shown that the existing methods are highly sensitive to noise. In spite of this, robustness in self-calibration has received little attention in the literature. Through experimental results, it is shown that it is essential for a real-world self-calibration algorithm to be robust. In order to introduce robustness to the existing methods, three robust algorithms have been proposed that utilize existing constraints for self-calibration from the fundamental matrix. However, the resulting algorithms are less affected by noise than existing algorithms based on these constraints. This is an important milestone since self-calibration offers many possibilities by providing estimates of camera parameters without requiring access to the image acquisition device. The proposed algorithms rely on perturbation theory, guided sampling methods and a robust root finding method for systems of higher order polynomials. By adding robustness to self-calibration it is hoped that this idea is one step closer to being a practical method of camera calibration rather than merely a theoretical possibility.

京都大学 / 0048 / 新制・課程博士 / 博士(農学) / 甲第17901号 / 農博第2024号 / 新制||農||1017(附属図書館) / 学位論文||H25||N4797(農学部図書室) / 30721 / 京都大学大学院農学研究科地域環境科学専攻 / (主査)教授 近藤 直, 准教授 小川 雄一, 教授 飯田 訓久 / 学位規則第4条第1項該当 / Doctor of Agricultural Science / Kyoto University / DFAM

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La technologie NFC (Near Field Communication) est une nouvelle technique de communication basée sur la technologie RFID (Radio-Fréquence IDentification). La NFC utilise le couplage magnétique entre deux antennes afin de transférer les données et / ou l'énergie entre deux dispositifs électroniques. Elle exploite la fréquence de 13,56 MHz. En raison de la large gamme de dispositifs et d'applications, une définition de la géométrie de l'antenne et de ses paramètres électriques associés est très difficile. En effet, chaque dispositif présente des caractéristiques physiques différentes. En revanche, le circuit intégré (CI) de contrôle NFC est générique et indépendant d'une antenne où d'un dispositif. C'est pourquoi, chaque intégrateur associe le circuit intégré NFC avec une antenne pour chaque dispositif. Or le module de transmission du système NFC nécessite une bonne adaptation de l'antenne à son circuit intégré (IC). Actuellement, cette adaptation est effectuée à la main pour chaque dispositif selon un processus itératif chronophage. En outre, l'adaptation est effectuée une seule fois au moment de la conception du dispositif, quel que soit le mode de communication (lecteur, carte ou peer-to-peer) et à vide c'est-à-dire sans considérer l'influence du dispositif secondaire. Dans ce manuscrit, nous proposons une description détaillée des performances électriques des systèmes NFC. Ensuite un modèle électrique analytique complet et précis de l'antenne NFC est proposé. Enfin, nous développons une nouvelle technique d'adaptation automatique d'impédance afin d'optimiser les performances électriques dans la phase d'émission en termes de transfert d'énergie entre le lecteur et le transpondeur. / Near Field Communication (NFC) is a standardized communication technology derived from Radio Frequency Identification (RFID). NFC uses magnetic induction between two antennas in order to transfer data and/or energy between two electronic devices. NFC operating frequency is 13.56 MHz.Due to the wide range of devices and applications, a predefinition of antenna geometry and corresponding electrical parameters is difficult. In fact, each device shows different antennaphysical characteristics ; On the Other hand, the NFC control integrated circuit (IC) is generic and does not depend on antenna nor a device. Therefore, each integrator associates the NFC IC with a specific antenna for each device. Current NFC transmission modules require the antenna circuitry to be matched with the integrated circuit. Nowadays, the matching is performed manually using a time consuming iterative procedure for each device. Moreover, the matchingcan be done only once at the device design level, regardless of the communication mode (reader, card or peer-to-peer) and regardless of the secondary device influence on the primary antenna characteristics.In this manuscript, we propose a detailed description of the electrical performances of NFC Systems. Then an accurate and complete analytical electrical model of NFC antennas is proposed.Finally, we develop a new technic of automatic adaptation of the matching network in order to optimize the electrical performances in the transmission phase in terms of energy transfer from the reader to the transponder.

Continued improvements of transceiver systems-on-a-chip play a key role in the advancement of mobile telecommunication products as well as wireless systems in biomedical and remote sensing applications. This dissertation addresses the problems of escalating CMOS process variability and system complexity that diminish the reliability and testability of integrated systems, especially relating to the analog and mixed-signal blocks. The proposed design techniques and circuit-level attributes are aligned with current built-in testing and self-calibration trends for integrated transceivers. In this work, the main focus is on enhancing the performances of analog and mixed-signal blocks with digitally adjustable elements as well as with automatic analog tuning circuits, which are experimentally applied to conventional blocks in the receiver path in order to demonstrate the concepts. The use of digitally controllable elements to compensate for variations is exemplified with two circuits. First, a distortion cancellation method for baseband operational transconductance amplifiers is proposed that enables a third-order intermodulation (IM3) improvement of up to 22dB. Fabricated in a 0.13µm CMOS process with 1.2V supply, a transconductance-capacitor lowpass filter with the linearized amplifiers has a measured IM3 below -70dB (with 0.2V peak-to-peak input signal) and 54.5dB dynamic range over its 195MHz bandwidth. The second circuit is a 3-bit two-step quantizer with adjustable reference levels, which was designed and fabricated in 0.18µm CMOS technology as part of a continuous-time SigmaDelta analog-to-digital converter system. With 5mV resolution at a 400MHz sampling frequency, the quantizer's static power dissipation is 24mW and its die area is 0.4mm^2. An alternative to electrical power detectors is introduced by outlining a strategy for built-in testing of analog circuits with on-chip temperature sensors. Comparisons of an amplifier's measurement results at 1GHz with the measured DC voltage output of an on-chip temperature sensor show that the amplifier's power dissipation can be monitored and its 1-dB compression point can be estimated with less than 1dB error. The sensor has a tunable sensitivity up to 200mV/mW, a power detection range measured up to 16mW, and it occupies a die area of 0.012mm^2 in standard 0.18µm CMOS technology. Finally, an analog calibration technique is discussed to lessen the mismatch between transistors in the differential high-frequency signal path of analog CMOS circuits. The proposed methodology involves auxiliary transistors that sense the existing mismatch as part of a feedback loop for error minimization. It was assessed by performing statistical Monte Carlo simulations of a differential amplifier and a double-balanced mixer designed in CMOS technologies.

abstract: Several state of the art, monitoring and control systems, such as DC motor controllers, power line monitoring and protection systems, instrumentation systems and battery monitors require direct digitization of a high voltage input signals. Analog-to-Digital Converters (ADCs) that can digitize high voltage signals require high linearity and low voltage coefficient capacitors. A built in self-calibration and digital-trim algorithm correcting static mismatches in Capacitive Digital-to-Analog Converter (CDAC) used in Successive Approximation Register Analog to Digital Converters (SARADCs) is proposed. The algorithm uses a dynamic error correction (DEC) capacitor to cancel the static errors occurring in each capacitor of the array as the first step upon power-up and eliminates the need for an extra calibration DAC. Self-trimming is performed digitally during normal ADC operation. The algorithm is implemented on a 14-bit high-voltage input range SAR ADC with integrated dynamic error correction capacitors. The IC is fabricated in 0.6-um high voltage compliant CMOS process, accepting up to 24Vpp differential input signal. The proposed approach achieves 73.32 dB Signal to Noise and Distortion Ratio (SNDR) which is an improvement of 12.03 dB after self-calibration at 400 kS/s sampling rate, consuming 90-mW from a +/-15V supply. The calibration circuitry occupies 28% of the capacitor DAC, and consumes less than 15mW during operation. Measurement results shows that this algorithm reduces INL from as high as 7 LSBs down to 1 LSB and it works even in the presence of larger mismatches exceeding 260 LSBs. Similarly, it reduces DNL errors from 10 LSBs down to 1 LSB. The ADC occupies an active area of 9.76 mm2. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2014