Cluster computing has emerged as a common approach for providing more comput- ing and data resources in industry as well as in academia. However, since cluster computer developers have paid more attention to performance and cost e±ciency than to security, numerous security loopholes in cluster servers come to the forefront. Clusters usually rely on ¯rewalls for their security, but the ¯rewalls cannot prevent all security attacks; therefore, cluster systems should be designed to be robust to security attacks intrinsically. In this research, we propose architectural supports for enhancing security of clus- ter systems with marginal performance overhead. This research proceeds in a bottom- up fashion starting from enforcing each cluster component's security to building an integrated secure cluster. First, we propose secure cluster interconnects providing con- ¯dentiality, authentication, and availability. Second, a security accelerating network interface card architecture is proposed to enable low performance overhead encryption and authentication. Third, to enhance security in an individual cluster node, we pro- pose a secure design for shared-memory multiprocessors (SMP) architecture, which is deployed in many clusters. The secure SMP architecture will provide con¯dential communication between processors. This will remove the vulnerability of eavesdrop- ping attacks in a cluster node. Finally, to put all proposed schemes together, we propose a security/performance trade-o® model which can precisely predict performance of an integrated secure cluster.

Vortrag UNIX-Stammtisch 09/96

The biological process known as activated sludge (AS) in conjunction with membrane separation technology for the treatment of wastewater has been employed for over four decades. While, membrane biological reactors (MBR) are now widely employed, the phenomenon of membrane fouling is still the most significant factor leading to performance decline of MBRs. Although much research has been done on the subject of MBR fouling over the past two decades, many questions remain unanswered, and consensus within the scientific community is rare. However, research has led to one system parameter generally being regarded as a contributor to membrane fouling, extracellular polymeric compounds (EPS). EPS, and more specifically, the soluble fraction of EPS known as soluble microbial products (SMP), must be further investigated in order to better understand membrane fouling. The biological activity and performance of the MBR is affected by myriad operational parameters, which in turn affects the SMP generated. A commonly varied operational parameter is, depending on the specific treatment needs of a MBR, the sludge retention time (SRT). This study aims to characterize the SMP in three bench-scale MBRs as the SRT is gradually lowered. By studying how the SMP change as the operation of the system is altered, greater understanding of how SMP are related to fouling can be achieved. At the onset of the study, a steady state was established in the system with a SRT of 20 days. Upon stabilization of a 20 day SRT, the system was gradually transitioned to a five and a half day SRT, in stepwise adjustments. Initially, both the trans-membrane pressure (TMP) and the SMP concentrations were at relatively low values, indicating the presence of minimal amounts of biofilm on the membrane surfaces. As the system was altered and more activated sludge was wasted from the reactors, the SRT inherently decreased. As the lower SRT was transitioned and established, the data from TMP measurements, as well as the results from SMP determination, confirmed the development of increased amounts of biofilm formed. An apparent relationship was observed between the operational condition of a lower SRT and the SMP found in the system.

Concern for the nonphysiologic energy required to actuate medical devices utilizing “smart material” properties of shape memory polymer (SMP) compels a rigorous investigation into the flow and temperature fields surrounding a thermally activated catheter device. Multiple analyses include the theoretical approaches of exact analytical solutions and finite difference modeling combined with the experimental techniques of particle image velocimetry (PIV) and laser-induced fluorescence (LIF). The attained velocities and temperatures related to the convective heat transfer impact the potential for blood or tissue damage caused by intravascular heating. The clinical scenario involving a catheter device receiving heat within an artery is modeled in its simplest form as a cylindrical metal cap on the tip of a hollow glass rod placed inside of a long straight tube of constant cross-sectional area. Using a working fluid with properties comparable to blood, flow rates and energy input is then varied to determine their effects on velocity fields and temperature gradients. Analytical solutions for both the straight tube and concentric annulus demonstrate the two velocity distributions involved, as flow moves past the gap between the catheter and artery wall and then converges downstream to the Poiseuille solution for steady pipe flow of an incompressible fluid. To solve for the transition between the velocity profiles, computational fluid dynamics software simulates a finite volume model identical to the experimental setup used for intravascular heating experiments. PIV and LIF, both experimental techniques making use of similar hardware, determine velocity fields and temperature distributions, respectively, by imaging fluid seeding agents and their particular interaction with the light sheet. The velocity and temperature fields obtained experimentally are matched with the analytical and finite volume analysis through fluid properties, flow rates, and heating rates. Velocities determined during device heating show a small increase in local velocity, due to temperature dependent viscosity effects. When the device is centered in the model, flow patterns constrain the heat flow near the center axis and away from the channel walls. Increasing flow rate consequently decreases temperature rise, as the heat is carried more quickly downstream and away from the heat source. Using multiple analyses, fluid velocity and temperature distributions are first theorized with analytical and finite element methods and then validated through experimental imaging in a physical model.

Les polyuréthanes (PUs) sont utilisés comme adhésifs depuis des décennies, mais l’utilisation d’isocyanates durant leur synthèse les place aujourd’hui dans la visée de nouvelles réglementations. Dans ces travaux, nous décrivons trois technologies alternatives potentielles aux Pus, basés sur la métathèse d’oléfines. La première technologie repose sur la synthèse de polyuréthanes sans isocyanates (NIPUs) à partir de motifs carbonate de vinylène (VC). Des polyoléfines VC2-téléchéliques ont été synthétisées par polymérisation par ouverture de cycle par métathèse / métathèse croisée (ROMP/CM) de cyclooléfines en présence d’un agent de transfert (CTA) de type VC. Cependant, la polyaddition avec une diamine a mis en évidence des reactions secondaires empêchant d’obtenir le matériaux désiré. La seconde technologie considérée est la synthèse de polyamides (PA). Des polyoléfines diazlactone (AZL)2-téléchéliques ont été synthétisées par ROMP/CM en presence d’un CTA de type AZL, puis ouvertes par une diamine. Des PAs ont ainsi été obtenus avec succès, mais en faibles quantités, ne permettant pas d’étudier leurs propriétés mécaniques ou adhésives. La dernière approche utilise les polymères silylés (SMPs). Trois types de SMPs ont été synthétisés par diverses stratégies de métathèse : des polypropylèneglycols (PPGs), des copolymères polycyclooctène (PCOE)/PPG et des copolymères polybutadiène (PBD)/PPG. La polycondensation de ces SMPs par différents systèmes catalytiques a été étudiée, ainsi que les propriétés mécaniques et adhésives des matériaux résultants. Parmi ceux-ci, les copolymères PCOE/PPG SMPs ont démontré de remarquables propriétés mécaniques et adhésives, meilleures que la plupart des SMPs commerciaux d’aujourd’hui. / Polyurethanes (PUs) have been used as adhesives for decades, but the toxic isocyanates needed for their synthesis is now on the scope of regulations. In this work, we describe three potential alternative technologies to classic PUs, based on a powerful polymerization tool: olefin metathesis. The first technology relies on the synthesis of nonisocyanate polyurethanes from vinylene carbonate (VC) functionalities. Telechelic VC polyolefins were synthesized by ring-opening metathesis polymerization/cross-metathesis (ROMP/CM) of cycloolefins with a VC chain-transfer agent (CTA). However, polyaddition attempts with a diamine evidenced side-reactions, preventing the isolation of the expected material The second technology considered is the synthesis of polyamide (PA). Following a similar strategy, telechelic azlactone (AZL) polyolefins were synthesized by ROMP/CM of cycloolefins with an AZL CTA, then, were subsequently opened by a diamine. PA were successfully obtained through this strategy, however in small quantities, thus, no mechanical nor adhesive tests were carried out. The last technology uses silyl modified polymers (SMPs). Three type of SMPs were synthesized, using diverse olefin metathesis strategies : polypropylene (PPG), polycylooctene (PCOE)/PPG copolymers and polybutadiene (PBD)/PPG copolymers. Curing of the trimethoxysilyl or triethoxysilyl groups inside these SMPs was studied using different catalytic systems, as well as the mechanical and adhesive properties of the materials obtained. Among them, PCOE/PPG copolymers displayed remarkable good mechanical and adhesive properties, better than the majority of commercial SMPs available today.

The aim of this master thesis is an analysis of a motivation system in SMP CZ. The first part defines the way of a research and describes used methods. The second part focuses on theoretical knowledge, which is crucial for understanding of motivation. The biggest part is devoted to actual research of a job satisfaction of employees. In this context, possible solutions and perspectives for future development are suggested.

The post secondary educational system has come under increased scrutiny due to rising costs and lower numbers than expected of students graduating with their Bachelor's degrees. Many studies have been conducted to evaluate the effectiveness of student mentoring programs as a viable resource to increase retention and graduation rates. Research on the predictors of academic success has been inconsistent. This current study used archival data from the Office of Institutional Research (IR) database and California State University, San Bernardino Faculty/Student Mentor Program to conduct a matched sample analysis comparing mentored students with non mentored students. Both files were drawn from the same specified period (fall 2003 to fall 2012 academic years) based on a set of control and outcome variables provided with the datasets. Overall, the academic performance of mentored students, based on retention rate, graduation rate, credits completed, and grade point average were similar to that of non mentored students. A logistic regression indicated that at least one variable may be a good predictor of graduation rates (Pre-College Courses). Further research is needed to determine if mentoring, specifically peer mentoring, is an effective resource that supports student success.

Rapid progress in the area of Field-Programmable Gate Arrays (FPGAs) has led to the availability of softcore processors that are simple to use, and can enable the development of a fully working system in minutes. This has lead to the enormous popularity of System-On-Programmable-Chip (SOPC) computing platforms. These softcore processors, while relatively simple compared to their leading-edge hardcore counterparts, are often designed with a number of advanced performance-enhancing features, such as instruction and data caches. Moreover, they are designed to be used in a uniprocessor or uncoupled multiprocessor architecture, and not in a tightly-coupled multiprocessing architecture. As a result, traditional cache-coherency protocols are not suitable for use with such systems. This thesis describes a system for enforcing cache coherency on symmetric multiprocessing (SMP) systems using softcore processors. A hybrid protocol that incorporates hardware and software to enforce cache coherency is presented.

Rapid progress in the area of Field-Programmable Gate Arrays (FPGAs) has led to the availability of softcore processors that are simple to use, and can enable the development of a fully working system in minutes. This has lead to the enormous popularity of System-On-Programmable-Chip (SOPC) computing platforms. These softcore processors, while relatively simple compared to their leading-edge hardcore counterparts, are often designed with a number of advanced performance-enhancing features, such as instruction and data caches. Moreover, they are designed to be used in a uniprocessor or uncoupled multiprocessor architecture, and not in a tightly-coupled multiprocessing architecture. As a result, traditional cache-coherency protocols are not suitable for use with such systems. This thesis describes a system for enforcing cache coherency on symmetric multiprocessing (SMP) systems using softcore processors. A hybrid protocol that incorporates hardware and software to enforce cache coherency is presented.

Writing truly concurrent software is hard, scaling software to fully utilize hardware is one of the reasons why. One abstraction for increasing the scalability of systems software is clustered objects. Clustered objects is a proven method of increasing scalability. This thesis explores a user-level abstraction based on clustered objects which increases hardware utilization without requiring any customization of the underlying system. We detail the design, implementation and testing of Scalable Clustered Objects with Portable Events or (SCOPE), a user-level system inspired by an implementation of the clustered objects model from IBM Research’s K42 operating system. To aid in the portability of the new system, we introduce the idea of a clustered object event, which is responsible for maintaining the runtime environment of the clustered objects. We show that SCOPE can increase scalability on a simple micro benchmark, and provide most of the benefits that the kernel-level implementation provided.