Mémoire numérisé par la Division de la gestion de documents et des archives de l'Université de Montréal.

Mémoire numérisé par la Division de la gestion de documents et des archives de l'Université de Montréal

Este trabalho foca, a passagem da pornografia leve (softcore) de mercadoria artesanal e clandestina a produto indústrial. Essa passagem é parte da implantação da sociedade de consumo e do moderno hedonismo O pôster central da Playboy americana é a imagem mercadoria gráfica mais bem sucedida de todos os tempos, e sua fotografia, codificada, norma social para a luxúria. / This work focuses on the passage of the softcore pornography from a clçandestine commodity to a industrial product . This passage happen as a part of the establishment of the consumer society and of the modern hedonism. Playboys centerfold may be considered the more successfull image commodity of all times and its photography, highly codifyed, is a social norm to lust.

Increasingly, soft processors are being considered for use within FPGA-based reliable computing systems. In an environment in which radiation is a concern, such as space, the logic and routing (configuration memory) of soft processors are sensitive to radiation effects, including single event upsets (SEUs). Thus, effective tools are needed to evaluate and estimate how sensitive the configuration memories of soft processors are in high-radiation environments. A high-speed FPGA fault injection system and methodology were created using the Xilinx Radiation Test Consortium's (XRTC's) Virtex-5 radiation test hardware to conduct exhaustive tests of the SEU sensitivity of a design within an FPGA's configuration memory. This tool was used to show that the sensitivity of the configuration memory of a soft processor depends on several variables, including its microarchitecture, its customizations and features, and the software instructions that are executed. The fault injection experiments described in this thesis were performed on five different soft processors, i.e., MicroBlaze, LEON3, Arm Cortex-M0 DesignStart, OpenRISC 1200, and PicoBlaze. Emphasis was placed on characterizing the sensitivity of the MicroBlaze soft processor and the dependence of the sensitivity on various modifications. Seven benchmarks were executed through the various experiments and used to determine the SEU sensitivity of the soft processor's configuration memory to the instructions that were executed. In this thesis, a wide variety of soft processor fault injection results are presented to show the differences in sensitivity between multiple soft processors and the software they run.

Este trabalho foca, a passagem da pornografia leve (softcore) de mercadoria artesanal e clandestina a produto indústrial. Essa passagem é parte da implantação da sociedade de consumo e do moderno hedonismo O pôster central da Playboy americana é a imagem mercadoria gráfica mais bem sucedida de todos os tempos, e sua fotografia, codificada, norma social para a luxúria. / This work focuses on the passage of the softcore pornography from a clçandestine commodity to a industrial product . This passage happen as a part of the establishment of the consumer society and of the modern hedonism. Playboys centerfold may be considered the more successfull image commodity of all times and its photography, highly codifyed, is a social norm to lust.

Softcore processors are an attractive alternative to using expensive radiation-hardened processors for space-based applications. Since they can be implemented in the latest SRAM-based FPGA technologies, they are fast, flexible and significantly less expensive. However, unlike ASIC-based processors, the logic and routing of a softcore processor are vulnerable to the effects of single-event upsets (SEUs). To protect softcore processors from SEUs, this dissertation explores the processor design-space for the LEON3 softcore processor implemented in a commercial SRAM-based FPGA. The traditional mitigation techniques of triple modular redundancy (TMR) and duplication with compare (DWC) and checkpointing provide reliability to a softcore processor at great spatial cost. To reduce the spatial cost, terrestrial ASIC-based processor protection techniques are applied to the LEON3 processor. These techniques come at the cost of time instead of area. The software fault-tolerance techniques used to protect the logic and routing of the LEON3 softcore processor include a modified version of software implemented fault tolerance (SWIFT), consistency checks, software indications, and checkpointing. To measure the reliability of a mitigated LEON3 softcore processor, an updated hardware fault-injection model is created, and novel reliability metrics are employed. The improvement in reliabilty over an unmitigated LEON3 is measured using four metrics: architectural vulnerability factor (AVF), mean time to failure (MTTF), mean useful instructions to failure (MuITF), and reliability-area-performance (RAP). Traditional reliability techniques provide the best reliability: DWC with checkpointing improves the MTTF and MuITF by almost 35x and TMR with triplicated input and outputs improves the MTTF and MuITF by almost 6000x. Software fault-tolerance provides significant reliability for a much lower area cost. Each of these techniques provides greater processor protection than a popular state-of-the-art rad-hard processor.