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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Vestavěné zařízení na bázi Atmel ARM / Embedded System Based on Atmel ARM

Oravec, Jakub January 2010 (has links)
This master's thesis deals with design of simple embedded system based on Atmel ARM. There are Atmel's products covering this market segment reviewed in the first part, including the description of a couple of devices. The second part is focused on the aim specification, selection of components, their interconnection, power-supply requirements, price considerations and the design itself. The next chapter describes testing and application of the platform. The conclusion presents the current state of the project and deals with the successive progress.
2

Design and Implementation of a SATA Host Controller on a Spartan-6 FPGA

Gonzalez, Maya January 2012 (has links)
At Saab Dynamics AB there are a number of projects where cameras are an important part of a sensor system. Examples of such projects are monitoring for civil security and 3D mapping, where several cameras are used. The cameras can for example be located in airplanes, helicopters or cars and therefore it is important to have a robust function for recording data. One way to achieve a quick recording with sufficient storage size is to use SATA flash disks. To reduce the size and power consumption of the recording equipment and to enable project-specific adaptations it is desirable to use an FPGA as an interface to SATA devices. This thesis concerns the development of such an interface implemented on an FPGA. The theory behind the SATA interconnect standard is described along with the design work and its challenges.
3

Sledování dynamiky růstu a tvorby výnosu ječmene jarního, odrůdy Spartan, při minimálním zpracování půdy a při různém způsobu využití slámy

Maťová, Alena January 1983 (has links)
No description available.
4

Sledování dynamiky růstu a výnosu jarního ječmene odrůdy Spartan při minimálním zpracování půdy a různém způsobu využití slámy

Koloman, Lukács January 1981 (has links)
No description available.
5

Sledování dynamiky růstu a výnosu jarního ječmene odrůdy Spartan při minimálním zpracování půdy a různém způsobu využití slámy

Pavlíková, Zora January 1980 (has links)
No description available.
6

Sledování dynamiky růstu a výnosu ječmene jarního Spartan při minimálním zpracování půdy a různém způsobu využití slámy

Kamrlová, Marcela January 1984 (has links)
No description available.
7

Framework pro vývoj aplikací na platformě ARM / Application Development Framework for the ARM Platform

Buchta, Petr January 2015 (has links)
This master's thesis focuses on designing and implementing a framework that would offer basic program resources for application development on hardware platform FITkit Minerva. First part of this work focuses on designing a data channel between PC and the kit for which the USB interface was used. Next part focuses on implementing a channel between an ARM based microcontroller and FPGA Xilinx Spartan-6. That led to creating a special system inside FPGA that allows adding new HW components that communicate with the microcontroller, which can be used for implementing HW acceleration techniques. Another outcome of this work is a debugging interface that allows to program and debug FPGA using development environment Xilinx ISE without a need of the original Xilinx JTAG adapter. This was achieved by using the XVC protocol that allows to create a custom JTAG adapter that in this case was implemented in the software of the microcontroller.
8

Systém pro zpracování dat z polí paměťových karet / Data system processing for memory card arrays

Janůš, Tomáš January 2016 (has links)
The submitted thesis is concerned with a design of the multiplicator of memory cards. The basic focus of this thesis is the analysis of individual system components and adjustment of the existing arrangement. The analysis describes the existing arrangement of the multiplicator and deals with the potential of individual components. Adjustment of the existing arrangement includes definitions and processes of the individual multiplicator components design to the achievement of optimal performance. Operating of the multiplicator is fully controlled by a PC.
9

Computational Evaluation of Mechanistic Pathways of Action of Superoxide Dismutase

Velishala, Shambhavi January 2012 (has links)
No description available.
10

Modulátor OFDM v obvodu FPGA / OFDM modulator in FPGA chip

Kováč, Michal January 2015 (has links)
The master’s thesis deals with the design of modulator OFDM in the FPGA circuit. The thesis describes basic attributes of modulation OFDM, its pros and cons. With the help of created block level scheme, it describes all the components of the processing of the data signal on its way from the transmitter to the receiver. The Atlys Spartan-6 Development Board has been chosen for the implementation of the modulator. The other part of thesis is the design and realization of the analog-digital interface for the modulator OFDM. The interface consists of PCB, which is connected to the development board using expansion connector. The board is assembled with all the parts required for transmitting the signal as well as consecutive receiving, the description of used solutions is also a part of this master’s thesis. Proper function of both designed parts was verified using hardware co-simulation.

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