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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Design and Implementation of the DDR2 Controller with Data Switching

Shen, Yu-Hsuan 20 August 2009 (has links)
With the increasing demand for multi-media,multi-core system architecture used in parallel processing of large amounts of data to carry out operations,in the past,large amounts of data is transferred through an independent control of DMA,and often have the following shortcomings,(1)As a result of the transmission of data is completed by reading and writing,caused the burden of memory clock singnal,(2)A large number of occupied bandwidth,caused the collision with processor by using the data bus. Based on the above shortcomings, this paper proposed an internal fast data switching mechanism through AMBA instruction by integrating the memory controller and DMA function. With the high transmission clock rate of DDR2, to achieve (1) transfer data by the original memory clock rate between memory and memory, (2) transmission between memory and device can be reached by bridge of the controller. Can significantly reduce not only the System Bus in the workload and provide the purpose of handling large amounts of data, to reduce the transmission of data on the amount of time spent and release of the right to use the Bus to other peripheral devices and to enhance the efficiency of the overall system.We also achieved the interface of SATA bridge in the controller. Through the DDR2 memory buffer to enhance the efficiency of accessing information and to provide strong type on the data buffer mechanism, can effectively reduce the number of solid-state hard disk access, the extension of its work life. According to the simulation results show that the use of traditional DMA transfer mechanism for the rapid exchange of data, compared to provide a minimum bandwidth in DDR2, you can save about 51% of transmission time, in the DDR2 maximum bandwidth available, you can save 87% of transmission time.
2

TRENDS IN COTS STORAGE SOLUTIONS FOR DATA ACQUISITION SYSTEMS

Tsur, Ofer 10 1900 (has links)
ITC/USA 2005 Conference Proceedings / The Forty-First Annual International Telemetering Conference and Technical Exhibition / October 24-27, 2005 / Riviera Hotel & Convention Center, Las Vegas, Nevada / This paper discusses data storage requirements for data acquisition systems, and evaluates the ability of three of the most popular COTS data storage solutions - mechanical disk, ruggedized mechanical disk and solid-state flash disk - to meet these requirements today and in the future. It addresses issues of capacity, data reliability, endurance, form factor, cost and security. It concludes with a discussion of trends to implement high-speed serial interfaces in data acquisition systems, and the challenges that these trends pose for COTS storage solutions.
3

Bridging of SCSI to SATA and Implementationof a SATA Controller using Virtex-5 / Bryggning mellan SCSI och SATA samt implementering av en styrenhet för SATA på en Virtex-5

Landström, Erik January 2009 (has links)
<p>Companies and authorities of today often handle large amount of data, not unusually with a restricted content which should be kept secret from outsiders. One way of accomplish this is to encrypt stored data in real time. For this a hardware solution is ideal since it can be independent, fast enough, and easily added to already existing systems.</p><p>This report is a starting point to achieve this with two of the most common mass storage standards SATA and SCSI in focus. It is based on the task to develop a FPGA based SATA controller and investigate the possibility to ”speak” SCSI with SATA devices.</p><p>The working process has involved theoretical studies, system design, test driven development using simulations and hardware tests and technical investigation.</p><p>The thesis resulted in a SCSI-to-SATA translation investigation pointing out difficulties and presenting a translation model. A SATA host was also implemented in VHDL on a Virtex-5 FPGA that can execute a number of SATA commands on different devices. Simulations performed shows that the total latency reaches one <em>μ</em>s/32 bits in the SATA host and that should not be much of a problem for most applications in a possible bridge solution. </p>
4

Design and Implementation of a SATA Host Controller on a Spartan-6 FPGA

Gonzalez, Maya January 2012 (has links)
At Saab Dynamics AB there are a number of projects where cameras are an important part of a sensor system. Examples of such projects are monitoring for civil security and 3D mapping, where several cameras are used. The cameras can for example be located in airplanes, helicopters or cars and therefore it is important to have a robust function for recording data. One way to achieve a quick recording with sufficient storage size is to use SATA flash disks. To reduce the size and power consumption of the recording equipment and to enable project-specific adaptations it is desirable to use an FPGA as an interface to SATA devices. This thesis concerns the development of such an interface implemented on an FPGA. The theory behind the SATA interconnect standard is described along with the design work and its challenges.
5

'I am Zambia's redeemer' : populism and the rise of Michael Sata, 1955-2011

Sishuwa, Sishuwa January 2016 (has links)
This thesis explores the broad continuities in the strategies that individual leaders in Africa have employed to mobilise political support across different historical periods and party systems, from the late colonial to the post-colonial era, and from single-party to multiparty systems. It examines this question through a historical biography of Michael Sata, a political leader in Zambia whose life and career, like those of several other Zambian individual politicians, cut across the main divides in the country's political history: the late-colonial period (1953-1964), the one-party state (1973-1991) and the era of multiparty democracy (since 1991). Sata's experiences also span a number of political organisations such as the United National Independence Party (from the early 1960s to 1991), the Movement for Multiparty Democracy (1991-2001) and the Patriotic Front (2001-2011). I argue that Sata employed several political strategies such as populism, clientelism, ethnic appeals and coalition building to mobilise support across these historical epochs and party institutions. The existing literature on Zambian political change has largely focused on ethnicity, which has taken attention away from the fact that most ethnic politics has had, as this thesis demonstrates, a populist component. More broadly, what this study demonstrates is the utility of historical biography in understanding political change. Examining the life of an individual whose experiences cut across supposed turning points and disruptions, or the institutions that have come and gone with them, captures not only change but continuities too, which are generally missing in many accounts of political life in Africa, and consequently allows us to gain new and unique insights.
6

Bridging of SCSI to SATA and Implementationof a SATA Controller using Virtex-5 / Bryggning mellan SCSI och SATA samt implementering av en styrenhet för SATA på en Virtex-5

Landström, Erik January 2009 (has links)
Companies and authorities of today often handle large amount of data, not unusually with a restricted content which should be kept secret from outsiders. One way of accomplish this is to encrypt stored data in real time. For this a hardware solution is ideal since it can be independent, fast enough, and easily added to already existing systems. This report is a starting point to achieve this with two of the most common mass storage standards SATA and SCSI in focus. It is based on the task to develop a FPGA based SATA controller and investigate the possibility to ”speak” SCSI with SATA devices. The working process has involved theoretical studies, system design, test driven development using simulations and hardware tests and technical investigation. The thesis resulted in a SCSI-to-SATA translation investigation pointing out difficulties and presenting a translation model. A SATA host was also implemented in VHDL on a Virtex-5 FPGA that can execute a number of SATA commands on different devices. Simulations performed shows that the total latency reaches one μs/32 bits in the SATA host and that should not be much of a problem for most applications in a possible bridge solution.
7

Telemetry Recorders and Disruptive Technologies

Kortick, David 10 1900 (has links)
ITC/USA 2009 Conference Proceedings / The Forty-Fifth Annual International Telemetering Conference and Technical Exhibition / October 26-29, 2009 / Riviera Hotel & Convention Center, Las Vegas, Nevada / Telemetry data recorders are not immune to the effects that a number of disruptive technologies have had on the telemetry industry. Data recorder designs today make use of data buses, storage types and graphical user interfaces that are constantly evolving based on the advances of personal computer and consumer electronics technologies. Many of these recorders use embedded designs that integrate disruptive technologies such as PCI Express for realtime data and signal processing, SATA interfaces for data storage and touchscreen technologies to provide an intuitive operator interface. Solid state drives also play a larger role in the latest recorder designs. This paper will explore the effects of these technologies on the latest telemetry recorders in terms of the benefits to the users, cost of implementation, obsolescence management, and integration considerations. The implications of early adoption of disruptive technologies will also be reviewed.
8

Implementace rychlých sériových sběrnic v obvodech FPGA / Implementation of fast serial bus on FPGA

Drbal, Jakub January 2014 (has links)
This diploma thesis deals with implementation of fast serial bus and SATA controler in the FPGA chip. The work is divided into two parts. In the first part the circuit for communication between the FPGAs is designed and in the second part the circuit for direct connection of SATA hard disk to a gate array is created. The circuit for communication between the FPGA is designed according to SATA specification. Link layer and physical layers are implemented in VHDL with programmable logic resources.
9

Sata Ineko and Hirabayashi Taiko: The Café and Jokyû as a Stage for Social Criticism / Café and Jokyû as a Stage for Social Criticism

Kusakabe, Madoka 09 1900 (has links)
xii, 251 p. / Sedimentations of transformations and experiences empowered the 20th century writers Sata Ineko and Hirabayashi Taiko as writers. Because of their mutual belief in the early principles of the proletarian literary movement--writing the reality of the working class from their perspectives--both produced works centered on daily life. In not only delineating but also examining the daily occurrences, their stories and critiques acutely exposed the issues, the conditions, and the exploitation of the working class under capitalism, particularly the unfair and unreasonable treatment of women and women workers under the patriarchal slogan "Good Wives and Wise Mothers" and the discrimination of women workers and writers even within the proletarian movement. The café proved the best site for both to offer keen analyses. Materializing the actual working experiences of jokyû (café waitresses), they exposed the superficiality of Japanese modernity in the 1920s and 30s, the suppression and oppression of women under patriarchy, commodification and exploitation of working women under capitalism, and the ultimate consequences--social myopia and deterioration of human life. While the café was for jokyû a site of exploration and challenge by overturning the dominant power hierarchy practiced in society, for Sata and Hirabayashi, writing about the café challenged the prejudice and confinement of existing categorizations such as "women," "women workers," " jokyû ," "women writers," and "proletarian writers." Both Sata and Hirabayashi treated the café and jokyû as realistic and multifaceted. To strengthen this realism, both writers relied on their own corporeal experiences and sensations, supporting honest illustrations of power dynamics and the dual-system oppression of women at play within and beyond the café environment. Both acknowledged the body as a site of complication and possibility. Through their acknowledgments beyond the surface inscriptions that restrict and limit who and what lies within, both Sata and Hirabayashi contended that the body was an interactive and potentially productive catalyst for change. For them, the corporeal experience proved more effective for gaining consciousness, obtaining class-consciousness, and eventually achieving ideological resolution than through doctrinal readings and teachings. / Committee in charge: Stephen Kohl, Chairperson; Alisa Freedman, Member; Tze-Lan Sang, Member; Jeffrey Hanes, Outside Member
10

Design of an Open-Source Sata Core for Virtex-4 FPGAs

Gorman, Cory 01 January 2013 (has links) (PDF)
Many hard drives manufactured today use the Serial ATA (SATA) protocol to communicate with the host machine, typically a PC. SATA is a much faster and much more robust protocol than its predecessor, ATA (also referred to as Parallel ATA or IDE). Many hardware designs, including those using Field-Programmable Gate Arrays (FPGAs), have a need for a long-term storage solution, and a hard drive would be ideal. One such design is the high-speed Data Acquisition System (DAS) created for the NASA Surface Water and Ocean Topography mission. This system utilizes a Xilinx Virtex-4 FPGA. Although the DAS includes a SATA connector for interfacing with a disk, a SATA core is needed to implement the protocol for disk operations. In this work, an open-source SATA core for Virtex-4 FPGAs has been created. SATA cores for Virtex-5 and Virtex-6 devices were already available, but they are not compatible with the different serial transceivers in the Virtex-4. The core can interface with disks at SATA I or SATA II speeds, and has been shown working at rates up to 180MB/s. It has been successfully integrated into the hardware design of the DAS board so that radar samples can be stored on the disk.

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