Thesis (Ph. D.)--West Virginia University, 2000. / Title from document title page. Document formatted into pages; contains ix, 185 p. : ill. Includes abstract. Includes bibliographical references (p. 87-91).

Thesis (M.S.)--Brigham Young University. Dept. of Electrical and Computer Engineering, 2005. / Includes bibliographical references (p. 105-108).

Thesis (M.S.E.C.E. )--University of Massachusetts Amherst, 2008. / Includes bibliographical references (p. 84-88).

Este trabalho apresenta condições suficientes para garantir a estabilidade em probabilidade para um sistema com histereses, modelado pelas equações de Bouc-Wen, mediante um controlador proporcional integral sujeito a falhas aleatórias. Quando ocorre uma falha de forma aleatória na linha transmissão, o sistema desliga o controlador e fica assim por um tempo. Após esse tempo, o sistema liga novamente o controle e permanece ativo até a próxima falha que ocorre de forma aleatória. As falhas ocorrem de acordo com o processo de distribuição de Poisson. Uma aplicação real considerando o controle de velocidade de um motor DC é apresentado. / This note presents conditions to assure the stability in probability for a hysteresis Bouc-Wen model controlled by a proportional-integral controller subject to random failures in the transmission line. When a failure happens, the controller turns off and remains off for a while. After that, the controller turns on and keeps working until the occurrence of the next failure. The failures occur according to a Poisson distributed process. A numerical example illustrates the result. A real application considering the speed control of a DC motor is presented.

Este trabalho apresenta condições suficientes para garantir a estabilidade em probabilidade para um sistema com histereses, modelado pelas equações de Bouc-Wen, mediante um controlador proporcional integral sujeito a falhas aleatórias. Quando ocorre uma falha de forma aleatória na linha transmissão, o sistema desliga o controlador e fica assim por um tempo. Após esse tempo, o sistema liga novamente o controle e permanece ativo até a próxima falha que ocorre de forma aleatória. As falhas ocorrem de acordo com o processo de distribuição de Poisson. Uma aplicação real considerando o controle de velocidade de um motor DC é apresentado. / This note presents conditions to assure the stability in probability for a hysteresis Bouc-Wen model controlled by a proportional-integral controller subject to random failures in the transmission line. When a failure happens, the controller turns off and remains off for a while. After that, the controller turns on and keeps working until the occurrence of the next failure. The failures occur according to a Poisson distributed process. A numerical example illustrates the result. A real application considering the speed control of a DC motor is presented.

abstract: Lignocellulosic biomass represents a renewable domestic feedstock that can support large-scale biochemical production processes for fuels and specialty chemicals. However, cost-effective conversion of lignocellulosic sugars into valuable chemicals by microorganisms still remains a challenge. Biomass recalcitrance to saccharification, microbial substrate utilization, bioproduct titer toxicity, and toxic chemicals associated with chemical pretreatments are at the center of the bottlenecks limiting further commercialization of lignocellulose conversion. Genetic and metabolic engineering has allowed researchers to manipulate microorganisms to overcome some of these challenges, but new innovative approaches are needed to make the process more commercially viable. Transport proteins represent an underexplored target in genetic engineering that can potentially help to control the input of lignocellulosic substrate and output of products/toxins in microbial biocatalysts. In this work, I characterize and explore the use of transport systems to increase substrate utilization, conserve energy, increase tolerance, and enhance biocatalyst performance. / Dissertation/Thesis / Doctoral Dissertation Biological Design 2018

Quality control (QC) plan is an important component of manufacturing planning for mass customization. QC planning is to determine the operational tolerances and the way to control process variation for assuring the production quality against design tolerances. It includes four phases, i.e., tolerance stack-up analysis, tolerance assignment, in-process inspection design, and the procedure of error source diagnosis & process control. Previous work has been done for tolerance stack-up modeling based on the datum-machining surface relationship graph (DMG), machining error analysis, and worst-case/statistical method. In this research, the tolerance stack-up analysis is expanded with a Monte-Carlo simulation for solving the tolerance stack-up problem within multi-setups. Based on the tolerance stack-up model and process capability analysis, a tolerance assignment method is developed to determine the operation tolerance specifications in each setup. Optimal result is achieved by using tolerance grade representation and generic algorithm. Then based on a process variation analysis, a platform is established to identify the necessity of in-process inspection and design/select the inspection methods in quality control planning. Finally a general procedure is developed to diagnose the error sources and control the process variation based on the measurements.

Semiconductor manufacturing defects adversely affect yield and reliability. Manufacturers expend vast resources to reduce defects within their processes. As the minimum feature size get smaller, defects become increasingly difficult to prevent. Defects can change the behavior of a logic circuit resulting in a fault. Manufacturers and designers may improve yield, reliability, and profitability by using design techniques that make products robust even in the presence of faults. Triple modular redundancy (TMR) is a fault tolerant technique commonly used to mask faults using voting outcomes from three processing elements (PE). TMR is effective at masking errors as long as no more than a single processing element is faulty. Time distributed voting (TDV) is proposed as an active fault tolerant technique. TDV addresses the shortcomings of triple modular redundancy (TMR) in the presence of multiple faulty processing elements. A faulty PE may not be incorrect 100% of the time. When a faulty element generates correct results, a majority is formed with the healthy PE. TDV observes voting outcomes over time to make a statistical decision whether a PE is healthy or faulty. In simulation, fault coverage is extended to 98.6% of multiple faulty PE cases. As an active fault tolerant technique, TDV identifies faulty PE's so that actions may be taken to replace or disable them in the system. TDV may provide a positive impact to semiconductor manufacturers by improving yield and reliability even as fault frequency increases.

Thesis (M.S.)--State University of New York at Binghamton, Thomas J. Watson School of Engineering and Applied Science, Systems Science and Industrial Engineering Department, 2006. / Includes bibliographical references.

Thesis (Ph. D.)--Ohio State University, 2006. / Title from first page of PDF file. Includes bibliographical references (p. 164-170).