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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

The Making of Valid Data : People and Machines in Genetic Research Practice / Skapandet av giltiga data : Människor och maskiner i genetiska forskningspraktiker

Kruse, Corinna January 2006 (has links)
Avhandlingen undersöker ett centralt steg inom vetenskapliga praktiker: hur laboratorieprov översätts till data som anses giltiga och användbara av forskargemenskapen. Baserat på ett multilokalt fältarbete bestående av observationer och intervjuer i laboratorier för genetisk forskning, visas i avhandlingen hur laboratoriepersonalens yrkesskicklighet, samt normer och ideal om vetenskaplig forskning, formade deras praktiker av att producera giltiga data. Eftersom maskiner var väsentliga i forskningen undersöker avhandlingen också de former av agens som människor och maskiner ansågs bidra med till produktionen av giltiga data; giltighet tolkades som reproducerbarhet av forskarna. Med hjälp av representationsbegreppet och Latours begrepp om inskriptioner och immutable mobiles analyserar avhandlingen arbetet med att förvandla laboratorieprov till giltiga data som en tvåstegsprocess. Proven omvandlades först till rådata som sedan tolkades till data. Personalens huvudsakliga ansträngningar fokuserade i det första steget på att uppnå säkra resultat genom att bekämpa osäkerhet i material och metoder. I det andra steget var det viktigaste att eliminera subjektivitet och att göra objektiva tolkningar av rådatan. Laboratoriepersonalens yrkesskicklighet och användning av maskiner var viktiga verktyg för att eliminiera osäkerhet och subjektivitet. Säkra och objektiva resultat, dvs giltiga data, förväntades uppnås med hjälp av maskiner. Med användning av bl a Barad’s begrepp agential realism analyserar avhandlingen de olika förståelser av människor och maskiner som formade forskarnas praktiker och möjliggjorde skapandet av giltiga data. / This dissertation explores a central step in scientific practices: how samples are turned into data that is considered valid and useful by the research community. Based on multi-sited fieldwork, with observations and interviews at laboratories involved in genetic research, the study focuses on how the laboratory staff’s professional skill, norms, and ideals of scientific research formed their practices of making valid data. As machines were essential for this research, the study also investigates the forms of agency that humans and machines were seen as contributing to the making of valid data; validity being interpreted as reproducibility by the scientists involved. Drawing upon notions of representations as well as Latour’s concepts of inscriptions and immutable mobiles, the study analyzes the practices of transforming samples into valid data as a two-step process. The samples were first turned into raw data, which was subsequently interpreted as data. During the first step, the staff’s central concern was to battle uncertainty in materials and procedures and establish certainty of results, whereas in the second step it was of vital importance to eliminate subjectivity and make objective interpretations of the raw data. Central tools for eliminating uncertainty and subjectivity were the laboratory staff’s professional skill and the use of machines. Certainty and objectivity of results, i.e. valid data, were expected to occur with the help of machines. Drawing upon e.g. Barad’s framework of agential realism, the study analyzes the various understandings of notions of humanness and machineness which shaped scientists’ practices and made the creation of valid data possible.
2

A High Performance Advanced Encryption Standard (AES) Encrypted On-Chip Bus Architecture for Internet-of-Things (IoT) System-on-Chips (SoC)

Yang, Xiaokun 25 March 2016 (has links)
With industry expectations of billions of Internet-connected things, commonly referred to as the IoT, we see a growing demand for high-performance on-chip bus architectures with the following attributes: small scale, low energy, high security, and highly configurable structures for integration, verification, and performance estimation. Our research thus mainly focuses on addressing these key problems and finding the balance among all these requirements that often work against each other. First of all, we proposed a low-cost and low-power System-on-Chips (SoCs) architecture (IBUS) that can frame data transfers differently. The IBUS protocol provides two novel transfer modes – the block and state modes, and is also backward compatible with the conventional linear mode. In order to evaluate the bus performance automatically and accurately, we also proposed an evaluation methodology based on the standard circuit design flow. Experimental results show that the IBUS based design uses the least hardware resource and reduces energy consumption to a half of an AMBA Advanced High-Performance Bus (AHB) and Advanced eXensible Interface (AXI). Additionally, the valid bandwidth of the IBUS based design is 2.3 and 1.6 times, respectively, compared with the AHB and AXI based implementations. As IoT advances, privacy and security issues become top tier concerns in addition to the high performance requirement of embedded chips. To leverage limited resources for tiny size chips and overhead cost for complex security mechanisms, we further proposed an advanced IBUS architecture to provide a structural support for the block-based AES algorithm. Our results show that the IBUS based AES-encrypted design costs less in terms of hardware resource and dynamic energy (60.2%), and achieves higher throughput (x1.6) compared with AXI. Effectively dealing with the automation in design and verification for mixed-signal integrated circuits is a critical problem, particularly when the bus architecture is new. Therefore, we further proposed a configurable and synthesizable IBUS design methodology. The flexible structure, together with bus wrappers, direct memory access (DMA), AES engine, memory controller, several mixed-signal verification intellectual properties (VIPs), and bus performance models (BPMs), forms the basic for integrated circuit design, allowing engineers to integrate application-specific modules and other peripherals to create complex SoCs.

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