This thesis presents the design of a broadband and high speed dc-coupled AGC amplifier for multi-level (4-PAM) signaling with a symbol rate of 1-GS/s ( 2-Gb/s ) . It is a high frequency analog design with several design challenges such as high -3 dB bandwidth ( greater than 500 MHz ) and highly linear gain while accommodating a large input swing range ( 120 mVp-p to 1800 mVp-p diff.) and delivering constant differential output swing of 1700 mVp-p to 50-ohm off-chip loads at high speed. Moreover, the gain control circuit has been designed in analog domain. The amplifier incorporates both active and passive feedback in shunt-shunt topology in order to achieve wide bandwidth. This standalone chip has been implemented in AMS 0.35 micron CMOS process. The post layout eye-diagrams seem to be quite satisfactory.
| Identifer | oai:union.ndltd.org:UPSALLA1/oai:DiVA.org:liu-6509 |
| Date | January 2006 |
| Creators | Bhuiya, Iftekharul Karim |
| Publisher | Linköpings universitet, Institutionen för systemteknik, Institutionen för systemteknik |
| Source Sets | DiVA Archive at Upsalla University |
| Language | English |
| Detected Language | English |
| Type | Student thesis, info:eu-repo/semantics/bachelorThesis, text |
| Format | application/pdf |
| Rights | info:eu-repo/semantics/openAccess |
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