As demand for higher bandwidth I/O grows, the front end design of serial link
becomes significant to overcome stringent timing requirements on noisy and bandwidthlimited
channels. As a clock reconstructing module in a receiver, the recovered clock
quality of Clock and Data Recovery is the main issue of the receiver performance.
However, from unknown incoming jitter, it is difficult to optimize loop dynamics to
minimize steady-state and dynamic jitter.
In this thesis a 10 Gb/s adaptive loop bandwidth clock and data recovery circuit
with on-chip loop filter is presented. The proposed system optimizes the loop bandwidth
adaptively to minimize jitter so that it leads to an improved jitter tolerance performance.
This architecture tunes the loop bandwidth by a factor of eight based on the phase
information of incoming data. The resulting architecture performs as good as a
maximum fixed loop bandwidth CDR while tracking high speed input jitter and as good
as a minimum fixed bandwidth CDR while suppressing wide bandwidth steady-state jitter. By employing a mixed mode predictor, high updating rate loop bandwidth
adaptation is achieved with low power consumption. Another relevant feature is that it
integrates a typically large off-chip filter using a capacitance multiplication technique
that employs dual charge pumps.
The functionality of the proposed architecture has been verified through
schematic and behavioral model simulations. In the simulation, the performance of jitter
tolerance is confirmed that the proposed solution provides improved results and
robustness to the variation of jitter profile. Its applicability to industrial standards is also
verified by the jitter tolerance passing SONET OC-192 successfully.
| Identifer | oai:union.ndltd.org:tamu.edu/oai:repository.tamu.edu:1969.1/ETD-TAMU-2009-08-7183 |
| Date | 2009 August 1900 |
| Creators | Jeon, Hyung-Joon |
| Contributors | Silva-Martinez, Jose |
| Source Sets | Texas A and M University |
| Language | en_US |
| Detected Language | English |
| Type | Book, Thesis, Electronic Thesis, text |
| Format | application/pdf |
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