<p dir="ltr">Semiconductor technology has propelled human society into the information age, and that progress continues. Silicon CMOS device has been aggressively scaled down to 5 nm technology node. To further boost the on-state performance, MOS technology based on high-mobility channels such as III-V and Ge have been intensively studied. 3D structures such as FinFETs and gate-all-around (GAA) FETs are also applied to III-V and Ge to improve the electrostatic control of the channels for the ultimate scaling. </p><p><br></p><p dir="ltr">Traditional semiconductor device characterization techniques are inapplicable to devices created through these novel materials and device structures. This work applies various techniques to characterize a wide variety of semiconductor devices, in addition to presenting novel techniques studying the reliability of commercial off the shelf (COTS) products. Finally, the design of an ultra-low-power RF ASIC implementing wireless neural recording and stimulation, designed for cranial implantation, will be presented.</p>
| Identifer | oai:union.ndltd.org:purdue.edu/oai:figshare.com:article/25746687 |
| Date | 06 May 2024 |
| Creators | Nathan J Conrad (18494457) |
| Source Sets | Purdue University |
| Detected Language | English |
| Type | Text, Thesis |
| Rights | In Copyright |
| Relation | https://figshare.com/articles/thesis/Advanced_Electrical_Analysis_of_Low_Noise_MOSFET_and_Circuit_Implementation_for_Low_Power_RFID_Application/25746687 |
Page generated in 0.002 seconds