Video traffic constitutes a major part of the Internet traffic nowadays. Yet most video delivery services remain best-effort, relying on server bandwidth over-provisioning to guarantee Quality of Service (QoS). Cloud computing is changing the way that video services are offered, enabling elastic and efficient resource allocation through auto-scaling. In this thesis, we propose a new framework of cloud workload management for multimedia delivery services, incorporating demand forecast, predictive resource allocation and quality assurance, as well as resource pricing as inter-dependent components. Based on the trace analysis of a production Video-on-Demand (VoD) system, we propose time-series techniques to predict video bandwidth demand from online monitoring, and determine bandwidth reservations from multiple data centers and the related load direction policy. We further study how such quality-guaranteed cloud services should be priced, in both a game theoretical model and an optimization model.Particularly, when multiple video providers coexist to use cloud resources, we use pricing to control resource allocation in order to maximize the aggregate network utility, which is a standard network utility maximization (NUM) problem with coupled objectives. We propose a novel class of iterative distributed solutions to such problems with a simple economic interpretation of pricing. The method proves to be more efficient than the conventional approach of dual decomposition and gradient methods for large-scale systems, both in theory and in trace-driven simulations.

Video traffic constitutes a major part of the Internet traffic nowadays. Yet most video delivery services remain best-effort, relying on server bandwidth over-provisioning to guarantee Quality of Service (QoS). Cloud computing is changing the way that video services are offered, enabling elastic and efficient resource allocation through auto-scaling. In this thesis, we propose a new framework of cloud workload management for multimedia delivery services, incorporating demand forecast, predictive resource allocation and quality assurance, as well as resource pricing as inter-dependent components. Based on the trace analysis of a production Video-on-Demand (VoD) system, we propose time-series techniques to predict video bandwidth demand from online monitoring, and determine bandwidth reservations from multiple data centers and the related load direction policy. We further study how such quality-guaranteed cloud services should be priced, in both a game theoretical model and an optimization model.Particularly, when multiple video providers coexist to use cloud resources, we use pricing to control resource allocation in order to maximize the aggregate network utility, which is a standard network utility maximization (NUM) problem with coupled objectives. We propose a novel class of iterative distributed solutions to such problems with a simple economic interpretation of pricing. The method proves to be more efficient than the conventional approach of dual decomposition and gradient methods for large-scale systems, both in theory and in trace-driven simulations.

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A limited set of Processing Element (PE) pairs in a parallel computer cover the internal communications of scalable parallel programs. We take advantage of this property using the concept of Sparse Flat Neighborhood Networks (Sparse FNNs). Sparse FNNs are network designs that provide single-switch latency and full wire bandwidth for each specified PE pair, despite using relatively few network interfaces per PE and switches that have far fewer ports than there are PEs. This dissertation discusses the design problem, runtime support, and working prototype (KASY0) for Sparse FNNs. KASY0 not only demonstrated the claimed properties, but also set world records for its price/performance and performance on a specific application. Parallel supercomputers execute many portions of an application simultaneously. For scalable programs, the more PEs the system has, the greater the potential speedup. Portions executing on different PEs may be able to work independently for short periods, but the performance desired might not be achieved due to delays in communication between PEs. The set of PE pairs that will communicate often is both predictable and small relative to the number of possible PE pairings. This sparseness property can be exploited in the design and implementation of networks for massively parallel supercomputers. The sparseness of communicating pairs is rooted in the fact that each of the human-designed communication patterns commonly used in parallel programs has the property that the number of communicating pairs grows relatively slowly as the number of PEs is increased. Additionally, the number of pairs in the union of all communication patterns used in a suite of parallel programs grows surprisingly slowly due to pair synergy: the same pair often appears in multiple communication patterns. Detailed analysis of communication patterns clearly shows that the number of PE pairs actually communicating is very sparse, although the structure of the sparseness can be complex.

here is an increasing demand for higher bandwidth (BW) between logic and memory ICs for future smart mobile systems. Such high BW are proposed to be achieved using 3D interposers that have ultra-small through-package-via (TPVs) interconnections to connect the logic device on one side of the interposer to the memory on the other side. The current approach is primarily based on organic or silicon interposers. However, organic interposers face several challenges due to their poor dimensional stability, and coefficient of thermal expansion (CTE) mismatch to silicon ICs. Silicon interposers made with back-end-of-line (BEOL) wafer processes can achieve the required wiring and I/O density, but are not cost effective, and in addition exhibit higher electrical loss due to the semiconducting nature of the Si substrate. In this research, ultra-thin 3D Glass Interposers are studied as a superior alternative to organic and silicon interposers. The fundamental focus of this research is to achieve ultra-small TPVs in thin glass with dimensions similar to that of through-silicon-vias (TSVs) in silicon. The objective of this research is to study and demonstrate ultra-small pitch (30µm) TPV hole formation (10µm diameter), metallization and electrical characterization in ultra-thin (30µm) glass substrates. To meet these objectives, this study focusses on four main research tasks: a) electrical modeling and design of ultra-small TPVs in glass, b) small diameter TPV hole formation with minimum defects, c) copper metallization of TPVs with reliable adhesion, and d) electrical characterization of TPVs. This research reports the first demonstration of ultra-small TPVs (10-15µm in diameter) in ultra-thin glass interposer substrates (30µm). A thin-glass handling method is developed using polymer surface layers to achieve defect-free handling of glass even at thicknesses as low as 30µm. Several TPV formation methods are explored including excimer laser ablation using 193nm (ArF) lasers to form TPVs with smallest diameter and pitch. A brief study on the through-put capabilities of these excimer lasers is also discussed. The fundamental approach to TPV metallization involves a semi-additive-plating process (SAP) using electroless and electrolytic copper deposition techniques. The resulting side-wall surfaces of TPVs after metallization are analyzed through SEM imaging of TPV cross-sections, and are further characterized using nano-indentation tests. Additionally, thermo-mechanical reliability tests and failure analysis are performed to study the reliability of TPVs that are metallized with Cu. This research culminates in design, fabrication and electrical characterization of small pitch TPVs in ultra-thin glass interposers (30µm).

For the past decade, a great deal of research has been focused towards developing a viable on-chip solution to replace the current state-of-the-art VHF and UHF filters based on SAW and FBAR technologies. Although filters based on SAW and FBAR devices are capable of fulfilling the basic requirements needed for IF and RF bandpass filtering and reference signal generation, an alternative solution that can enable the next generation of multi-frequency and multi-mode transceivers while enabling size and price reduction by allowing the manufacturing of single-chip monolithic RF transceivers is highly desired. In response to these new needs, piezoelectrically-transduced micromechanical filters have emerged as a plausible alternative to outperform current dominant technologies in size, cost, and IC manufacturing compatibility without compromising device performance in terms of insertion loss, rejection, power handling and linearity. This dissertation presents the design, fabrication, characterization and experimental analysis of low-loss VHF and UHF filters for wireless communication applications, based on piezoelectrically-transduced micromechanical resonators. The resonators employed in this work for the implementation of microwave filters, resonate in contour-mode shapes, which differ from commercially available thickness-mode FBAR resonators, for which the thickness sets the resonance frequency. The employment of contour-mode designs facilitate simultaneous synthesis of multiple frequencies on the same substrate through CAD layout-defined lateral dimensions, thus avoiding the complexity demanded by FBAR devices for the precise control of the piezoelectric layer thickness. Moreover, filters composed of acoustically-coupled piezoelectrically-transduced resonators operating at higher order modes with sizes up to 10 times smaller than their SAW counterparts operating at the same UHF range have been successfully implemented, without jeopardizing the key filter specifications. Throughout this dissertation, piezoelectrically-transduced MEMS filters based on mechanically, electrically and acoustically coupled contour-mode resonator(s) or resonator arrays were designed and fabricated. Filters with insertion loss as low as 2.6 dB at IF frequencies and 4.0 dB at RF frequencies have been demonstrated. Moreover, synthesized filters with extremely narrow bandwidth of 0.1 % and 0.2 % at frequencies between 160 MHz and 215 MHz have been developed, which comply the specifications for IF filters for GSM handsets. This particular type of filters each consist of just one single high-Q resonator, which leverages single crystalline silicon as the major part of their structure to obtain the sufficient quality factor required for the implementation of such small bandwidth. Among the most significant results, this dissertation presents two thin film piezoelectrically-transduced monolithic filters operating at 482 MHz and 536 MHz, which can be interfaced directly to a 377  antenna without the need of external matching components. This dissertation also has conducted a systematic comparison between commercial available SAW filters and the MEMS filters synthesized using piezoelectrically-transduced resonators. Parameters such as group delay and third intermodulation (IP3) have been measured and carefully compared. Evidentially, most of the fabricated piezoelectrically-transduced filters developed by this work have exhibited a similar or superior performance as compared to their commercial SAW counterparts

The past decade has witnessed the fast development of peer-assisted video ondemand (PA-VoD) systems, which have attracted millions of online users. The efforts on improving the quality of video programs have never ceased since the beginning, and nowadays offering high-definition (HD) channels has become a common practice. However, compared with standard-definition (SD) channels, HD channels have to sustain a higher streaming rate to peers, which is a challenging task. In real systems, HD channels often suffer from poor streaming quality, or impose a heavy burden on the servers. This thesis conducts an in-depth study on peer cache and upload bandwidth management at the same time for multi-channel PA-VoD systems, where HD and SD channels coexist with different bandwidth and cache requirements. The objective is to minimize the server bandwidth consumption, and thus the maintenance cost of VoD service providers. The solution is cross-channel allocation (or view-upload decoupling), i.e., making SD channels help HD viewers with the surplus peer-contributed resources. The management of these resources includes bandwidth allocation and caching strategies. We first propose a generic modeling framework to capture the essential characteristics of PA-VoD systems: the demand and supply of bandwidth from peers. Our modeling framework can be customized or extended to model a variety of caching strategies, including FIFO, passive caching, and active caching with different user behaviors. We then apply the modeling framework to two representative scenarios: stationary scenarios, where the channels have fixed popularity; and non-stationary scenarios, in which a new movie is released, and peers enter the channel in a flash-crowd manner. We prove using our models that passive caching is efficient for stationary user behaviors, and derive the optimal caching solutions when the channels in the system demonstrate different popularity evolutions, i.e., with non-stationary behaviors. With the insights gained from our modeling work, we design effective centralized heuristic algorithms and practical distributed strategies for peer cache replacement and upload bandwidth allocation, with a near-optimal utilization of these resources. We propose centralized and distributed cross-channel allocation, and also extend the substreaming technique from live streaming to VoD systems, where it demonstrates its extreme feasibility. Our extensive simulation results verify the efficacy of these heuristic and practical strategies. / Graduate / 0984 / changlecsu@gmail.com

Virtual machines are gaining a growing importance in modern business IT infrastructure. They facilitate multiple operating system instances on one physical host, which provides more efficient use of the computing power of the physical host but increases the amount of network traffic as well. To avoid potential network congestion and prioritize link resource usage in a virtual machine system, we propose a bandwidth regulation scheme. Extensive evaluation demonstrates that this bandwidth regulation scheme is accurate and effective. In addition, we resolved a drastic performance degradation of the Open-iSCSI initiator. We thoroughly tested the performance of the Open-iSCSI initiator and three modified versions under two methods of setting the TCP send buffer size - statically and dynamically. Based on these results, we propose a performance tuning scheme, which can enable users of Open-iSCSI, especially those using Open-iSCSI over a long fat network, to achieve significant throughput gains.

The number and the size of sensor networks, e.g., used for monitoring of public places, are steadily increasing, introducing new demands on the algorithms used to process the collected measurements. The straightforward solution is centralised fusion, where all measurements are sent to a common node where all estimation is performed. This can be shown to be optimal, but it is resource intensive, scales poorly, and is sensitive to communication and sensor node failure. The alternative is to perform decentralised fusion, where the computations are spread out in the network. Distributing the computation results in an algorithm that scales better with the size of the network and that can be more robust to hardware failure. The price of decentralisation is that it is more difficult to provide optimal estimates. Hence, a decentralised method needs to be designed to maximise scaling and robustness while minimising the performance loss. This MSc thesis studies tree aspects of the design of decentralised networks: the network topology, communication schemes, and methods to fuse the estimates from different sensor nodes. Results are obtained using simulations of a network consisting of radar sensors, where the quality of the estimates are compared(the root mean square error, RMSE) and the consistency of the estimates (the normalised estimation error squared, NEES). Based on the simulation, it is recommended that a 2-tree network topology should be used, and that estimates should be communicated throughout the network using an algorithm that allows information to propagate. This is achieved by sending information in two steps. The first step is to let the nodes send information to their neighbours with a certain frequency, after which a fusion is performed. The second step is to let the nodes indirectly forward the information they receive by sending the result of the fusion. This second step is not performed every time information is received, but rather at an interval, e.g., every fifth time. Furthermore, 3 sub-optimal methods to fuse possibly correlated estimates are evaluated: Covariance Intersection, Safe Fusion, and Inverse Covariance Intersection. The outcome is to recommend using Inverse Covariance Intersection.

Ces travaux de recherche concernent les amplificateurs RF de puissance pour stations de base. La technologie actuelle de transistor RF la plus compétitive, le LDMOS, est confrontée à l’augmentation constante du débit et à la concurrence d’autres technologies comme le HEMT GaN. Un autre challenge est l’intégration de l’adaptation de sortie réalisée en dehors du boîtier qui n’est plus compatible avec les futurs standards combinant jusqu’à soixante-quatre amplificateurs de puissance proches les uns des autres.Une première piste envisagée dans cette thèse est le substrat Si à haute résistivité. A partir de simulations puis de mesures sur plaques, l’amélioration du facteur de qualité des éléments passifs a été démontrée mais ces premières investigations ne permettent pas l’intégration de l’adaptation de sortie avec la technologie actuelle bien que les résultats soient très encourageants. Les challenges technologiques de ce nouveau substrat ont mené à considérer la structure différentielle pour les amplificateurs. En plus des avantages connus de cette configuration, nous avons montré que la conception d’un amplificateur de puissance différentiel montre une amélioration importante de la bande instantanée répondant au besoin d’un débit toujours plus élevé. Cette amélioration ne dégrade pas les autres performances en gain, rendement et puissance de sortie. Dans la continuité de cette thèse, les perspectives concernent la conception d’un amplificateur de puissance sur substrat SI à haute résistivité combinée à une structure différentielle qui pourrait permettre une avancée majeure sur toutes les performances tout en gardant l’avantage du faible coût du LDMOS Silicium en comparaison des autres substrats. / This research concerns the RF power amplifiers for base stations. The current most competitive technology of RF transistor, the LDMOS, faces the constantly increasing data rate and competition from other technologies such as GaN HEMT. Another challenge is the integration of the output matching made outside of the package which is not compatible with future standards combining up to sixty-four power amplifiers close to each other. A first track proposed in this thesis is the high resistivity Si substrate. From simulations and measurements on wafers, improved passive elements quality factor has been demonstrated but these initial investigations do not allow the integration of the output matching with the current technology, although the results are very encouraging. The technological challenges of this new substrate led to consider the differential structure for amplifiers. Besides to the known advantages of this configuration, we have shown that the design of a differential power amplifier shows a significant improvement in the instantaneous band width meeting the need for higher data rate. This improvement does not degrade other performance as gain, efficiency and output power. In continuation of this thesis, the perspective concerns the design of a power amplifier on a high resistivity Si substrate combined with a differential structure that could enable a major advance over all performance while keeping the advantage of low cost of LDMOS silicon compared to other substrates.