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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
21

Synchronized Communication Network for Real-Time Distributed Control Systems in Modular Power Converters

Rong, Yu 08 November 2022 (has links)
Emerging large-scale modular power converters are pursuing high-performance distributed control systems. As opposed to the centralized control architecture, the distributed control architecture features shared computational burdens, pulse-width modulation (PWM) latency compensation, simplified fiber-optic cable connection, redundant data routes, and greatly enhanced local control capabilities. Modular multilevel converters (MMCs) with conventional control are subjected to large capacitor voltage ripples, especially at low-line frequencies. It is proved that with appropriate arm current shaping in the timescale of a switching period, referred as the switching-cycle control (SCC), such line-frequency dependence can be eliminated and MMCs are enabled to work even in dc-dc mode. Yet the SCC demands multiple times of arm current alternations in one switching period. To achieve the high-bandwidth current regulation, hybrid modulation approach incorporating both the carrier-based modulation and the peak-current-mode (PCM) modulation is adopted. The combined digital and analog control and the extreme time-sensitive nature together pose great challenges on the practical implementation that the existing distributed control systems cannot cope with. This dissertation aims to develop an optimized distributed control system for SCC implementation. The critical analog PCM modulation is enabled by the intelligent gate driver with integrated rogowski coil and field programmable gate array (FPGA). A novel distributed control architecture is proposed accordingly for SCC applications where the hybrid modulation function is shifted to the gate driver. The proposed distributed control solution is verified in the SCC-based converter operations. Accompanied by the growing availability of medium-voltage silicon carbide (SiC) devices, fast-switching-enabled novel control schemes raise a high synchronization requirement for the communication network. Power electronics system network (PESNet) 3.0 is a proposed next-generation communication network designed and optimized for a distributed control system. This dissertation presents the development of PESNet 3.0 with a sub-nanosecond synchronization error (SE) and a gigabits-per-second data rate dedicated for large-scale high-frequency modular power converters. The White Rabbit Network technology, originally developed for the Large Hadron Collider accelerator chain at the European Organization for Nuclear Research (CERN), has been embedded in PESNet 3.0 and tailored to be suited for distributed power conversion systems. A simplified inter-node phase-locked loop (N2N-PLL) has been developed. Subsequently, stability analysis of the N2N-PLL is carried out with closed-loop transfer function measurement using a digital perturbation injection method. The experimental validation of the PESNet 3.0 is demonstrated at the controller level and converter level, respectively. The latter is on a 10 kV SiC-MOSFET-based modular converter prototype, verifying ±0.5 ns SE at 5 Gbps data rate for a new control scheme. The communication network has an impact on the converter control and operation. The synchronicity of the controllers has an influence on the converter harmonics and safe operation. A large synchronization error can lead to the malfunction of the converter operation. The communication latency poses a challenge to the converter control frequency and bandwidth. With the increased scale of the modular converter and control frequency, the low-latency requirement of communication network becomes more stringent. / Doctor of Philosophy / Emerging silicon carbide (SiC) power devices with 10 times higher switching frequencies than conventional Si devices have enabled high-frequency high-density medium-voltage converters. In the meantime, the power electronics building block (PEBB) concept has continually benefited the manufacturing and maintenance of modular power converters. This philosophy can be further extended from power stages to control systems, and the latter become more distributed with greatly enhanced local control capabilities. In the distributed control and communication system, each PEBB is equipped with a digital controller. In this dissertation, a real-time distributed control architecture is designed to take the advantage of the powerful processing capability from all digital control units, achieving a minimized digital delay for the control system. In addition, pulse-width modulation (PWM) signals are modulated in each PEBB controller based on its own clock. Due to the uncontrollable latency among different PEBB controllers, the synchronicity becomes a critical issue. It is necessary to ensure the synchronous operation to follow the desired modulation scheme. This dissertation presents a synchronized communication network design with sub-ns synchronization error and gigabits-per-second data rate. Finally, the impact of the communication network on the converter operation is analyzed in terms of the synchronicity, the communication latency and fault redundancy.
22

MR-guided thermotherapies of mobile organs : advances in real time correction of motion and MR-thermometry / Thermothérapies guidées par IRM sur organes mobiles : avancées sur la correction en temps réel du mouvement et de la thermométrie

Roujol, Sébastien 25 May 2011 (has links)
L'ablation des tissus par hyperthermie locale guidée par IRM est une technique prometteuse pour le traitement du cancer et des arythmies cardiaques. L'IRM permet d'extraire en temps réel des informations anatomiques et thermiques des tissus. Cette thèse a pour objectif d'améliorer et d'étendre la méthodologie existante pour des interventions sur des organes mobiles comme le rein, le foie et le coeur. La première partie a été consacrée à l'introduction de l'imagerie rapide (jusqu'à 10-15 Hz) pour le guidage de l'intervention par IRM en temps réel. L'utilisation de cartes graphiques (GPGPU) a permis une accélération des calculs afin de satisfaire la contrainte de temps réel. Une précision, de l'ordre de 1°C dans les organes abdominaux et de 2-3°C dans le coeur, a été obtenue. Basé sur ces avancées, de nouveaux développements méthodologiques ont été proposés dans une seconde partie de cette thèse. L'estimation du mouvement basée sur une approche variationnelle a été améliorée pour gérer la présence de structures non persistantes et de fortes variations d'intensité dans les images. Un critère pour évaluer la qualité du mouvement estimé a été proposé et utilisé pour auto-calibrer notre algorithme d'estimation du mouvement. La méthode de correction des artefacts de thermométrie liés au mouvement, jusqu'ici restreinte aux mouvements périodiques, a été étendue à la gestion de mouvements spontanés. Enfin, un nouveau filtre temporel a été développé pour la réduction du bruit sur les cartographies de température. La procédure interventionnelle apparaît maintenant suffisamment mature pour le traitement des organes abdominaux et pour le transfert vers la clinique. Concernant le traitement des arythmies cardiaques, les méthodes ont été évaluées sur des sujets sains et dans le ventricule gauche. Par conséquent, la faisabilité de l'intervention dans les oreillettes mais aussi en présence d'arythmie devra être abordée. / MR-guided thermal ablation is a promising technique for the treatment of cancer and atrial fibrillation. MRI provides both anatomical and temperature information. The objective of this thesis is to extend and improve existing techniques for such interventions in mobile organs such as the kidney, the liver and the heart. A first part of this work focuses on the use of fast MRI (up to 10-15 Hz) for guiding the intervention in real time. This study demonstrated the potential of GPGPU programming as a solution to guarantee the real time condition for both MR-reconstruction and MR-thermometry. A precision in the range of 1°C and 2-3°C was obtained in abdominal organs and in the heart, respectively. Based on these advances, new methodological developments have been carried out in a second part of this thesis. New variational approaches have proposed to address the problem of motion estimation in presence of structures appearing transient and high intensity variations in images. A novel quality criterion to assess the motion estimation is proposed and used to autocalibrate our motion estimation algorithm. The correction of motion related magnetic susceptibility variation was extended to treat the special case of spontaneous motion. Finally, a novel temporal filter is proposed to reduce the noise of MR-thermometry measurements while controlling the bias introduced by the filtering process. As a conclusion, all main obstacles for MR-guided HIFU-ablation of abdominal organs have been addressed in in-vivo and ex-vivo studies, therefore clinical studies will now be realized. However, although promising results have been obtained for MR-guided RF-ablation in the heart, its feasibility in the atrium and in presence of arrhythmia still remains to be investigated.
23

Configurable Hardware Support for Single Processor Real-Time Systems

Nordström, Susanna January 2008 (has links)
<p>This thesis describes a further development of a building block for programmable devices in embedded systems handling real-time functionality.</p><p>Embedded systems are included in a variety of products within different technical areas such as industrial automation, consumer electronics, automotive industry, and communication-, and multimedia systems. Products ranging from trains and airplanes to microwave ovens and washing machines are controlled by embedded systems.</p><p>Programmable devices constitute a part of these embedded systems. Today, a programmable device can include a complete system containing building blocks connected with each other via programs written using a hardware description language. The programmable devices can be programmed and changed over and over again and this flexibility makes it possible to explore how these building blocks can best be designed in relation to system requirements, before final implementation.</p><p>This thesis describes a further development of a building block for programmable devices implemented in a non-traditional way, i.e., the implementation is written using both hardware description language and traditional software languages. This new building block handles real-time functionality in a non-traditional way that enables certain benefits, such as increased performance, predictability and less memory consumption. Using a non-traditional implementation also has its drawbacks, and e.g., extensions and adjustments can be hard to handle since modifications are required in both hardware and software programming languages.</p><p>The new building block was investigated in order to see how it could be facilitated when used for real-time functionality. The configurability of the block was extended which enables further customization of the building block. This leads to the possibility to use the block within a wider spectrumof applications. It is also possible to reduce the size and cost of the final product since resource usage can be optimized.</p><p>Furthermore, a mathematicalmodel estimating resource usage for real-time functionality has been developed. The model enables distinctive trade-offs comparisons, and guidance for system designers, when considering what type of real-time operating system to use in a certain design.</p>
24

Global scheduling on temperature-constrained multiprocessor real-time systems

Koo, Ja-Ryeong 10 October 2008 (has links)
In this thesis, we study temperature-constrained multiprocessor real-time systems, where real-time guarantees must be met without exceeding safe temperature levels within the processors. We focus on Pfair scheduling algorithms, especially ERfair scheduling scheme (a work-conserving extension to Pfair scheduling) as our main multiprocessor real-time scheduling methodology. Then, we study the benefits of simple reactive speed scaling as described in the real-time multiprocessor systems. In this thesis, in support of the temperature-awareness, we extend the applicability of the reactive speed scaling to global scheduling schemes for multiprocessors. We propose temperature-aware scheduling and processor selection schemes motivated by existing (thermally non-optimal) ERfair scheduling in order to reduce thermal stress and therefore increase the processor utilization. Then, we show that the proposed algorithm and reactive scheme can enhance the processor utilization compared with any constant speed scheme on real-time multiprocessor systems. Additionally, we show how the maximum schedulable utilization (MSU) for partitioning heuristics can be determined on the temperature-constrained multiprocessor real-time systems.
25

Gyvenamojo namo šildymo ir vėdinimo sistemos kompiuterinio valdymo modelio sudarymas ir tyrimas naudojant miglotąją logiką / Modeling and analysis of house heating and cooling computer control system using fuzzy logic

Jasaitis, Vytautas 22 May 2005 (has links)
Presently information systems are increasingly penetrating to our daily life. Recently it is relevant to integrate the newest technologies. In that way traditional system becomes “smart” who are more economical, optimal, and self-sufficient. The biggest problem is to make a model of “smart” system. There were analyzed modeling methods, heating and cooling control systems in this job. Mathematical model for heating and cooling controller using fuzzy logic was presented. According to analyzed problems it was made verification with Matlab during experimental phase. There was made comparison evaluation of mathematical model made with fuzzy logic and timed Petri nets.
26

Pasiekiamų būsenų grafo sudarymo sudėtingumo tyrimas / Complexity analysis of reachable state graph creation

Ambrazas, Nerijus 11 August 2008 (has links)
Darbe nagrinėjamas realiojo laiko sistemų, specifikuotų agregatiniu metodu, verifikavimo uždavinys. Sprendžiant šį uždavinį, naudojama pasiekiamų būsenų grafo sudarymo metodika, leidžianti įvertinti laiko intervalus, kuriais įvyksta sistemoje apibrėžti įvykiai. Darbe nagrinėjami pasiekiamų būsenų grafo sudarymo algoritmai ir pateikta prototipinėse programose naudojama duomenų struktūra. Suformuluoti ir įrodyti teiginiai apie pasiekiamų būsenų grafo sudarymo algoritmo sudėtingumą (maksimalaus vienos būsenos galimų perėjimų skaičiaus; grafo viršūnių skaičiaus augimo priklausomybės nuo įvykių skaičiaus; maksimalaus įvykių skaičiaus elgsenoje laiko intervale; maksimalaus viršūnių skaičiaus laiko intervale.) Pateikta trijų testinių sistemų grafų automatizuoto sudarymo analizė. Parodyta, kad Simplekso optimizavimo procedūra laiko momentų palyginimui gali būti naudojama tik atskirais atvejais. / The work deals with a verification task of real time system specified by aggregate method. While solving the task, a technique for creation a reachable state graph is used. The technique permits to evaluate intervals of time when the defined system events occur. Reachable state graph creation algorithms are analysed in the work. A data structure used in prototype software is presented in the work too. Assertions about a complexity of algorithm for reachable state graph creation are formulated and proved. These assertions concern maximum number of transitions from single state, dependency of number of graph verteles growth on a number of events, maximum number of events in a behaviour during time interval, and maximum number of vertexes during time interval. Analysis of automated creation of graphs for three test systems is presented. It is shown that Simplex optimisation procedure for comparison of time intervals can be used only in certain cases.
27

Configurable Hardware Support for Single Processor Real-Time Systems

Nordström, Susanna January 2008 (has links)
This thesis describes a further development of a building block for programmable devices in embedded systems handling real-time functionality. Embedded systems are included in a variety of products within different technical areas such as industrial automation, consumer electronics, automotive industry, and communication-, and multimedia systems. Products ranging from trains and airplanes to microwave ovens and washing machines are controlled by embedded systems. Programmable devices constitute a part of these embedded systems. Today, a programmable device can include a complete system containing building blocks connected with each other via programs written using a hardware description language. The programmable devices can be programmed and changed over and over again and this flexibility makes it possible to explore how these building blocks can best be designed in relation to system requirements, before final implementation. This thesis describes a further development of a building block for programmable devices implemented in a non-traditional way, i.e., the implementation is written using both hardware description language and traditional software languages. This new building block handles real-time functionality in a non-traditional way that enables certain benefits, such as increased performance, predictability and less memory consumption. Using a non-traditional implementation also has its drawbacks, and e.g., extensions and adjustments can be hard to handle since modifications are required in both hardware and software programming languages. The new building block was investigated in order to see how it could be facilitated when used for real-time functionality. The configurability of the block was extended which enables further customization of the building block. This leads to the possibility to use the block within a wider spectrumof applications. It is also possible to reduce the size and cost of the final product since resource usage can be optimized. Furthermore, a mathematicalmodel estimating resource usage for real-time functionality has been developed. The model enables distinctive trade-offs comparisons, and guidance for system designers, when considering what type of real-time operating system to use in a certain design.
28

Analysis and Evaluation of Performance in a Complex Software System

Kero, Caroline January 2022 (has links)
GlobalEye is an aircraft by Saab that provides surveillance of air, sea, and land. In order to train on the system present in this aircraft a Mission Training System, MTS, is used. The MTS consists of the Command and Control, C2, system that is present in the aircraft as well as a scenario simulator. This master thesis is focused on evaluating the performance of the distributed real-time system that is the MTS in terms CPU and memory usage of its Java processes. These Java processes are divided across four servers and two types of workstations.  Two sorts of tests were conducted; workload model testing and user scenario testing. Both tests were conducted multiple times with different amount of workload. The workload was defined as a number of air and sea targets added to the scenario simulator. The data was collected by running bash scripts on each machine that saved the CPU and memory output from the Linux top command. Java VisualVM was used to examine a selection of processes further. In Java VisualVM the heap size, garbage collector pauses, and CPU time of the methods were the main focus of interest. The result from the workload model testing showed that a large majority of the processes handled an increased workload in terms of memory usage well. When it comes to the CPU usage four processes with significantly increasing CPU values were examined further in Java VisualVM. These processes were MMI processes and processes involved in data transfer. No problems were noted regarding the garbage collection and heap sizes. The longest pause, across all processes, caused by garbage collection was 29.7ms. The methods with highest amount of CPU self time were also identified for the processes. One observation was that a method related to map rendering, for the MMI processes, showed decreases in CPU time as the workload increased. The result from the user scenario testing showed that the MMI of the scenario simulator suffers delays dependant on the number of targets present in the scenario. The Java process of the MMI did increase its CPU usage significantly as the targets increased. In Java VisualVM it was observed that the garbage collector for the scenario simulator MMI process was more extensive during these tests, with the longest pause being 104ms. Lastly when it comes to the CPU self time of the methods within the MMI process, one error related method was identified.
29

Un langage de programmation pour composer l'interaction musicale : la gestion du temps et des événements dans Antescofo / A programming language for Computer-Human Musical Interaction

Echeveste, José-Manuel 22 May 2015 (has links)
La musique mixte se caractérise par l’association de musiciens instrumentistes et de processus électroniques pendant une performance. Ce domaine soulève des problématiques sur l’écriture de cette interaction et sur les mécanismes qui permettent d’exécuter des programmes dans un temps partagé avec les musiciens.Ce travail présente le système temps réel Antescofo et son langage dédié. Il permet de décrire des scénarios temporels où des processus sont calculés et ordonnancés en interaction avec un environnement musical. Antescofo couple un système de suivi de partition avec un système réactif temporisé.L’originalité du système réside dans la sémantique temporelle du langage adaptée aux caractéristiques critiques de l’interaction musicale. Le temps et les événements peuvent s’exprimer de façon symbolique dans une échelle en secondes ou dans des échelles relatives à des tempos.Nous présenterons les domaines de recherche apparentés à Antescofo en musique et en informatique, les caractéristiques du langage et de la partie réactive d’Antescofo qui ont été développés pendant cette thèse en particulier les stratégies synchronisations et les différents contrôles du temps et des évènements permis par le système. Nous donnerons une sémantique du langage qui formalise le fonctionnement du moteur d’exécution. À travers une série d’exemples d’applications issues de collaborations artistiques, nous illustrerons les interactions temporelles qu’il faut gérer entre une machine et un instrumentiste lors d’un concert. Le système a pu être validé à travers de nombreux concerts par différents orchestres d’envergure internationale. / Mixed music is the association in live performance of human musicians and computer mediums, interacting in real-time. Authoring the interaction between the humans and the electronic processes, as well as their real-time implementation, challenge computer science in several ways. This contribution presents the Antescofo real-time system and its domain specific language. Using this language a composer is able to describe temporal scenarios where electronic musical processes are computed and scheduled in interaction with a live musician performance. Antescofo couples artificial machine listening with a reactive and temporized system. The challenge in bringing human actions in the loop of computing is strongly related the specification and the management of multiple time frameworks and timeliness of live execution despite heterogeneous nature of time in the two mediums. Interaction scenarios are expressed at a symbolic level through the management of musical time (i.e., events like notes or beats in relative tempi) and of the physical time (with relationships like succession, delay, duration, speed between the occurrence of the events during the performance on stage). Antescofo unique features are presented through a series of examples which illustrate how to manage execution of different audio processes through time and their interactions with an external environment. The Antescofo approach has been validated through numerous uses of the system in live electronic performances in contemporary music repertoire by various international music ensembles.
30

Návrh a implementace nástroje pro hierarchickou grafickou specifikaci systémů pracujících v reálném čase / Design and Implementation of a Tool for Hierarchical Graphical Specification of Real-Time Systems

Gach, Marek January 2009 (has links)
This thesis is aimed to specify and implement multi-purpose framework able to deal with graphical real-time system specification. This tool allows to use arbitrary verification approach to resulting system model check. Description of basic formal specification methods based on mathematic logic is done. Some well-known hierarchical graphical specifications for real-time systems are depictured. Author proposed suitable cases for functionality examination of resulting framework.

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