The goal of this thesis is to design and implement a library for data synchronization between multiple client's devices in the context of the ecosystem of a single application targeting the iOS, iPadOS or MacOS operating system. The work focuses on the simple integration of the library into existing applications using the Realm database system and on the simple way to connect the user interface with the synchronization process. I solved the chosen problem by designing a synchronization protocol primarily based on log synchronization to distribute changes between the client and the server, implementing a library to monitor changes in the client's database and distribute them to the server, and implementing a server library to integrate received changes and distribute them with help of notifications. The solution provides an easy way to implement data synchronization between multiple devices using custom database server and with the ability to define how to handle new changes of objects presented in the user interface during the synchronization. Created library can be quickly and easily integrated and thus effectively speed up the application development process.

This dissertation provides a study of synchronization and quantization issues in implementing a multistage receiver in fixed-point Digital Signal Processing (DSP) hardware. Current multistage receiver analysis has neglected the effects of synchronization and quantization; however, these effects can degrade system performance and therefore decrease overall system capacity. The first objective is to analyze and simulate various effects of synchronization in a multistage system. These effects include the effect of unsynchronized users on the bit error rate (BER) of synchronized users, and determining whether interference cancellation can be used to improve the synchronization time. This information is used to determine whether synchronization will limit overall system capacity. Both analytical and simulation techniques are presented. The second objective is to study the effects of quantization on the performance of the multistage receiver. A DSP implementation of a practical receiver will require a DSP chip with a fewer number of bits than the computer chips typically used in simulation of receiver performance. Therefore, the DSP implementation performs poorer than the simulation results predict. In addition, a fixed-point implementation is often favored over a floating-point implementation, due to the high processing requirements necessitated by the high chip rate. This further degrades performance because of the limited dynamic range available with fixed-point arithmetic. The performance of the receiver using a fixed-point implementation is analyzed and simulated. We also relate these topics to other important issues in the hardware implementation of multistage receivers, including the effects of frequency offsets at the receiver and developing a multiuser air protocol interface (API). This dissertation represents a contribution to the ongoing hardware development effort in multistage receivers at Virginia Tech. / Ph. D.

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Objectives were to evaluate time of insemination relative to estrus and synchronization with melengestrol acetate (MGA) plus prostaglandin (PG) or progesterone insert (CIDR) plus PG on AI pregnancy rate in beef heifers (n = 662) during Fall or Spring. Fall heifers (n = 349) received MGA-PG (MGA for 14 d followed by PG on d 18) or CIDR-PG (CIDR for 7 d, PG administered 1 d before CIDR removal). Estrus was monitored by HeatWatch® (n = 200) or visually (n = 149). Spring heifers (n = 313) underwent CIDR-PG with detection of estrus by HeatWatch®. Heifers not in estrus by 96-100 h after PG were bred AI as non-responsive AI (NRAI). Across seasons, 548 heifers were bred following estrus (EAI). Heifers synchronized during the Fall with MGA received more (P < 0.05) mounts than Fall CIDR heifers (76.8 ± 6.7 and 47.6 ± 7.4, respectively), but duration of estrus was similar. Fall CIDR heifers had greater (P < 0.05) mounting activity and duration of estrus (47.9 ± 5.2 mounts and 15.5 ± 1.1 h) compared to Spring CIDR heifers (34.5 ± 3.1 mounts and 12.7 ± 0.6 h). Heifers grouped in 4 h blocks from 0 to 24 h had no difference (P > 0.05) in pregnancy rates (mean 62.5 %). Treatment had no effect (P > 0.05) on EAI pregnancy rates. Pregnancy rates across seasons for EAI, NRAI and overall was 61.0 %, 26.3 %, and 54.5%. In conclusion, a 24 h window may exist to successfully AI heifers. / Master of Science

Object: To construct a synchroscope for use in the Electrical Engineering Laboratory. This synchroscope is to be small and a very compact unit, which will be portable and of such sturdy construction that it will not be damaged by the frequent handling of students. Method: After a thorough research of the existing types of instruments, a synchroscope of the Lincoln type was chosen as best suited for the given object. The construction of this type of synchroscope is essentially that of a wound rotor induction motor. This involves the construction of pole pieces, field coils, and a wound rotor. Conclusion: After the construction of our synchroscope was completed, we proceeded to test it out in the laboratory. We found it gave positive indications of synchronism in every case, and we were more than satisfied with the results obtained. Although our work was comparatively poor in relation to that done by men who have spent their entire life on such subjects, in consideration of the time and materials that we had to work with, we feel that we have accomplished our purpose and have derived a great deal of benefit from our year of work. / Master of Science

Information synchronization problems are analyzed in this thesis. Two aspects are being surveyed – clock synchronization, algorithms and their use, and data synchronization and maintaining the functionality of software at the times, when connection with database is broken. Existing products, their uses, cons and pros are overviewed. There are suggested models, how to solve these problems, which were implemented in “Distributed basketball competition registration and analysis software system”, and other theoretical solutions. Synchronization models are compared with other available solutions, the detail algorithms and methods are reviewed in this document.

Approved for public release, distribution is unlimited / Synchronization of orthogonal frequency-division multiplexed (OFDM) signals is significantly more difficult than synchronization of a single-carrier system. The recently approved IEEE Standard 802.11g specifies a packet-based OFDM system that provides a basis for the discussion of OFDM synchronization in a packet-based environment. Algorithms that synchronize the receiver carrier demodulation frequency and phase, the data frame, the OFDM symbol timing, and the data symbol timing are discussed and analyzed in an AWGN channel. System View simulation is used to implement the frame and carrier frequency synchronization algorithms, where the performance of these algorithms is analyzed and they are shown to be useful detection algorithms for Standard 802.11g signal reception. / Lieutenant Commander, United States Navy

ITC/USA 2010 Conference Proceedings / The Forty-Sixth Annual International Telemetering Conference and Technical Exhibition / October 25-28, 2010 / Town and Country Resort & Convention Center, San Diego, California / This paper describes the use of an efficient FPGA design flow, called Ogre, developed at BYU to design and implement PCM/FM demodulators. Ogre exploits the notion of reuse by taking advantage of a library of specially designed cores parameterized by XML metadata. A judicious choice of library cores, targeted to signal processing functions common to sampled data modulators and demodulators, reduces the design and test cycle time. We demonstrate this by using the tool to construct rapid prototypes of three different versions of FM demodulators and show that the bit error rate performance is comparable to demodulators on the market today.