En esta tesis doctoral se presenta TAP (Trusted and Active Protocol PDU transfer), una arquitectura para redes de tecnología ATM, novedosa por sus características distribuida, activa y multiagente. El protocolo propuesto para la arquitectura ofrece transferencias garantizadas a un conjunto privilegiado de conexiones VPI/VCI. Se propone también una extensión de la capa AAL-5 de ATM que hemos denominado EAAL-5 (Extended AAL type 5) usada para la gestión de las conexiones privilegiadas extremo-extremo.TAP ofrece garantía de servicio (GoS) cuando la red está perdiendo células ATM y aprovecha los periodos de inactividad en los enlaces para realizar las retransmisiones de las CPCS-PDU-EAAL-5. El protocolo propuesto emplea mecanismos NACK (mediante células RM de retorno) y es soportado por conmutadores ATM activos equipados con una memoria de almacenamiento de PDU denominada DMTE (Dynamic Memory to store Trusted native EAAL-5 PDU). La arquitectura activa propuesta está basada en un SMA (Sistema Multiagente) constituido por agentes programables colaborativos y distribuidos en la red. Las simulaciones realizadas demuestran la efectividad del mecanismo de recuperación de PDU propuesto con un mejor goodput en la red.La arquitectura TAP es soportada sobre conmutadores ATM activos que denominamos AcTMs (Active Asynchronous Transfer Mode Switch) y que hemos diseñado con técnicas software para: garantizar la gestión justa de colas de entrada basadas en WFQ (Weighted Fair Queueing); realizar el control de congestiones del buffer inspirado en EPD (Early Packet Discard); y evitar, con VC Merge, la mezcla de las PDU de conexiones diferentes. Estas técnicas software se proponen, por tanto, con la intención de: distribuir de forma justa la carga de los conmutadores; optimizar las retransmisiones de PDU; aliviar la implosión sobre las fuentes; evitar la fragmentación de las PDU y disminuir el interleaving de células, optimizando el goodput.Los conmutadores AcTMs requieren también el hardware apropiado para soportar TAP. Para ello, además del buffer, se proponen, la memoria DMTE y un conjunto de tablas de E/S asociadas a cada uno de los puertos de los AcTMs. Se demuestra que estos requerimientos hardware son realistas y viables para ser incorporados en los conmutadores activos. Destacamos el carácter multidisciplinar de esta tesis, donde la base de las investigaciones es la ingeniería de protocolos ATM, complementada con las novedosas ventajas que los agentes software pueden aportar. No obstante, los conmutadores finalmente obtenidos podrían ser objeto del ámbito de las arquitecturas especializadas, de forma que varios módulos del prototipo presentado, podrían ser implementados como componentes hardware para optimizar su rendimiento.Una vez identificadas las limitaciones de la tecnología ATM para soportar las transferencias garantizadas, que son nuestro principal objetivo, se describe la motivación general de estas investigaciones en entornos donde ATM es la base del tráfico IP. De este modo, se emplea NS (Network Simulator) para el estudio de escenarios donde el protocolo TAP puede aportar importantes beneficios al conocido protocolo TCP.Para poder estudiar el comportamiento de todas estas propuestas hemos implementado un simulador de TAP que aprovecha las ventajas que aporta el lenguaje Java para el desarrollo de protocolos de comunicaciones y de SMA. Este simulador permite definir múltiples escenarios y analizar los resultados de la simulación del prototipo para poder llegar a una serie de interesantes conclusiones. Las simulaciones a través de fuentes ON/OFF analizan conexiones punto-a-punto y punto-a-multipunto usando clases, objetos, threads, sincronizaciones y procesos distribuidos implementados en lenguaje Java.La memoria de tesis doctoral ha sido organizada en tres grandes apartados con el objeto de estructurar adecuadamente los contenidos presentados. La Parte I está dedicada a analizar las investigaciones relacionadas con este trabajo, de forma que se describen en siete capítulos los aspectos básicos de la tecnología ATM y se aprovecha cada uno de los capítulos para presentar resumidamente nuestras aportaciones, las cuales son ampliadas en las Partes II y III. De este modo, comenzamos destacando en el Capítulo 1 los fundamentos de la tecnología, para pasar después a describir en el Capítulo 2 una taxonomía de arquitecturas y protocolos para las redes ATM que nos sirven para identificar la propuesta TAP cuya arquitectura básica es incluida al final del capítulo. El Capítulo 3 se centra en los conceptos de fiabilidad y garantía de servicio (GoS) destacando éste último, ya que es una de nuestras propuestas a los parámetros generales de calidad de servicio (QoS) y que se deriva de éstos. Así, se explica el mecanismo con el que se ofrece la GoS a las fuentes privilegiadas. Seguidamente, el Capítulo 4 se centra en el control de congestión y la justicia, ambos aplicados sobre las colas de entrada de los conmutadores ATM. Éstos son también dos aspectos básicos en nuestra propuesta para conseguir aportar soluciones al problema de las congestiones en las fuentes privilegiadas, pero garantizando además la justicia a aquellas fuentes que no lo son. Una vez estudiadas las propuestas de la literatura se presenta un esquema de nuestro algoritmo QPWFQ. El Capítulo 5 estudia los diversos mecanismos de control de congestión aplicados sobre el buffer de los conmutadores y, después de analizar las propuestas más extendidas, comentamos nuestro algoritmo EPDR inspirado en EPD para conseguir atender las solicitudes de retransmisión de las PDU congestionadas. En el Capítulo 6 se realiza una revisión de la literatura en materia de agentes software orientada hacia las redes de comunicaciones, con la intención de centrar adecuadamente el SMA que proponemos como soporte de TAP y con el objetivo de conseguir una red activa formada por conmutadores AcTMs cuya arquitectura es adelantada al final de este capítulo. El Capítulo 7 justifica el carácter distribuido del protocolo TAP sobre una VPN (Virtual Private Network) constituida por nodos AcTMs que coexisten con conmutadores no activos en la misma red. En resumen, la Parte I trata de justificar nuestras propuestas, reafirmándolas sobre los propios fundamentos de la tecnología actual.La Parte II identifica las motivaciones generales de esta tesis, partiendo de las limitaciones actuales de la tecnología ATM que se pretenden solventar con la propuesta de TAP. Esta parte se ha dividido en dos capítulos, dedicándose el Capítulo 8 a describir las motivaciones generales, de modo que el control de congestión en los nodos de la red no sólo beneficia al tráfico ATM nativo, sino que puede ser también de utilidad para protocolos tan extendidos como TCP. Se identifican, por tanto, los beneficios aportados por TAP a las redes actuales. En el Capítulo 9 se discuten las limitaciones de ATM frente al parámetro de GoS propuesto y se explica cómo TAP puede evitar problemas tan indeseables como la fragmentación de las PDU, el interleaving del tráfico, las retransmisiones extremo-extremo y la implosión en las fuentes de tráfico.El objetivo de la Parte III es detallar las soluciones propuestas, de forma que en cuatro capítulos se realiza una descripción detallada, tanto de la arquitectura, como del protocolo que se implementa sobre ella. El Capítulo 10 describe la arquitectura distribuida y multiagente TAP, relacionándola con el modelo arquitectónico ATM, y analizando cada uno de los componentes hardware y software de los conmutadores AcTMs. El Capítulo 11 se centra específicamente en detallar el conjunto de algoritmos que constituyen el protocolo TAP y, por tanto, en el SMA que lo constituye. También se formaliza la idea intuitiva de aprovechar los tiempos de inactividad de la red para atender las retransmisiones de las PDU congestionadas. El Capítulo 12 presenta los detalles de implementación del simulador de TAP que proponemos como prototipo para analizar los resultados obtenidos en diversos escenarios. Se argumenta la elección del lenguaje Java como herramienta para el desarrollo de protocolos y SMA, para pasar después a describir la metodología y las decisiones de diseño más importantes, así como de las clases Java más destacables del prototipo. Este capítulo concluye con el análisis de los resultados más significativos de las simulaciones. Por último, el Capítulo 13 se dedica a identificar líneas futuras de acción que aporten continuidad al conjunto de investigaciones de las que ha sido objeto esta tesis doctoral. / In this doctoral thesis, TAP (Trusted and Active Protocol PDU Transfer) is presented as an innovative architecture for ATM networks due to its active multi-agent and distributive characteristics. The protocol proposed for this architecture offers guaranteed transfer of a privileged group of VPI/VCI connections. We also propose an extension of the AAL-5 layer of ATM which we have called EAAL-5 ( Extended AAL type 5) which is used for the management of privileged end-to end connections.TAP offers Guarantee of Service (GoS) when the network is losing ATM cells and it takes advantage of the inactive periods in the links in order to retransmit the CPCS-PDU-EAAL-5. The protocol we propose uses NACK mechanisms (using backwards RM cells) and is supported by active ATM switches that have a PDU storage memory called DMTE (Dynamic Memory to store Trusted Native EAAL-5 PDU).Our proposed active architecture is based on a MAS (Multi-Agent System) formed by programmable collaborative agents, distributed in the network. The simulations carried out have proved the effectiveness of the PDU recovery mechanism that we have proposed for a better goodput in the net.The TAP architecture is supported over active ATM switches which we have called AcTMs (Active Asynchronous Transfer Mode Switch) and which we have designed with software technology in order to:· guarantee the fair management of entry queues based on WFQ (Weighted Fair Queueing);· manage the control of buffer congestion, using a device inspired by EPD (Early Packet Discard)· and prevent, with VCmerge, the mixing of PDUs coming from different connections.We therefore propose this software technology in order to: fairly distribute the load on the switches; optimize the PDU retransmissions; alleviate the implosion on the sources; prevent PDU fragmentation and decrease the interleaving of cells, thereby optimizing goodput.The AcTM switches also need the appropriate hardware in order to support TAP. Therefore, we propose not only the buffer but also DMTE memory and a set of I/O tables that go with each AcTM port. It has been proved that these hardware requirements are realistic and viable and can be integrated in the active switches. We would also like to point out the multidisciplinary nature of this thesis in which the basis of the research is ATM protocol engineering, complemented by the innovative advantages that the software agents can provide. Nevertheless, the switches that we have finally managed to obtain could be regarded as within the field of specialized architectures; thus several modules of the prototype we have presented could be implemented as hardware components in order to optimize performance.Once the limitations of ATM technology in supporting guaranteed transfer have been identified, which is our principal objective, we describe the general motive for this research in environments where ATM is the basis of IP traffic. An NS (Network Simulator) has thus been used in order to study scenarios in which TAP protocol can significantly improve the already familiar TCP protocol.In order to study the performance of all these proposed improvements, we have used a TAP simulator, which has the advantages that Java language offers for the development of MAS and communication protocols. This simulator can define a variety of scenarios and analyse the results of the simulation of the prototype thus reaching a series of interesting conclusions. The simulations, via ON/OFF sources, analyse point-to-point and point-to-multipoint connections using classes, objects, threads, synchronizations and distributed processes carried out under Java.This dissertation has been organized in three parts in order to adequately structure the contents presented. Part I analyses the research related to this work; thus the first seven chapters describe the basic aspects of ATM technology. Each chapter briefly presents our contributions, which are studied in greater detail in Parts II and III.Thus, in Chapter 1 we point out the basic concepts of this technology and, in Chapter 2, we describe a taxonomy of architectures and protocols for ATM networks which will serve to identify our TAP proposal whose basic architecture is included at the end of the chapter.Chapter 3 deals with the concepts of reliability and GoS, with an emphasis on the latter since this is one of our proposals for the improvement of the general parameters of Quality of Service (QoS). Thus, we explain the mechanism, which is used in order to provide GoS to privileged sources.Following this, Chapter 4, deals with congestion control and fairness, which are applied to ATM switch entry queues. These concepts are also two basic aspects of our proposal to provide solutions to the problem of congestion at privileged sources, while -at the same time- guaranteeing fairness to those sources, which are not privileged. After studying the proposals that have already been published in this area of research, we present an outline of our QPWFQ (Queue PDU Weighted Fair Queueing) algorithm.In Chapter 5 we study the various congestion control mechanisms applied to switch buffers (that already exist) and, after analysing the most common proposals and solutions, we describe our EPDR (Early Packet Discard and Relay) algorithm inspired by EPD and which aims to attend the retransmission requests of congested PDUs.Chapter 6 reviews the literature on software agents designed for communication networks since we intend to explain the relevance of the MAS that we propose as a support for TAP. Thus, our objective is to obtain an active network formed by AcTMs switches whose architecture is outlined at the end of the chapter.In Chapter 7 we justify the distributive characteristics of the TAP protocol over a VPN (Virtual Private Network) formed by AcTMs nodes which exist side by side with non-active switches in the same network.Thus, in Part I we intend to justify our proposals by basing them on the fundamentals of the present technology.Part II describes the general motivation of this thesis, beginning with an analysis of the present limitations of ATM technology, which we propose to solve by using TAP. This part is divided into two chapters: Chapter 8 describes our general objectives whereby the control of congestion at the network nodes not only benefits native ATM traffic but can also be of use for such widespread protocols as TCP. We thus point out the advantages that TAP can provide for present-day networks.In Chapter 9 the limitations of ATM are discussed vis a vis the GoS parameter we have proposed and we explain how TAP can avoid such undesirable problems as PDU fragmentation, traffic interleaving, end-to-end retransmissions and the implosion of traffic sources.The objective of Part III is a comprehensive description of the solutions that we propose and, in the following four chapters, we provide a detailed description both of the architecture and of the protocol that goes with it.Chapter 10 describes the TAP distributed, multi-agent architecture, relating it to the ATM architectural model and analysing each of the hardware and software components of the AcTMs switches.Chapter 11 specifically focuses on the exhaustive description of the complete set of algorithms that make up the TAP protocol and therefore within the MAS which constitutes it. Moreover, the intuitive idea of making use of the periods of inactivity in the network in order to deal with the retransmissions of congested PDUs is formalized as a theory.In Chapter 12 we present the details of the implementation of the TAP simulator proposed as a prototype in order to analyse the results obtained under different scenarios. We argue in favour of the choice of Java language as a tool for the development of protocols and MAS and we then describe the methodology and the most important decisions concerning design as well as the most outstanding classes of Java used in the prototype. This chapter ends with an analysis of the most significant results of the simulations.Finally, Chapter 13 focuses on identifying future lines of action that would give continuity to the whole range of research which has been the object of study of this doctoral thesis.

Shape Memory Alloys (SMAs) have been demonstrated to be effective actuator elements in a wide range of applications, such as robotics, medicine, aerospace and automotive. Enabled by the unique thermo-mechanical properties of SMAs, these actuators offer the advantages of light weight, high power-to-weight ratio and a simple actuation mechanism compared to traditional actuator types. At the same time, the widespread adoption of the SMA actuator remains elusive as its low power efficiency and complex hysteretic behaviour often render it an impractical means of actuation. These actuators also exhibit a slow response speed and their response is highly sensitive to changes in the external environment, namely ambient temperature and mechanical stress, thus complicating their control. Position, force or temperature sensors may be used to facilitate feedback control, but at the cost of increasing the overall size and complexity of the system. The difficulties caused by the hysteretic behaviour can be largely avoided when SMA wires are used as on-off actuators, making SMAs well suited for such applications. However, they may still be subject to a wide range of dynamic operating conditions that would impact their actuation time, and achieving a consistent actuation time is often highly desirable. This thesis presents the synthesis of a nitinol SMA actuator control system which uses electrical resistance feedback to enable a fast response speed and robustness to disturbances in the external environment. A study of the resistance behaviour of SMAs is discussed first. The design of an adaptive controller and the experimental evaluation of its performance are described in detail next. The objective of the SMA actuator control system is to achieve a consistent and fast actuation time throughout the range of operating ambient temperature and stress. The control system is implemented experimentally and shown to be quite successful.

In this study, the shape memory response of Ni2MnGa and NiMnCoIn magnetic shape memory alloys was observed under compressive stresses. Ni2MnGa is a magnetic shape memory alloy (MSMA) that has been shown to exhibit fully reversible, stressassisted magnetic field induced phase transformation (MFIPT) in the I X-phase transformation because of a large magnetostress of 7 MPa and small stress hysteresis. The X-phase is a recently discovered phase that is mechanically induced, however, the crystal structure is unknown. To better understand the transformation behavior of Ni2MnGa single crystal with [100] orientation, thermal cycling and pseudoelasticity tests were conducted with the goal of determining the Clausius-Clapeyron relationships for the various phase transformations. This information was then used to construct a stresstemperature phase diagram that illustrates the stress and temperature ranges where MFIPT is possible, as well as where the X-phase may be found. NiMnCoIn is a recently discovered meta-magnetic shape memory alloy (MMSMA) that exhibits unique magnetic properties. The ferromagnetic parent phase and the paramagnetic martensite phase allow the exploitation of the Zeeman energy. To gain a better understanding of the transformation behavior of NiMnCoIn, thermal cycling and pseudoelasticity tests were conducted on single crystals from two different batches with crystallographic orientations along the [100](011), [087], and [25 7 15] directions. A stress-temperature phase diagram was created that illustrates the Clausius- Clapeyron relationships for each orientation and batch. SQUID tests revealed the magnetic response of the alloy as well as the suppression of the martensite start temperature with increasing magnetic field. Pseudoelasticity experiments with and without magnetic field were conducted to experimentally quantify the magnetostress as a function of magnetic field. For the first time, it has been shown that NiMnCoIn is capable of exhibiting magnetostress levels of 18-36 MPa depending upon orientation, as well as nearly 6.5% transformation strain in the [100] direction. The results of this study reveal increased actuation stress levels in NiMnCoIn, which is the main limitation in most MSMAs. With this increased blocking stress, NiMnCoIn is a strong candidate for MFIPT.

The incidence rate of chronic hepatopathy in Taiwan is high, which afflicts the patients by progressively developing irreversible cirrhosis. Hepatic fibrosis is the intermediate and crucial stage of this process, characterized by reversibility. If treated properly in this stage, cirrhosis can be successfully prevented. In the liver, activated stellate cells are the key mediators of fibrosis. Transforming growth factor-

Titanium-nickel is a unique class of material known as Shape Memory Alloy (SMA). A thermoelastic martensitic phase transformation is responsible for its extraordinary properties such as shape memory effect and superelasticity. The near equiatomic Ti-Ni alloys are the commercially most exploited SMAs because of the unique combination of these properties and superior ductility, strength, fatigue resistance and corrosion resistance. The properties of Ti-Ni SMAs are very sensitive to composition and the processing parameters. The properties of Ti-Ni SMAs can be modified to a great extent by choice of composition, mechanical working and heat treatment. Thermo-mechanical treatments are required to strengthen the matrix and improve the shape memory characteristics. Plastic deformation and subsequent annealing is the common way to improve shape memory properties. In the present study, Ti- 50 at% Ni wire specimens are produced and used for the investigation of the effect of different heat treatment and cold working processes on shape memory characteristics. To investigate the thermomechanical behavior of differently processed wire specimens, a fully computerized servo hydraulic thermomechanical testing machine was designed and constructed. Testing machine was capable to perform different types of tests that are selected by the user. It can both heat and cool the specimen automatically according to the testing sequence by applying DC current directly through the SMA wire or by sending liquid nitrogen into the cooling chamber. Temperature is measured by a K-type thermocouple directly mounted on the wire specimen with a glass tape. Force that is applied to the specimen is produced by hydraulic power unit with a double action cyclinder and it is controlled by a controller which takes the feedback from the loadcell and LVDT (Linear Variable Distance Transducer). During performig thermomechanical-tests all the data of loadcell, LVDT and thermocouple are collected by a data acqusition system integrated with a host computer that operates the program XPC Target. Ti-Ni alloy with equiatomic composition is prepared in vacum induction furnace. Specimen cast in the form of rod was then hot swaged. Subsequent to swaging, cold wire drawing, intermediate annealing at 500 &amp / #61616 / C and water quenching was applied to obtain SMA wire with a diameter of 1.52 mm. Ti-Ni wires produced were subjected to four different processes. All the samples were initially solution heat treated at 925 &amp / #61616 / C for 30 minutes prior to water quenching. Some of the samples were further treated by an intermediate anneal at 500 &amp / #61616 / C. To see the effect of cold working / prior to intermediate annealing, 20 % or 40 % cold work was applied to another group of specimens. To study the shape memory characteristics of specimens subjected to the above mentioned processes, four types of test, namely constant stress free recovery test, constant strain free recovery test, constant stress constrained recovery test and constant strain constrained recovery test, were designed and applied cyclically. The tests have shown that the stress plateau observed in the first cycle of the tests disappear upon cycling and the shape memory characteristics improve and stabilize with cycling. Once trained by cycling, fractional free recovery was observed to reach to 100 % and recovery stress to reach 120% of the applied stress if shape recovery is prevented.

No description available.

Valvular interstitial cells (VICs) are responsible for the maintenance of heart valve leaflet structure, however their responses to mechanical loading are not fully understood. Further characterization of VIC responses with regards to phenotype (quiescent or activated via ?-smooth muscle actin [?-SMA]) and communication (through gap junction proteins connexins 43 and 26) were studied. Tissue strips from porcine aortic, pulmonary, and mitral valves were cyclically stretched in the circumferential direction at normal and above normal membrane tensions for 48 hours at 1 Hz, 37°C, and 5% CO2. Unloaded tissues were statically incubated concurrently with loaded tissues, and fresh tissue controls were collected immediately. VIC phenotype was identified by ?- SMA via immunohistochemical staining and cell enumeration, as well as by gene expression via RT-PCR. Gap junction protein Cx43 was also evaluated via immunohistochemical staining and cell enumeration and by gene expression via RT-PCR, whereas Cx26 was evaluated using immunohistochemical staining and cell enumeration only. Within the range tested, it was found that mechanical loading did not affect ?-SMA or gap junction protein levels, nor were any differences in responses noted between valve types. However, the ?-SMA gene expression level was significantly lower in the mitral valve compared to the aortic and pulmonary valves. This may indicate a difference in the genetic response pathways among the valves, but not in the functional outcomes. This difference may be explained by embryological origins, since the mitral valve, unlike the aortic and pulmonary valves, contains only VICs and no neural crest cells.

Among the potential high temperature shape memory alloys, due to its low cost, medium ductility and high work output NiTiHf seems to be the most promising HTSMA for a wide range of applications in the 100-250ºC. A detailed investigation into the shape memory properties and transformation behavior for the Ni-rich HTSMA with the compositions of Ni45.3Cu5Ti29.7Hf20, Ni50.3Ti29.7Hf20 and Ni45.3Pd5Ti29.7Hf20 was carried out. It is possible to form Ni-rich precipitates in Ni-rich NiTiHf alloys and tailor the TTs by heat treatments that results in increased strength and stable response at high temperatures. The coherent Ni-rich precipitates deplete the Ni content from the matrix increasing the transformation temperatures and strengthen the material by hindering the dislocation motion. The effect of aging on the microstructure, shape memory and mechanical properties are revealed. Optimum aging conditions have been found determined to get the most favorable combination of high transformation temperatures with stable and good shape memory properties. The Ni50.3Ti29.7Hf20 and Ni45.3Pd5Ti29.7Hf20 aged at 500ºC-600 ºC were found to be formidable candidates for high temperature applications.

In this paper I will give a brief and general overview of the characteristics of spatial data, why it is useful to use such data and how to use the information included in spatial data. The first question to be answered is: how to detect spatial dependency and spatial autocorrelation in data? Such effects can for instance be found by calculating Moran's I, which is a measure for spatial autocorrelation. The Moran's I is also the basis for a test for spatial autocorrelation (Moran's test). Once we found some spatial structure we can use special models and estimation techniques. There are two famous spatial processes, the SAR- (spatial autoregressive) and the SMA- (spatial moving average process) process, which are used to model spatial effects. For estimation of spatial regression models there are mainly two different possibilities, the first one is called spatial filtering, where the spatial effect is filtered out and standard techniques are used, the second one is spatial two stage least square estimation. Finally there are some results of a spatial analysis of R&D spillovers data (for a panel dataset with 22 countries and 20 years) shown. (author's abstract) / Series: Research Report Series / Department of Statistics and Mathematics

Shape Memory Alloys (SMAs) have been demonstrated to be effective actuator elements in a wide range of applications, such as robotics, medicine, aerospace and automotive. Enabled by the unique thermo-mechanical properties of SMAs, these actuators offer the advantages of light weight, high power-to-weight ratio and a simple actuation mechanism compared to traditional actuator types. At the same time, the widespread adoption of the SMA actuator remains elusive as its low power efficiency and complex hysteretic behaviour often render it an impractical means of actuation. These actuators also exhibit a slow response speed and their response is highly sensitive to changes in the external environment, namely ambient temperature and mechanical stress, thus complicating their control. Position, force or temperature sensors may be used to facilitate feedback control, but at the cost of increasing the overall size and complexity of the system. The difficulties caused by the hysteretic behaviour can be largely avoided when SMA wires are used as on-off actuators, making SMAs well suited for such applications. However, they may still be subject to a wide range of dynamic operating conditions that would impact their actuation time, and achieving a consistent actuation time is often highly desirable. This thesis presents the synthesis of a nitinol SMA actuator control system which uses electrical resistance feedback to enable a fast response speed and robustness to disturbances in the external environment. A study of the resistance behaviour of SMAs is discussed first. The design of an adaptive controller and the experimental evaluation of its performance are described in detail next. The objective of the SMA actuator control system is to achieve a consistent and fast actuation time throughout the range of operating ambient temperature and stress. The control system is implemented experimentally and shown to be quite successful.