Due to the lack of feedback networks, digital class D amplifiers operating in open loop typically have inferior performance when compared to analog class D amplifiers in closed loop configuration. This thesis presents an integrated distortion suppression circuit design for digital class D amplifiers, which forms a feedback loop around the output stage. This circuit suppresses the output stage distortion and noise by equalizing the modulator effective duty ratio and the output stage effective duty ratio. The suppression circuit is integrated with the class D modulator. An integrated class D amplifier output stage is implemented separately using a 0.35μm HV-CMOS technology. Experimental results confirm that the closed loop PSRR is improved by 15dB. The THD+N value is reduced by a factor of 2 to 30. The minimum THD+N is 0.03%, which is among the state of the art class D amplifiers.

In switched-mode power supplies (SMPS), a Controller is required for output voltage or current regulation. In low-power SMPS, processing power from a fraction of watt to several hundred watts, digital implementations of the controller, i.e. digital controllers have recently emerged as alternatives to the predominately used analog systems. This is mostly due to the better design portability, power management capability, and the potential for implementing advanced control techniques, which are not easy to realize with analog hardware. However, the existing digital implementations are barely functional replicas of analog designs, having comparable dynamic performance if not poorer. Due to stringent constraints on hardware requirements, the digital systems have not been able to demonstrate some of their most attractive features, such as parameter estimation, controller auto-tuning, and nonlinear time-optimal control for improved transient response. This thesis presents two novel digital controllers and systems. The first is an auto-tuning controller that can be implemented with simple hardware and is suitable for IC integration. The controller estimates power stage parameters, such as output capacitance, load resistance, corner frequency and damping factor by examining the amplitude and frequency of intentionally introduced limit cycle oscillations. Accordingly, a digital PID compensator is automatically redesigned and the power stage is adapted to provide good dynamic response and high power processing efficiency. Compared to state of the art analog solutions, the controller has similar bandwidth and improves overall efficiency. To break the control bandwidth limitation associated with the sampling effects of PWM controllers, the second part of the thesis develops a nonlinear dual-mode controller. In steady state, the controller behaves as a conventional PWM controller, and during transients it utilizes a continuous-time digital signal processor (CT-DSP) to achieve time-optimal response. The processor performs a capacitor charge balance based algorithm to achieve voltage recovery through a single on-off sequence of the power switches. Load transient response with minimal achievable voltage deviation and a recovery time approaching physical limitations of a given power stage is obtained experimentally.

The relentless growth in size and complexity of semiconductor devices over the last decades continues to present new challenges to the electronic design community. Today, functional debugging is a bottleneck that jeopardizes the future growth of the industry as it can account for up to 30% of the overall design effort. To alleviate the manual debugging burden for industrial problems, scalable, practical and robust automated debugging solutions are required. This dissertation presents novel techniques and methodologies to bridge the gap between current capabilities of automated debuggers and the strict industry requirements. The contributions proposed leverage powerful advancements made in the formal method community, such as model checking and reasoning engines, to significantly ease the debugging effort. The first contribution, abstraction and refinement, is a systematic methodology that reduces the complexity of debugging problems by abstracting irrelevant sections of the circuits under analysis. Powerful abstraction techniques are developed for netlists as well as hierarchical and modular designs. Experiments demonstrate that an abstraction and refinement methodology requires up to 200 times less run-time and 27 times less memory than a state-of-the-art debugger. The second contribution, Bounded Model Debugging (BMD), is a debugging methodology based on the observation that erroneous behaviour is more likely caused by errors excited temporally close to observation points. BMD systematically generates a series of consecutively larger yet more complete debugging problems to be solved. Experiments show the effectiveness of BMD as 93% of the large problems are solved with BMD versus 34% without BMD. A third contribution is an automated debugging formulation based on maximum satisfiability. The formulation is used to build a powerful two step, coarse and fine grained debugging framework providing up to 980 times performance improvements. The final contribution of this thesis is a trace reduction technique that uses reachability analysis to identify the observed failure with fewer simulation events. Experiments demonstrate that many redundant state transitions can be removed resulting in traces with up to 100 times fewer events than the original.

Static Single Assignment (SSA) is an Intermediate Representation (IR) that simplifies the design and implementation of analyses and optimizations. While intraprocedural SSA is ubiquitous in modern compilers, the use of interprocedural SSA (ISSA), although seemingly a natural extension, is limited. In this dissertation, we propose new techniques to construct and integrate ISSA into modern compilers and evaluate the benefit of using ISSA form. First, we present an algorithm that converts the IR into ISSA form by introducing new instructions. To our knowledge, this is the first IR-based ISSA proposed in the literature. Moreover, in comparison to previous work we increase the number of SSA variables, extend the scope of definitions to the whole program, and perform interprocedural copy propagation. Next, we propose an out-of-ISSA translation that simplifies the integration of ISSA form into a compiler. Our out-of-ISSA translation algorithm enables us to leverage ISSA to improve performance without having to update every compiler pass. Moreover, we demonstrate the benefit of ISSA for a number of compiler optimizations. Finally, we present an ISSA-based interprocedural induction variable analysis. Our implementation introduces only a few changes to the SSA-based implementation while enabling us to identify considerably more induction variables and compute more loop trip counts.

One goal of this thesis is to address several challenging compact antenna design issues by using transmission-line metamaterials. In particular, we demonstrate the design of a compact antenna with an extended bandwidth, multiband/multifunction compact/small antennas, and mutual-coupling reduction for two closely-spaced small antennas. The proposed compact transmission-line metamaterial antenna employs the concept of zeroth- index resonance and a wideband characteristic is enabled by detuning the resonance of each constituent metamaterial unit cell at a slightly different frequency, thus creating a multi-resonant return-loss passband. Furthermore, a single-cell transmission-line metamaterial loading scheme is applied to regular printed monopole antennas in order to introduce additional resonances at the low band and create multiband small antennas that meet the specifications for WiFi and WiMAX applications. Lastly, a simple ap- proach for reducing the mutual coupling in two closely-spaced small antennas is also presented, based on the idea of self-cancelation of the induced currents. The other important goal of this thesis is to develop volumetric negative-refractive- index transmission-line (NRI-TL) metamaterials. A volumetric NRI-TL slab is created by stacking 2D NRI transmission-line grids in the shunt-node configuration. This is done in a simple manner through images induced in a parallel-plate environment. Additional vias are strategically placed to suppress the parasitic parallel-plate mode. Moreover, multiconductor transmission-line theory is used to model the volumetric metamaterial slab. A fully-printed volumetric Veselago-Pendry transmission-line lens is designed and matched to free space. Using this proposed lens, it has been experimentally verified that the diffraction limit can be overcome.

This thesis presents a new family of converters for high power interconnection of dc buses with different voltage levels. Proposed converters achieve high voltage dc-dc conversion without an intermediate ac conversion stage. This function is implemented without series connection of active switches, or the use of isolation transformers. The salient features of proposed converters are (i) design and construction simplicity, (ii) low switching losses through soft turn-on and soft turn-off, (iii) single stage dc-dc conversion without high-current chopping, (iv) modular structure, (v) equal voltage sharing among the converter modules. Three converter circuits are investigated. The first performs unidirectional power transfer from a dc bus with higher voltage to a dc bus with lower voltage. The second performs unidirectional power transfer from a dc bus with lower voltage to a dc bus with higher voltage. Both converters are suitable for interconnecting single pole dc buses with same polarity, or double pole dc buses. A third converter is also presented which performs the function of either the first or the second converter with polarity reversal. The third converter is suitable for interconnecting single pole dc buses with different polarities, or double pole dc buses. By hybrid integration of the proposed three converters, the thesis also investigates other topologies for bidirectional power transfer between two dc buses. Proposed converters operate only in discontinuous conduction mode and exhibit soft switching operation for the active and passive switches. A common feature between the proposed converters is the self current turn-off for the active switches at zero voltage. This allows the use of thyristors as active switches alleviating their reverse recovery losses. For each converter topology, the structure is presented, its operation principle is explained and a complete set of design equations are derived. Comparisons are performed on high-power and high-voltage design examples. The merits and limitations of each converter are concluded. Practical considerations regarding components selection, loss analysis, filter design and the non-idealities of the circuits are studied. Experimental implementation of scaled-down laboratory prototypes is presented to provide a proof of concept and validate the operation principle of the proposed converter topologies.

As biometric recognition becomes increasingly popular, the fear of circumvention, obfuscation and replay attacks is a rising concern. Traditional biometric modalities such as the face, the fingerprint or the iris are vulnerable to such attacks, which defeats the purpose of biometric recognition, namely to employ physiological characteristics for secure identity recognition. This thesis advocates the use the electrocardiogram (ECG) signal for human identity recognition. The ECG is a vital signal of the human body, and as such, it naturally provides liveness detection, robustness to attacks, universality and permanence. In addition, ECG inherently satisfies uniqueness requirements, because the morphology of the signal is highly dependent on the particular anatomical and geometrical characteristics of the myocardium in the heart. However, the ECG is a continuous signal, and this presents a great challenge to biometric recognition. With this modality, instantaneous variability is expected even within recordings of the same individual due to a variety of factors, including recording noise, or physical and psychological activity. While the noise and heart rate variations due to physical exercise can be addressed with appropriate feature extraction, the effects of emotional activity on the ECG signal are more obscure. This thesis deals with this problem from an affective computing point of view. First, the psychological conditions that affect the ECG and endanger biometric accuracy are identified. Experimental setups that are targeted to provoke active and passive arousal as well as positive and negative valence are presented. The empirical mode decomposition (EMD) is used as the basis for the detection of emotional patterns, after adapting the algorithm to the particular needs of the ECG signal. Instantaneous frequency and oscillation features are used for state classification in various clustering setups. The result of this analysis is the designation of psychological states which affect the ECG signal to an extent that biometric matching may not be feasible. An updating methodology is proposed to address this problem, wherein the signal is monitored for instantaneous changes that require the design of a new template. Furthermore, this thesis presents the enhanced Autocorrelation- Linear Discriminant Analysis (AC/LDA) algorithm for feature extraction, which incorporates a signal quality assessment module based on the periodicity transform. Three deployment scenarios are considered namely a) small-scale recognition systems, b) large-scale recognition systems and c) recognition in distributed systems. The enhanced AC/LDA algorithm is adapted to each setting, and the advantages and disadvantages of each scenario are discussed. Overall, this thesis attempts to provide the necessary algorithmic and practical framework for the real-life deployment of the ECG signal in biometric recognition.

Thermoelectric modules are an important alternative to heat engines in the harvesting of waste heat. Electrical-thermal analogues are often employed when studying heat conduction and this analogue can be extended to develop an equivalent circuit for thermoelectric effects. For the primarily one-dimensional problem of thermoelectricity, the equations can be discretized to create a simple mathematical model. In this document, such a model is developed from first principles and show that the electro-thermal coupling is properly in- corporated. The results of simulations using the model are then presented and validated experimentally. Furthermore, in one possible application of thermoelectric modules, a self-contained cooling unit with an integrated thermoelectric generator is designed. By performing fluid dynamics simulations on a fan and heat sink model, the geometry and operating conditions can be optimized and the start-up and transient characteristics are studied.

Graphene is a single atomic layer of graphite and has many extraordinary properties. Many graphene based applications have been proposed in recent years and the need of a time domain simulation tool for studying graphene based devices emerges. This thesis focuses on developing a simulation framework for graphene based devices using finite-difference time-domain (FDTD) method. Formulation for a perfectly matched layer (PML) for the sub-cell FDTD method for thin dispersive layers has been derived and implemented. Such a PML is useful when thin layers extend to the boundaries of the computational domain. Using the sub-cell PML formulation to model the graphene thin layers significantly reduces the computational cost compared to using the conventional FDTD. The proposed formulation is accompanied by detailed validation and error analysis studies. Several graphene applications are simulated using the new framework and the results show good agreement with the respective analytical models.

Optical sensing for imaging applications has traditionally been enabled by single-crystalline photodetectors. This approach has dramatically curtailed monolithic integration of a variety of optically-sensitive materials onto silicon read-out circuits. The advent of solution-processed optoelectronic materials such as colloidal quantum dots offers the potential of a revolution in optoelectronics. Their solution-processibility enables low-cost monolithic integration with an arbitrary substrate. This dissertation presents the first high-sensitivity solution-processed photodetectors. It does so by leveraging the high degree of control offered by nanoscale materials engineering. Material processing routes are developed to achieve sufficient carrier mobility and sensitization that lead to high photoconductive gain up to 10^3 A/W, observed for the first time in soft materials. A method to remove charge-transport-inhibiting moieties from the nanocrystal surface is developed. Surface treatment procedures are then advanced to prolong the carrier lifetime and thus sensitize the material. The sequence of these processing stages is crucial for the noise performance of the device. Processing conditions that lead to high photoconductive gain and low noise current are then reported to achieve highly sensitive photodetectors with reported D* on the order 10^13 Jones. The spectral tunability offered by colloidal quantum dots enables monolithic multispectral photodetectors. The material challenges, imposed by the behaviour of matter in the nanoscale, are addressed to report sensitive photodetectors in the visible and infrared parts of spectrum. Carrier lifetime determines the temporal response of a photoconductor. The abundance of trap states on the nanocrystal surface and their associated carrier lifetimes mandate careful attention in order to preserve the trap states that yield temporal response acceptable for imaging applications. It is shown for the first time that the temporal response of a quantum dot photoconductor can be tailored by careful control over surface chemistry. Materials species were identified as responsible for particular photocurrent temporal components. These findings are then exploited to isolate and remove surface species responsible for undesirably long time constants. A solution-processed photoconductive detector is reported that exhibits high sensitivity (D* ~10^12 Jones) and temporal response of 25 ms, suitable for imaging applications.