One potential method of improving the reliability and accuracy of instrumentation is to employ a microprocessor as an intelligent voter, or combiner, within a redundant measurement system. Several measurement channels are used to monitor the same quantity and the processor forms a single, more accurate and reliable, output from the information gained from all of the channels. A microprocessor makes it possible to implement combining techniques that are not feasible using conventional hardwired circuitry. A number of such combining algorithms are identified and their performance, in the presence of varying levels of additive Gaussian noise, is analysed. Several methods are proposed for reducing systematic error by using the information that can be gained from comparing channels. It is shown that the probability of being in an undetected failed state can also be improved. The trade offs between performance and the resources that are required to implement the proposed techniques, are thoroughly investigated. Empirical performance is compared with theoretical predictions and practical difficulties are identified.

There is a category of applications where cantilevered servomechanisms mounted on mobile platforms have to maintain very precise position in inertial space. These systems often referred to as stabilised or line of sight systems have to maintain precise orientation in inertial space in presence of linear and angular external disturbances. Stabilised systems, in general, are designed as balanced systems such that the pivot or centre of rotation coincides with the centre of gravity of the equipment. The research presented in this thesis investigates a general case of stabilising an out-of-balance mechanism; a balanced mechanism is a special case of these systems. The motivation for the research is to remove the requirement for balanced mechanisms enabling engineers to design more effective systems, both in terms of performance and costs, for future needs.

This thesis presents a novel approach to automatic transient fault location in Low Voltage Underground Distribution Networks (LVUDN). A transient fault is the first stage of development of a fault condition which is indicative of a threat to power network security, but is not significant enough to trip the protection system. The proposed approach is based on time domain reflectometry (TDR), enhanced by pulse compression, wavelet transform and adaptive filters. The thesis provides a review of the properties of faults in LVUDN and of the characteristics of typical underground cables used in LVUDN. Advantages and restrictions of existing fault location techniques were discussed. Advanced signal processing tools such as pulse compression, adaptive filter and wavelet transform were also investigated. A pulse compression enhanced TDR acquisition methodology was developed and a self-comparing scheme was proposed to detect the timely change of the enhanced TDR waveform, thereby providing the corresponding required deviation-threshold to trigger the system and finally to calculate the fault distance. The pulse-compression technique provides better resolution and detection range, and side lobes are suppressed by applying wavelet transform. The deviation trigger is further enhanced by adaptive filtering for better noise rejection. A fully-customised, prototype fault locator and software were developed to implement the pulse compression, wavelet transform and adaptive based automatic transient fault location system. The prototype fault locator was tested in a live LVUDN and the results were evaluated.

Phase-Locked Loop based frequency synthesis is an essential technique employed in wireless communication systems for local oscillator generation. The ultimate goal in any design of frequency synthesisers is to generate precise and stable output frequencies with fast switching and minimal spurious and phase noise. The conflict between high resolution and fast switching leads to two separate integer synthesisers to satisfy critical system requirements. This thesis concerns a new sigma-delta fractional-N synthesiser design which is able to be directly modulated at high data rates while simultaneously achieving good noise performance. Measured results from a prototype indicate that fast switching, low noise and spurious free spectra are achieved for most covered frequencies. The phase noise of the unmodulated synthesiser was measured −113 dBc/Hz at 100 kHz offset from the carrier. The intermodulation effect in synthesisers is capable of producing a family of spurious components of identical form to fractional spurs caused in quantisation process. This effect directly introduces high spurs on some channels of the synthesiser output. Numerical and analytic results describing this effect are presented and amplitude and distribution of the resulting fractional spurs are predicted and validated against simulated and measured results. Finally an experimental arrangement, based on a phase compensation technique, is presented demonstrating significant suppression of intermodulation-borne spurs. A new technique, pre-distortion noise shaping, is proposed to dramatically reduce the impact of fractional spurs in fractional-N synthesisers. The key innovation is the introduction in the bitstream generation process of carefully-chosen set of components at identical offset frequencies and amplitudes and in anti-phase with the principal fractional spurs. These signals are used to modify the Σ-Δ noise shaping, so that fractional spurs are effectively cancelled. This approach can be highly effective in improving spectral purity and reduction of spurious components caused by the Σ-Δ modulator, quantisation noise, intermodulation effects and any other circuit factors. The spur cancellation is achieved in the digital part of the synthesiser without introducing additional circuitry. This technique has been convincingly demonstrated by simulated and experimental results.

This thesis describes research on the design of quantum logic circuits suitable for the experimental demonstration of a three-qubit quantum computation prototype. The design is based on a proposal for optically controlled, solid-state quantum logic gates. In this proposal, typically referred to as SFG model, the qubits are stored in the electron spin of donors in a solid-state substrate while the interactions between them are mediated through the optical excitation of control particles placed in their proximity. After a brief introduction to the area of quantum information processing, the basics of quantum information theory required for the understanding of the thesis work are introduced. Then, the literature on existing quantum computation proposals and experimental implementations of quantum computational systems is analysed to identify the main challenges of experimental quantum computation and typical system parameters of quantum computation prototypes. The details of the SFG model are subsequently described and the entangling characteristics of SFG two-qubit quantum gates are analysed by means of a geometrical approach, in order to understand what entangling gates would be available when designing circuits based on this proposal. Two numerical tools have been developed in the course of the research. These are a quantum logic simulator and an automated quantum circuit design algorithm based on a genetic programming approach. Both of these are used to design quantum logic circuits compatible with the SFG model for a three-qubit Deutsch-Jozsa algorithm. One of the design aims is to realise the shortest possible circuits in order to reduce the possibility of errors accumulating during computation, and different design procedures which have been tested are presented. The tolerance to perturbations of one of the designed circuits is then analysed by evaluating its performance under increasing fluctuations on some of the parameters relevant in the dynamics of SFG gates. Because interactions in SFG two-qubit quantum gates are mediated by the optical excitation of the control particles, the solutions for the generation of the optical control signal required for the proposed quantum circuits are discussed. Finally, the conclusions of this work are presented and areas for further research are identified.

Consumer needs for mobile devices include the requirement for longer battery life, so that recharging can be performed less frequently or eliminated completely. To this end a key component of any mobile system is a high power and high energy density battery. An alternative to better batteries is for mobile devices to harvest some of their own energy. Solar energy is an accessible, free and environmentally friendly source of energy, making it ideal for powering mobile devices. In this work we present a low deposition temperature (150°C), thin-film solar power harvesting system. Low deposition temperature of thin film silicon and associated alloys allows for fabrication on plastic in order to realize lightweight and robust integrated systems. The system consists of a thin film transistor (TFT) circuit and thin film photovoltaic (PV) array. The circuit functions as a simple DC-DC regulator and maximum power point tracking unit (MPPT). Amorphous silicon (a-Si:H) is used as the primary thin-film material for the fabrication of the devices. One of the challenges when fabricating devices at low temperatures is the high defect density in a-Si:H due to hydrogen clustering. In here the He in addition to the SiH4 and H2 is used to minimise hydrogen clustering. Using the optimised films, TFT and PV devices are fabricated, and analysed. Low deposition temperatures influence TFT properties. Contact resistance and dynamic instability of TFTs are considered. New extraction methods and their effect on device mobility are presented. A power conditioning TFT circuit is proposed. A model is developed to analyse the circuit’s output stability as a function of stressing and light intensity. System efficiency and its dependence on circuit efficiency and solar cell utilisation are discussed. The PV array and the TFT circuit are fabricated using lithography techniques, with a maximum process temperature of 150°C. The circuit can provide a degree of output power stability over a wide range of light intensities and stressing times, making it suitable for use with SC. In this work peak system efficiency of 18% is achieved. Despite the circuit’s low efficiency, it has the advantage of fabrication on plastic substrates and better integrability within mobile devices.

Deep Brain Stimulation (DBS) is a clinical tool used to treat various neurological disorders, including tremor, Parkinson’s disease (PD) and dystonia. Today’s routine use of this therapy is a result of the pioneering work of Benabid and colleagues, who assessed the benefits of applying high-frequency stimulation to the ventral intermediate nucleus and reported substantial long-term improvements in PD patients. Clinical applications of DBS, however, have preceded research and left a number of challenges to optimise this therapeutic technique in terms of quality, therapy costs and understanding of its underlying mechanisms. DBS is based on monopolar or bipolar stimulation techniques, which are characterised by a limited control over the effects of stimulation and, in particular, over the shape and direction of the electric field propagating around the electrode. This thesis proposes two approaches to achieve dynamic electric field control during deep brain stimulation. The first method is based on the use of current-steering multipolar electrode drive, adopted to split the stimulation current between 2 or more contacts, in order to shift the stimulation field to a desired location. The work included the design, development and testing of an integrated circuit current-steering tripolar current source, developed in AMS 0.35μm technology. The second method is based on the use of phased arrays (PAs) in order to create an electromagnetic beam, which can be steered to a desired location. Computational models have shown the ability to steer and focus the electromagnetic fields in brain tissue by varying the phase and frequency of stimulation. Modelling simulations have shown that the use of multipolar electrode configurations is essential to achieve dynamic control over the shape and area of tissue stimulated. Configurations with larger number of cathodes allow for several stimulation patterns, making this stimulation approach beneficial in a clinical environment. Tests on the performance of the integrated tripolar current source have shown its capability to generate stimulation currents up to 1.86mA, to linearly steer the stimulation current to one of the anodes and to generate biphasic square and exponential current pulses, with time constant up to 28ms. In vitro experiments, carried out to map the electric potential generated by a dynamic tripolar current source, validated the model results, by showing the ability to shape the potential distribution around the electrode during stimulation. Finally, models of the behaviour of PA fields in brain tissue have shown that PAs could be introduced to DBS to allow for more accurate field steering and shaping in DBS. This thesis presents methods and implementations to achieve dynamic field shaping in DBS, which can greatly ameliorate the efficacy of clinical DBS.

This thesis describes a detailed characterization of the atomic scale properties of individual donor atoms in silicon. A cross sectional sample preparation technique was developed, allowing us to study cleaved silicon surfaces using scanning tunnelling microscopy (STM). The Si(111)-2x1 surface is characterized and in particular the properties of anti phase boundaries are investigated. We identify a strain induced band shift associated with the boundaries and furthermore show that they can be controllably manipulated, making them an ideal model system to study and control strain in silicon at the atomic scale. To enable the characterization of individual deep dopants such as bismuth (Bi), which are not used in semiconductor industry, a novel STM sample preparation method was developed. We demonstrate that ion implantation can be used to produce almost defect free samples with high Bi concentrations, suitable for STM measurements. Using cross sectional STM we are furthermore able to laterally resolve the implanted dopant profile and visualize its influence on the band structure of the silicon host crystal. The new sample preparation method is used to investigate the fundamental properties of different group V dopants at the atomic scale. We identify individual bismuth and antimony donors in the Si(111)-2x1 surface and show that their large dopant cores not only induce new atomic reconstructions but also influence the measured charge states. Using scanning tunnelling spectroscopy we furthermore resolve the Coulomb potential well of individual dopants and characterize the influence of surface states on charge screening at the atomic scale. In addition to the described STM work, a state of the art cleanroom fabrication process was developed to allow the placement of individual dopants in silicon with atomic scale precision. This will enable the use of the insights gained about individual donors in this thesis for the fabrication of future single dopant devices.

The multifunction radar, aided by advances in electronically steered phased array technology, is capable of supporting numerous, differing and potentially conflicting tasks. However, the full potential of the radar system is only realised through its ability to automatically manage and configure the finite resource it has available. This thesis details the novel application of agent systems to this multifunction radar resource management problem. Agent systems are computational societies where the synergy of local interactions between agents produces emergent, global desirable behaviour. In this thesis the measures and models which can be used to allocate radar resource is explored; this choice of objective function is crucial as it determines which attribute is allocated resource and consequently constitutes a description of the problem to be solved. A variety of task specific and information theoretic measures are derived and compared. It is shown that by utilising as wide a variety of measures and models as possible the radar’s multifunction capability is enhanced. An agent based radar resource manager is developed using the JADE Framework which is used to apply the sequential first price auction and continuous double auctions to the multifunction radar resource management problem. The application of the sequential first price auction leads to the development of the Sequential First Price Auction Resource Management algorithm from which numerous novel conclusions on radar resource management algorithm design are drawn. The application of the continuous double auction leads to the development of the Continuous Double Auction Parameter Selection (CDAPS) algorithm. The CDAPS algorithm improves the current state of the art by producing an improved allocation with low computational burden. The algorithm is shown to give worthwhile improvements in task performance over a conventional rule based approach for the tracking and surveillance functions as well as exhibiting graceful degradation and adaptation to a dynamic environment.

Low-power Digital Signal Processing (DSP) circuits are critical to commercial System-on-Chip design for battery powered devices. Dynamic Voltage Scaling (DVS) of digital circuits can reclaim worst-case supply voltage margins for delay variation, reducing power consumption. However, removing static margins without compromising robustness is tremendously challenging, especially in an era of escalating reliability concerns due to continued process scaling. The Razor DVS scheme addresses these concerns, by ensuring robustness using explicit timing-error detection and correction circuits. Nonetheless, the design of low-complexity and low-power error correction is often challenging. In this thesis, the Razor framework is applied to fixed-precision DSP filters and transforms. The inherent error tolerance of many DSP algorithms is exploited to achieve very low-overhead error correction. Novel error correction schemes for DSP datapaths are proposed, with very low-overhead circuit realisations. Two new approximate error correction approaches are proposed. The first is based on an adapted sum-of-products form that prevents errors in intermediate results reaching the output, while the second approach forces errors to occur only in less significant bits of each result by shaping the critical path distribution. A third approach is described that achieves exact error correction using time borrowing techniques on critical paths. Unlike previously published approaches, all three proposed are suitable for high clock frequency implementations, as demonstrated with fully placed and routed FIR, FFT and DCT implementations in 90nm and 32nm CMOS. Design issues and theoretical modelling are presented for each approach, along with SPICE simulation results demonstrating power savings of 21 – 29%. Finally, the design of a baseband transmitter in 32nm CMOS for the Spectrally Efficient FDM (SEFDM) system is presented. SEFDM systems offer bandwidth savings compared to Orthogonal FDM (OFDM), at the cost of increased complexity and power consumption, which is quantified with the first VLSI architecture.