The drive by the manufacturers and designers of integrated circuits towards smaller dimensions has led to ever increasing demands being placed on the vendors of semiconductor equipment. In the photolithography arena this has meant producing optical projection systems with improved resolution approaching 0.2μm and layer to layer registration to better than 50nm. In order to monitor these processes, metrology equipment must be capable of tracking changes in the above areas. Traditionally, optical techniques have been utilised for several reasons, namely their cost, high throughput and ease of use. The drive however, towards circuit dimensions which are equal to the wavelength of the illuminating light has reduced the appeal of optical tools to be used at these dimensions. The ability to get as close as possible to the theoretical limit is of benefit to the users and manufacturers of metrology equipment in that the useful life of optical metrology tools can be increased. This has been achieved by examining and implementing various new algorithms developed for the coherence probe microscope, the aim of which is to improve the measuring ability and extract more information from the complex signal that the microscope produces. Three areas have been examined, the first was the effect of a pathlength offset on the microscope, which moves the coherence region away from the focal plane of the objective lens. The results from this show a substantial improvement in the repeatability of the measurements from the bottom of trenches. The second area is that of profile extraction, in particular that of a photoresist profile after development. The ability to extract profile information from an optical tool is of great use to a lithography engineer as it negates the need to destructively cross section the sample. Thirdly, the area of general algorithms for measurement of critical dimensions has been investigated and several other schemes for measurement have been proposed.

Conventional ion selective electrodes are briefly reviewed, with particular reference to the pH sensitive glass electrode, and the benefits which might result from the application of microelectronic techniques to electrode manufacture are noted. It is shown that microelectronic 'transducers' may conveniently be classified into two general categories, described as the 'potentiometric' type and the 'field effect' type, and certain constructional and operational advantages of the former type are suggested. The theory of membrane potentials is critically reviewed and the relationship between such well known phenomena as the 'Donnan potential', the 'liquid junction potential' and the 'glass membrane potential' is discussed. A model is proposed for the operation of the 'Ion Sensitive Field Effect Transistor', (a transducer of the 'field effect' type) by drawing upon the theories of the glass electrode and the conventional 'Insulated Gate Field Effect Transistor'. The-fabrication of 'field effect' type devices is described and the results of measurements on them are reported. It is noted that a clear understanding of the mechanism and stability of solid state contacts to ion selective materials is necessary for the development of sensors of the 'potentiometric' type. To this end, an experimental structure has been devised to allow measurement of the pH sensitivity and stability of metal connected glass electrode cells. Severe problems are caused by electrical leakage effects but a satisfactory structure has been achieved and might have application in the manufacture of conventional glass membrane electrodes. The results of measurements on metal connected devices show that Nernstian pH responses are obtainable and that cell potentials are fairly stable over periods of several weeks. Improvements to the measurement techniques are required in order to investigate further the long term stability and temperature sensitivity of the devices. Suggestions are made for further research into the mechanism of the solid contact and into fabrication methods for the devices. It is expected that the method of construction developed here will be applicable to this work.

The shrinking dimensions of silicon microcircuits have reached the point where the vertical and lateral features are comparable in size. The consequence can be seen in each aspect of the manufacture of devices. The 2D layout of the physical routing becomes a convoluted maze when put into fabrication. The diminishing dimensions have focused greater attention on the edge effects since these play a proportionately greater role in the device performance. The consequences of the edge interactions can be categorised into two sections: those on the silicon surface and those on the subsequent layers. The MOS transistor is directly impacted by the silicon surface profile. A fundamental parameter is the transistor width, which until recently has received little attention. This thesis correlates the different definitions commonly used, and investigates the impact of the individual processing parameters on the surface topography and consequently on the transistor width. Different measurement techniques are used and a novel extraction process is proposed. The weakness of the current generic electrical extraction technique is exposed and recommendations made to overcome this. Further work on SEM sample preparation and processing is presented.

Carbon nanotubes (CNTs) have been chemically functionalised for electronic device applications using plasma exposure processes. Two areas of CNT device have been investigated. Firstly the conversion of the inherent p=type field effect behaviour of the CNTs to n-type field effects behaviour and secondly to control the positioning of CNTs on a substrate. To convert CNTs from p-type to n-type semiconductors, the chemically unreactive CNTs have been functionalised by exposure to fluorinated plasmas, both CF₄ and SF₆. Further functionalisation with 1,2-diaminoethane was then employed on functionalised CNTs exposed to a CF₄ plasma at low bias conditions, the purpose of the amine molecule is to donate electrons to the CNTs. X-ray photoelectron spectroscopy (XPS) and Raman spectroscopy have confirmed both the presence of fluorine and nitrogen on the CNT surface as well as the structural integrity of the CNTs. The functionalisation mechanism was seen to depend on the ionic current density and the fluorine plasma during the initial fluorine exposure stages. Electronic characterisation of the plasma fluorinated and the 1,2-diaminoethane functionalised CNTs in backgated geometry was then applied with randomly distributed CNTs on gold electrodes. The fluorinated CNTs have exhibited p-type field dependent behaviour in air, whilst the aminated CNTs have begun to show indication of n-type field dependent behaviour. The second process used molecular stamping of 2-thiolpyridine using poly(dimethylsiloxane) (PDMS) stamps; a method which allows applications for both pristine and functionalised CNTs. Molecular stamping of 2-thiolpyridine using poly(dimethylsiloxane) (PDMS) stamping techniques, have been developed to self-assemble CNTs over a substrate and onto predefined electrode structures. By optimising the concentration of 2-thiolpyridine in ethanol and using a dilute suspension of CNTs in 1,2-dichloroethane, CNTs could be self-assembled using two similar fabrication processes. The molecular stamping experiments have confirmed that altering the order of the steps within the fabrication process, to have CNTs on top of electrodes or underneath electrodes, can control the field dependent qualities of devices in a limited gate voltage range. The limiting factor to device reproducibility is the ability to produce homogeneous CNT solutions. With control over the CNT chirality and suspension it is predicted the molecular stamping methods would be a fast and reliable process for high yield CNT devices.

A systolic array is essentially a parallel processor which consists of a grid of locally-connected sub-processors which receive, process and pump out data synchronously in such a way that the patterns of data-flow to and from each processor is identical to the flow to and from the other processors. Such arrays are repetitive and modular and require little length of communication interconnection, so that they are relatively simple to design and are amenable to efficient VLSI implementation. The systolic architecture has been found suitable for implementing many of the algorithms used in the field of signal- and image-processing. A formal design method is a precisely defined method which, if followed, will yield a design satisfying a given specification. Such a method is amenable to proof that, if the method terminates, then the output design is valid. When proven correct, such methods are useful for designing equipment which is safety-critical or where a design fault discovered after manufacture would be expensive. This thesis presents a formal design method for implementing certain signal-processing and other algorithms as systolic arrays. As a necessary preliminary to the method, a calculus is defined. The basic concept, that of a 'computation', is powerful enough to express both abstract algorithms and those whose suboperations have been assigned a place and a time to execute. Computations may be composed or abstracted (by having variables hidden) or may have their variables renamed. The 'implementation' of one computation by another is defined. Using this calculus it is possible to formalise concepts like 'dependency' (of data or control) and 'system or recurrence equations', which often appear in the literature on systolic array design. The design method is then presented. It consists of four stages, pipelining of data dependencies, scheduling, pipelining of the control variables and allocation of subprocessors to the subcomputations.

Microelectromechanical systems (MEMS) can provide an interface between the digital electronic world and the analog physical world. Depended on the transduction mechanisms, various micromechanical structures are designed to ensure the transductions with highest efficiency. As a consequence, MEMS devices have to be fabricated using a broad range of techniques, and often require integration with the CMOS circuitry. The feasibility of a new fabrication approach has been investigated in this thesis, which uses chemical mechanical polishing (CMP) and oxygen plasma assisted low temperature wafer bonding, to integrate prefabricated MEMS and CMOS devices. Fabricating MEMS and CMOS devices on separate wafers enables the optimisation of each technology separately. However, to integrate them requires low temperature bonding of processed wafers, connecting the bonded wafer pair and bringing the electrical signals to the top surface. Test structures have been used to investigate the feasibility of bonding MEMS and CMOS wafers to create an integrated system with electrical connections. Bonding and thinning of prefabricated wafers has been demonstrated using a CMP enabled surface planarisation process and plasma assisted low-temperature wafer bonding. Inter-wafer connections can be achieved using two fabrication methods. With oxide to oxide bonding method, resistances of 3.8 – 5.2 Ω have been obtained for the via chain test structures with 9-13 contact vias, whilst an average specific contact resistivity of 1.7 x 10^-8Ω. <i>cm</i>² has been achieved form the single via test structure. Direct electrical connections between wafers have also been implemented during the bonding anneal stage with an average contact resistance of 2.6x10^-8 Ω.cm².

The place of optical lithography within integrated circuit manufacture is discussed, and the key nature of its role identified. All aspects of lithographic processing are reviewed, highlighting the long list of process conditions which influence the final results. The manner in which lithographic processes are evaluated and characterised is also reviewed, illustrating the large amount of work required to compare different processes. Computer simulation of lithography is reviewed as a quick and cheap way of investigating the effect of key processing parameters on process results. Such simulations are only useful, in this respect, if they exhibit the same trends as genuine processes and are quantitatively accurate. Experimental results reveal discrepancies between modern track-based development techniques and the immersion processes generally used to generate the input parameters for simulation of the development. A novel polychromatic Development Rate Monitor (DRM) is introduced capable of measuring resist dissolution rates in-situ on manufacturing equipment. Results from this equipment demonstrate significant differences between immersion and track development. The detailed output from the DRM system coupled with a new analysis technique allow accurate estimation of post exposure bake diffusion lengths and have led to the derivation of a new model describing surface induction effects during development. Having accurately characterised continuous spray and static puddle development processes, a new 'interrupted development' simulation technique is introduced to simulate the spray/puddle processes commonly employed in manufacturing facilities. Excellent correlation is demonstrated between these simulations and experimental results.

The subthreshold region becomes increasingly important in small geometry circuits as dimensions of MOSFETs continue to shrink in order to reduce cost and to obtain better performance. For short-channel or narrow-channel devices, their potential distribution becomes two-dimensional instead of one-dimensional as for a large device. Thus one dimensional subthreshold model used for large devices is no longer accurate for small geometry devices. Two-dimensional models have to be developed. A two-dimensional analytical subthreshold and punchthrough model for short-channel MOSFETs with nonuniformly doped channel is presented. Analytical expressions for the subthreshold current and gate swing are given. Ion implantation has become a standard MOS process step to adjust threshold voltage and to prevent punchthrough. It has great impact on the subthreshold behaviour of MOSFETs. A detailed examination of how the channel profile affects the subthreshold behaviour has been carried out for large and small geometry devices. The effects of terminal voltages and geometry dependence of the subthreshold behaviour have been studied carefully. A semi-empirical subthreshold model suitable for circuit simulation is proposed based on the experimental observation and theoretical results.

Radar sea clutter analysis has been an important area of radar research for many years. Very limited research has been carried out on coherent monostatic sea clutter analysis and even less on bistatic sea clutter. This has left a significant gap in the global scientific knowledge within this area. This thesis describes research carried out to analyse, quantify and model coherent sea clutter statistics from multiple radar sources. The ultimate goal of the research is to improve maritime radars' ability to compensate for clutter and achieve effective detection of targets on or over the sea surface. The first analyses used monostatic data gathered during the fight trials of the Thales Searchwater 2000 AEW radar. A further sea clutter trials database from CSIR was then used to investigate the variation of clutter statistics with look angle and grazing angle. Finally simultaneous monostatic and bistatic sea clutter data recorded in South Africa using the S-band UCL radar system NetRAD were analysed. No simultaneous monostatic and bistatic coherent analysis has ever been reported before in the open literature. The datasets recorded included multiple bistatic angles at both horizontal and vertical polarisations. Throughout the analysis real data have been compared to accepted theoretic models of sea clutter. An additional metric of comparison was investigated relating to the area of information theoretic techniques. Information theory is a significant subject area, and some concepts from it have been applied in this research. In summary this research has produced quantifiable and novel results on the characteristics of sea clutter statistics as a function of Doppler. Analysis has been carried out on a wide range of monostatic and bistatic data. The results of this research will be extremely valuable in developing sea clutter suppression algorithms and thus improving detection performance in future maritime radar designs.

A key challenge when introducing new systems and technologies into Air Traffic control (ATC) is to understand levels of emerging controller proficiency ahead of scheduled implementation. Behavioural markers have been used in several complex industries to assess levels of non-technical skill; however these measures invariably focus upon the desired behaviours attained by the end of training. This research has explored how an Air Traffic Controller’s (ATCO’s) overt non-technical behaviour changes in presence and prevalence as they progress their expertise during training. Through document review, expert engagement, and most extensively direct observation of ATCOs during and after training, a number of non-technical behaviours indicative of varying proficiency have been identified. These markers were placed within a simple three-level learning and development framework. Five categories emerged across the behaviours identified; i) input and interaction with the Human Machine Interface (HMI), ii) interaction with others, iii) physical posture and body Language, iv) attitude and mood; v) communications and verbal commentary. An observation sheet containing the markers was iteratively developed, tested, and refined in various ATC environments. Both expert ATCOs undergoing system transition training, and ab-initio trainee controllers undertaking aerodrome training were followed through longitudinal study. A capped frequency count was used to record the precise presence of individual markers. Several dual-observations were also undertaken to determine inter-rater reliability and construct validity. In total, the performance of the individual markers has been evaluated across 129 real-world observations. 30 markers demonstrate reliable correlations for changing prevalence against total system exposure time and provide an original means of tracking and monitoring subtle changes in the behaviour of ATCOs, as their levels of proficiency in the task matures with new ATC systems.