Mémoire numérisé par la Direction des bibliothèques de l'Université de Montréal.

Mémoire numérisé par la Direction des bibliothèques de l'Université de Montréal.

No description available.

Modern-day microprocessors are measured in part by their parallel performance. Parallelizing sequential programs is a complex task, requiring data dependence analysis of the program constructs. Researchers in the field of parallel optimization are working on shifting the optimization effort from the programmer to the compiler. The goal of this work is for the compiler to visually expose the parallel characteristics of the program to researchers as well as programmers for a better understanding of the parallel properties of their programs. In order to do that we developed Exposed Parallelism Visualization (EPV), a statically-generated graphical tool that builds a parallel task graph of source code after it has been converted to the LLVM compiler frameworkq s Intermediate Representation (IR). The goal is for this visual representation of IR to provide new insights about the parallel properties of the program without having to execute the program. This will help researchers and programmers to understand if and where parallelism exists in the program at compile time. With this understanding, researchers will be able to more easily develop compiler algorithms that identify parallelism and improve program performance, and programmers will easily identify parallelizable sections of code that can be executed in multiple cores or accelerators such as GPUs or FPGAs. To the best of our knowledge, EPV is the first static visualization tool made for the identification of parallelism.

The complementary advantages of GPS and INS have been the principle driving factor to integrate these two navigation systems as an integrated GPS/INS system in various architectural forms to provide robust positioning. Although the loosely coupled and tightly coupled GPS/INS systems have been in existence for over a decade or two and performed reasonably well, nevertheless, the tracking performance was still a concern in non-benign environments such as dynamic scenarios, indoor environments, urban areas, under foliages etc., where the GPS tracking loops lose lock due to the signals being weak, subjected to excessive dynamics or completely blocked. The motivation of this research, therefore, was to address these limitations with an integrated GPS/Pseudolite/INS system using ultra-tight integration architecture. The main research contributions are summarised as below: (a) The performance of the tracking loops in dynamic scenarios were analysed in detail with both conventional and ultra-tight software receivers. The stochastic modelling of the INS-derived Doppler is of utmost importantance in enhancing the benefits of ultra-tight integration, and therefore, two popular stochastic techniques??? Gauss Markov (GM) and Autoregressive (AR), were investigated to model the Doppler signal. The simulation results demonstrate that the AR method is capable of producing better accuracies and is more efficient. The algorithms to determine the AR parameters (order and coefficients) were also provided. (b) The various mathematical relationships that elicit the understanding of the ultra-tightly integrated system were derived in detail. The Kalman filter design and its implementation were also provided. Various simulation and real-time experiments were conducted to study the performance of the filter, and the results confirm the underlying assumptions in the theoretical analyses and the mathematical derivations. Covariance analysis was also performed to study the convergence and stability effects of the filter. (c) Interpolator design using signal processing techniques were proposed to increase the sampling rate of the INS-derived Doppler. To efficiently realise the interpolator transfer function, two optimal techniques were investigated ??? Polyphase and Cascaded Integrator Comb (CIC), and our results show that CIC was more efficient than polyphase in accuracy and real-time implementations. (d) The integration of Pseudolites (PL) with INS in ultra-tight configuration was analysed for an indoor environment. The acquisition and tracking performances of ???Pseudolites-only??? and ???Pseudolite/INS??? modes were compared to study the impact of the inertial signals aiding. The results demonstrate that aiding of the inertial signals with the baseband loops (acquisition and tracking) improve the overall tracking performance. An overview on the effects of the pseudolite signal propagation is also given. (e) Simulation and real-time experiments have been conducted to evaluate the proposed algorithms and the overall design of the ultra-tightly integrated system. A comparison was also done between GPS/PL/INS and GPS/INS integrated systems to study the potential advantages of the pseudolite integration. The details of the field experiment are provided. The data from a real-time experiment was processed to further evaluate the robustness of the system. The results confirm that the developed mathematical models and algorithms are correct.

This thesis presents a systematic top-down methodology for simulating a phase-locked loop using a macro model in Verilog-A. The macromodel has been used to evaluate the jitter due to supply noise, thermal noise, and ground bounce. The noise simulation with the behavioral model is roughly 310 times faster (best case) and 125 times faster (worst case). The accuracy of the model depends on the accurate evaluation of the non-linear transfer function from the various noisy nodes to the output. By modeling the noise transfer function of the circuit as closely as possible, 100% accuracy for the behavioral noise simulations compared with the HSPICE noise simulations is obtained. The macro model is written for a charge-pump phase-locked loop, but can be easily extended to other architectures. The simulations are completed using SpectreS in Cadence. The designer can use the model to estimate the jitter at the output of the PLL in a top-down design methodology or cross verify the performance of an existing chip in a bottom-up approach. / Graduation date: 2001

Graduation date: 2006 / Digital phase-locked loops (PLLs) have been receiving increasing attention recently due to their ease of integration, scalability and performance comparable to their analog counterparts. In digital PLLs, increased resolution in time-to-digital conversion is desirable for improved noise performance. This work describes the design and simulation of a stochastic time-to-digital converter (STDC) for a digital PLL to attain high resolution. The converter is intended to comprise the fine loop of the phase-frequency detector, whose coarse loop would be comprised of a time-to-digital converter designed using the conventional delay-chain approach. The STDC is designed, simulated and sent for fabrication in a 0.35μm SOI CMOS process. System level simulations in MATLAB are verified by device level simulations in Spectre on circuits extracted from layout. The results support the viability of using the proposed circuit for high resolution time-to-digital conversion.

This work examines electrohydrodynamic enhancement of capillary pump loops (CPL) for use in extraterrestrial nuclear applications. A capillary pump uses capillary action through a porous wick to transport heat and mass. The capillary pump is being considered as a method to improve heat transport in extraterrestrial nuclear applications. The work consists of a literature review of electrohydrodynamics, capillary pumped loops and space type nuclear reactors. Current CPLs are assessed for their performance and several design solutions are investigated using theoretical and analytical techniques. Experimental analysis is performed on an electrohydrodynamic gas pump to determine their suitability for implementation into the vapour leg of a capillary pump loop. The results suggest the EHD gas pumps could offer improved performance and it is recommended experiments should be performed in future work with an EHD gas pump in a CPL for verification. A new design for the electrohydrodynamic evaporator is also developed for enhanced performance. / UOIT

The first aim of this thesis is to examine relationships between microRNAs targeting gene networks, combining knowledge from microRNA prediction databases into our microRNA Data Integration Portal (mirDIP). Modeling the microRNA:transcript interactome – referred to as the micronome – to build microRNA interaction networks of signalling pathways, we find genes within signalling pathways to be co-targeted by common microRNAs suggesting an unexpected level of transcriptional control. We identify two distinct classes of microRNAs; universe microRNAs, which are involved in many signalling pathways; and intra-pathway microRNAs, which target multiple genes within one signalling pathway. We find universe microRNAs to have more targets, to be more studied and more involved in cancer signalling than their intrapathway counterparts. The second aim was to undertake a more focused view, analyzing the characteristics of microRNAs within the micronome itself beginning with a focus on the under-examined microRNA terminal loop across the micronome to determine if this region of the microRNA structure might contribute to microRNA functioning. We have identified 2 main classes of microRNAs based on loop structure – perfect and occluded, which show biological relevance. We found regulatory motifs within microRNA terminal loops and found a large number of Frequently Occurring Words (FOWs) significantly overrepresented across the micronome. Set analysis of in vitro secreted microRNAs, microRNA expression across a panel of normal tissues, and microRNAs shown to be secreted in lung cancer shows that specific microRNA loop motifs within these groups are significantly overreperesented – suggesting that microRNA terminal loops harbour sequences bearing microRNA processing and localization signals.

The aim of this work is to present a model for the superelastic response of Shape Memory Alloys (SMAs) by developing a Preisach Model with thermodynamics basis. The special features of SMA superelastic response is useful in a variety of applications (eg. seismic dampers and arterial stents). For example, under seismic loads the SMA dampers undergo rapid loading{unloading cycles, thus going through a number of internal hysteresis loops, which are responsible for dissipating the vibration energy. Therefore the design for such applications requires the ability to predict the response, particularly internal loops. It is thus intended to develop a model for the superelastic response which is simple, computationally fast and can predict internal loops. The key idea here is to separate the elastic response of SMAs from the dissipative response and apply a Preisach Model to the dissipative response as opposed to the popular notion of applying the Preisach Model to the stress{strain response directly. Such a separation allows for the better prediction of internal hysteresis, avoids issues due to at/negative slopes in the stress{strain plot, and shows good match with experimental data, even when minimal input is given to the model. The model is developed from a Gibbs Potential, which allows us to compute a driving force for the underlying phase transformation in the superelastic response. The hysteresis between the driving force for transformation and the extent of transformation (volume fraction of martensite) is then used with a Preisach model. The Preisach model parameters are identi ed using a least squares approach. ASTM Standards for the testing of NiTi wires (F2516-07^sigma 2), are used for the identi cation of the parameters in the Gibbs Potential. The simulations are run using MATLAB R . Results under di erent input conditions are discussed. It is shown that the predicted response shows good agreement with the experimental data. A couple of attempts at extending the model to bending and more complex response of SMAs is also discussed.