Solid-state amorphous materials show amazing promise in thin-film electronics. The interface-to-bulk ratio of thin films makes interfacial chemistries of these systems of utmost importance. Thin films of amorphous metals, dielectrics and semiconductors have novel chemistries that are not only based upon their elemental constituent makeup, but also based upon the method with which the amorphous material is deposited and treated after deposition. The chemical attributes unique to amorphous, thin-film systems are defined primarily through the utilization of solution-processed aluminum oxide phosphate dielectric material and Zr������Cu������Al������Ni������ metal. the chemical findings wrought via the observation of interactions between amorphous metal-dielectric systems are applied to semiconductor/insulator systems to illustrate the use of the same general chemical principles applying to diverse problems. Finally in the appendices, the systems are utilized to create extremely-thin tunneling electronic devices and optical metamaterials as well as innovative classroom material. / Graduation date: 2012 / Access restricted to the OSU Community at author's request from Dec. 13, 2011 - Dec. 13, 2012

Amorphous oxide semiconductors are of potential interest in the display industry due to their high carrier mobility, transparency at visible wavelengths and excellent operational stability. In this dissertation, n-channel zinc-tin oxide thin-film transistors are fabricated based on a solution-based deposition approach, which allows low fabrication cost and high throughput. The effects of device configuration and process conditions on transistor performance are investigated, and circuit applications including inverters, amplifiers, and ring oscillators are demonstrated. Charge transport in the zinc-tin oxide field-effect transistors is also investigated. A transition from thermally-activated to band-like transport is observed with increasing carrier concentration in high mobility samples, which agrees well with the key predictions of the multiple trap and release model and also Mott’s mobility edge model. In addition, velocity distribution of charge carriers is studied with a time-resolved technique. This provides a more detailed picture of charge transport in field-effect transistors. P-channel organic semiconductor field-effect transistors are also investigated with a view to combine them with n-channel amorphous oxide transistors to create a hybrid organic-inorganic complementary technology. / text

Amorphous Oxide semiconductors have gained large interest in the display industry owing to their high carrier mobilities and low fabrication costs. In this thesis, n-channel solution based zinc-tin oxide (ZTO) thin-film transistors (TFTs) are studied from a circuit design perspective. The study includes an iterative process of circuit design, layout and test procedure of the fabricated devices in the lab. The device models used in circuit simulations are refined following the data fed back from each of these iterations which has enabled more accurate design of complex circuits using ZTO devices. The requirement and development of a physical compact model for performing accurate and predictive circuit simulations has been presented. The use of ZTO devices in low cost, transparent and flexible electronic applications has been investigated through the study of basic circuit blocks such as amplifiers, ring oscillators, inverters and a four stage Operational Amplifier. / text

Amorphous Oxide Semiconductors (AOS) are widely being explored in the field of flexible and transparent electronics. In this thesis, solution processed zinc-tin oxide (ZTO) n-channel TFT based circuits are studied. Inverters, single stage amplifiers and ring oscillators are designed, fabricated and tested. 7-stage ring oscillators with output frequencies up to 106kHz and 5-stage ring oscillators with frequencies up to 75kHz are reported. A stable three stage op-amp with a buffered output is designed for a gain of 39.9dB with a unity gain frequency of 27.7kHz. A 7-stage ring oscillator with output frequency close to 1MHz is simulated and designed. The op-amp and the ring oscillator are ready to be fabricated and tested. An RPI model for a-Si, adapted to fit the ZTO device characteristics, is used for simulation. Development of a new model based on the physics behind charge transport in ZTO devices is explored. An expression for gate bias dependent mobility in ZTO devices is derived. / text

xix, 142 p. : ill. (some col.) A print copy of this thesis is available through the UO Libraries. Search the library catalog for the location and call number. / Transparent amorphous oxide semiconductors are a relatively new class of materials which show significant promise for electronic device applications. The electron mobility in these materials is at least ten times greater than that of the current dominant material for thin-film transistors: amorphous silicon. The density of states within the gap of a semiconductor largely determines the characteristics of a device fabricated from it. Thus, a fundamental understanding of the electronic structure within the mobility gap of amorphous oxides is crucial to fully developing technologies based around them. Amorphous zinc tin oxide (ZTO) and indium gallium zinc oxide (IGZO) were investigated in order to determine this sub-gap structure. Junction-capacitance based methods including admittance spectroscopy and drive level capacitance profiling (DLCP) were used to find the free carrier and deep defect densities. Defects located near insulator-semiconductor interfaces were commonly observed and strongly depended on fabrication conditions. Transient photocapacitance spectroscopy (TPC) indicated broad valence band-tails for both the ZTO and IGZO samples, characterized by Urbach energies of 110±20 meV. These large band-tail widths imply that significant structural disorder exists in the atomic lattice of these materials. While such broad band-tails generally correlate with poor electronic transport properties, the density of states near the conduction band is more important for devices such as transistors. The TPC spectra also revealed an optically active defect located at the insulator-semiconductor junction. Space-charge-limited current (SCLC) measurements were attempted in order to deduce the density of states near the conduction band. While the SCLC results were promising, their interpretation was too ambiguous to obtain a detailed picture of the electronic state distribution. Another technique, modulated photocurrent spectroscopy (MPC), was then employed for this purpose. Using this method narrow conduction band-tails were determined for the ZTO samples with Urbach energies near 10 meV. Thus, by combining the results of the DLCP, TPC and MPC measurements, a quite complete picture of the density of states within the mobility gap of these amorphous oxides has emerged. The relationship of this state distribution to transistor performance is discussed as well as to the future development of device applications of these materials. / Committee in charge: Stephen Kevan, Chairperson, Physics; J David Cohen, Member, Physics; David Strom, Member, Physics; Jens Noeckel, Member, Physics; David Johnson, Outside Member, Chemistry

Resistive random access memory (RRAM) is a non-volatile memory technology based on resistive switching in a dielectric or semiconductor sandwiched between two different metals. Also known as memristors, these devices are potential candidates for a next-generation replacement for flash memory. In this thesis, bipolar resistive switching is reported for the first time in solution-deposited zinc-tin-oxide (ZTO). The impact of the compliance current on device operation, including the SET and RESET voltages, pre-SET, RESET and post-RESET currents, the resistance ratio between the low and high resistance states, retention, and the endurance, is investigated for an isolated Al dot/ZTO/Ir blanket device and for Al/ZTO/Pt crossbar RRAM devices. A gradual forming process is devised to improve device stability and performance. It is found that the device performance depends critically on the compliance current density that is used to limit the breakdown conduction during the SET operation. In addition, it was found that the conduction and switching mechanisms are consistent with the filament model of formation and rupture of conductive filaments. / Graduation date: 2012

Fabrication techniques and process integration considerations for amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) constitute the central theme of this dissertation. Within this theme three primary areas of focus are pursued. The first focus involves formulating a general framework for assessing passivation. Avoiding formation of an undesirable backside accumulation layer in an AOS bottom-gate TFT is accomplished by (i) choosing a passivation layer in which the charge neutrality level is aligned with (ideal case) or higher in energy than that of the semiconductor channel layer charge neutrality level, and (ii) depositing the passivation layer in such a manner that a negligible density of oxygen vacancies are present at the channel-passivation layer interface. Two AOS TFT passivation schemes are explored. Sputter-deposited zinc tin silicon oxide (ZTSO) appears promising for suppressing the effects of negative bias illumination stress (NBIS) with respect to ZTO and IGZO TFTs. Solution-deposited silicon dioxide is used as a barrier layer to subsequent PECVD silicon dioxide deposition, yielding ZTO TFT transfer curves showing that the dual-layer passivation process does not significantly alter ZTO TFT electrical characteristics. The second focus involves creating an adaptable back-end process compatible with flexible substrates. A detailed list of possible via formation techniques is presented with particular focus on non-traditional and adaptable techniques. Two of the discussed methods, "hydrophobic surface treatment" and "printed local insulator," are demonstrated and proven effective. The third focus is printing AOS TFT channel layers in order to create an adaptable and additive front-end integrated circuit fabrication scheme. Printed zinc indium aluminum oxide (ZIAO) and indium gallium zinc oxide (IGZO) channel layers are demonstrated using a SonoPlot piezoelectric printing system. Finally, challenges associated with printing electronic materials are discussed. Organic-based solutions are easier to print due to their ability to "stick" to the substrate and form well-defined patterns, but have poor electrical characteristics due to the weakness of organic bonds. Inorganic aqueous-based solutions demonstrate good electrical performance when deposited by spin coating, but are difficult to print because precise control of a substrate's hydrophillic/hydrophobic nature is required. However, precise control is difficult to achieve, since aqueous-based solutions either spread out or ball up on the substrate surface. Thickness control of any printed solution is always problematic due to surface wetting and the elliptical thickness profile of a dispensed solution. / Graduation date: 2013

Nanolaminate dielectrics combine two or more insulating materials in a many-layered film. These structures can be made to significantly outperform films composed of a single one of their constituent materials by adjusting the composition ratio, arrangement, and size of the component layers. In this work, atomic layer deposition (ALD) is used to fabricate pure-oxide and nanolaminate dielectrics based upon Al₂O₃ and ZrO₂. The relative performance of these dielectrics is investigated with respect to application as gate dielectrics for ZnSnO (ZTO) and InGaZnO (IGZO) amorphous-oxide-semiconductor (AOS) thin-film transistors (TFTs). AOS TFTs are promising candidates for commercial use in applications such as active-matrix displays and e-paper. It was found that the layer thickness, relative composition, and interfacial material all had an effect on TFT performance. Several variants of the Al₂O₃/ZrO₂ nanolaminate were found to exhibit superior properties to either Al₂O₃ or ZrO₂ alone. / Graduation date: 2011

The focus of this thesis is the investigation of thin-film transistors (TFTs) based on amorphous oxide semiconductors (AOSs) in two circuit applications. To date, circuits implemented with AOS-based TFTs have been primarily enhancement-enhancement inverters, ring oscillators based on these inverters operating at peak frequencies up to ~400 kHz, and two-transistor one-capacitor pixel driving circuits for use with organic light-emitting diodes (OLEDS). The first application investigated herein is AC/DC rectification using two circuit configurations based on staggered bottom-gate TFTs employing indium gallium oxide (IGO) as the active channel layer; a traditional full bridge rectifier with diode-tied transistors and a cross-tied full-wave rectifier are demonstrated, which is analogous to what has been reported previously using p-type organic TFTs. Both circuit configurations are found to operate successfully up to at least 20 MHz; this is believed to be the highest reported operating frequency to date for circuits based on amorphous oxide semiconductors. Output voltages at one megahertz are 9 V and ~10.5 V, respectively, when driven with a differential 7.07 Vrms sine wave. This performance is superior to that of previously reported organic-based rectifiers. The second AOS-based TFT circuit application investigated is an enhancement-depletion (E-D) inverter based on heterogeneous channel materials. Simulation results using models based on a depletion-mode indium zinc oxide (IZO) TFT and an enhancement-mode IGO TFT result in a gain of ~15. Gains of other oxide-based inverters have been limited to less than 2; the large gain of the E-D inverter makes it well suited for digital logic applications. Deposition parameters for the IGO and IZO active layers are optimized to match the models used in simulation by fabricating TFTs on thermally oxidized silicon and patterned via shadow masks. Integrated IGO-based TFTs exhibit a similar turn-on voltage and decreased mobility compared to the shadow masked TFTs. However, the integrated IZO-based TFTs fabricated to date are found to be conductive and exhibit no gate modulation. Due to the conductive nature of the load, the fabricated E-D inverter shows no significant output voltage variation. This discrepancy in performance between the integrated and shadow-masked IZO devices is attributed to processing complications. / Graduation date: 2009

The primary objective of this thesis is to develop a process for fabricating integrated circuits based on thin-film transistors (TFTs) using zinc tin oxide (ZTO) as the channel layer. ZTO, in contrast to indium- or gallium-based amorphous oxide semiconductors (AOS), is perceived to be a more commercially viable AOS choice due to its low cost and ability to be deposited via DC reactive sputtering. In the absence of an acceptable ZTO wet etch process, a plasma-etching process using Ar/CH₄ is developed for both 1:1 and 2:1 ZTO compositions. An Ar/CH₄ plasma etch process is also designed for indium gallium oxide (IGO), indium gallium zinc oxide (IGZO), and indium tin oxide (ITO). Ar/CH₄ dry etches have excellent selectivity with respect to SiO₂, providing a route for obtaining patterned ZTO channels. A critical asset of ZTO process integration involves removing polymer deposits after ZTO etching without active layer damage. A ZTO process is developed for the fabrication of integrated circuits which use ZTO channel enhancement-mode TFTs. Such ZTO TFTs exhibit incremental and average mobilities of 23 and 18 cm²V⁻¹s⁻¹, respectively, turn-on voltages approximately 0 to 1.5 V and subthreshold swings below 0.5 V/dec when annealed in air at 400 °C for 1 hour. Several types of ZTO TFT circuits are realized for the first time. Despite large parasitic capacitances due to large gate-source and gate-drain overlaps, AC/DC rectifiers are fabricated and found to operate in the MHz range. Thus, they are usable for RFID and other equivalent-speed applications. Finally, a ZTO process for simultaneously fabricating both enhancement-mode and depletion-mode TFTs on a single substrate using a single target and anneal step is developed. This dual-channel process is used to build a high-gain two-transistor enhancement/depletion inverter. At a rail voltage of 10 V, this inverter has a gain of 10.6 V/V, the highest yet reported for an AOS-based inverter. This E/D inverter is an important new functional block which will enable the realization of more complex digital logic circuits. / Graduation date: 2009