Short Word-Length refers to single-bit, two-bit or ternary processing systems. SWL systems use Sigma-Delta Modulation (SDM) technique to express an analogue or multi-bit input signal in terms of a high frequency single-bit stream. In Sigma-Delta Modulation, the input signal is coarsely quantized into a single-bit representation by sampling it at a much higher rate than twice the maximum input frequency viz. the Nyquist rate. This single-bit representation is almost exclusively filtered to remove conversion quantization noise and sample decimated to the Nyquist frequency in preparation for traditional signal processing. SWL algorithms have a huge potential in a variety of applications as they offer many advantages as compared to multi-bit approaches. Features of SWL include efficient hardware implementation, increased flexibility and massive cost savings. Field Programmable Gate Arrays (FPGAs) are SRAM/FLASH based integrated circuits that can be programmed and re-programmed by the end user. FPGAs are made up of arrays of logic gates, routing channels and I/O blocks. State-of-the-art FPGAs include features such as Advanced Clock Management, Dedicated Multipliers, DSP Slices, High Speed I/O and Embedded Microprocessors. A System-on-Programmable-Chip (SoPC) design approach uses some or all the aforementioned resources to create a complete processing system on the device itself, ensuring maximum silicon area utilization and higher speed by eliminating inter-chip communication overheads. This dissertation focuses on the application of SWL processing systems in audio Class-D Amplifiers and aims to prove the claims of efficient hardware implementation and higher speeds of operation. The analog Class-D Amplifier is analyzed and an SWL equivalent of the system is derived by replacing the analogue components with DSP functions wherever possible. The SWL Class-D Amplifier is implemented on an FPGA, the standard emulation platform, using VHSIC Hardware Description Languages (VHDL). The approach is taken a step forward by adding re-configurability and media selectivity and proposing SDM adaptivity to improve performance.

This thesis presents an overview of the simulation, design, and measurement of state-of-the-art Silicon-Germanium Heterojunction Bipolar Transistor (SiGe HBT) variable gain amplifier (VGA). The VGA design trade-off space is presented and methods for achieving an optimized design are discussed. We demonstrate in this thesis that SiGe HBT VGA has the capability to meet the demanding needs for the next generation wireless systems.

Η παρούσα διπλωματική αποτελείται από μια σειρά από projects συστημάτων επεξεργασίας ηχητικού σήματος, με κύριο προσανατολισμό το ηχητικό σήμα της ηλεκτρικής κιθάρας. Πολλά από τα ακόλουθα projects είναι βασισμένα σε ήδη υπάρχοντα κυκλώματα που κυκλοφορούν στο εμπόριο και έχουν τροποποιηθεί έτσι ώστε να έχουν βελτιωμένη απόδοση (λιγότερος θόρυβος, μικρότερη κατανάλωση ισχύος) και να έχουν καλύτερη ηχητική απόκριση (σύμφωνα με τα δικά μας -υποκειμενικά- κριτήρια). Τα πρώτα projects ως ενεργά στοιχεία χρησιμοποιούν είτε διακριτά τρανζίστορ και διόδους, είτε ολοκληρωμένα κυκλώματα τρανζίστορ-διόδων. Τα δύο τελευταία χρησιμοποιούν τριοδικές και πεντοδικές λυχνίες κενού. Με αυτόν τον τρόπο έχει επιτευχθεί και μια κλιμακούμενη αύξηση της δυσκολίας των projects. / --

Thesis (MTech (Electrical Engineering)--Cape Peninsula University of Technology, 2011 / Modern technologies have led to extensive digital music reproduction and distribution. It is fitting then that digital audio be amplified directly from its source rather than being converted to an analogue waveform before amplification. The benefits of using a digital controller for audio processing include being able to easily reconfigure the system and to add additional functions at a later stage. Digital audio is primarily stored as Pulse Code Modulation (PCM) while Pulse Width Modulation (PWM) is the most popular scheme used to drive a class-D amplifier. The class-D amplifier is selected in many applications due to its very high energy efficiency. Conventional PCM to PWM conversion is inherently nonlinear. Various interpolation schemes are presented in this research project which help to address the nonlinearity. Digitally generated PWM has a limited resolution which is constrained by the system clock. This thesis presents noise shaping techniques which increase the effective resolution of the PWM process without having to use an excessively high system clock. Noise shaping allows a low resolution modulator to be used to reproduce high resolution audio.

Thesis (PhD (Electrical and Electronic Engineering))--University of Stellenbosch, 2009. / Although the Class D topology offers several advantages, its use in audio amplification has previously been limited by the lack of competitiveness in fidelity compared to its linear counterparts. During the past decade, technological advances in semiconductor technology have awakened new interest since competitive levels of distortion could now be achieved. The output stage of such an amplifier is the primary limiting factor in its performance. In this dissertation, four non-ideal effects existing in this stage are identified and mathematically analysed. The analytical analysis makes use of a well-established mathematical model, based on the double Fourier series method, to model the imperfections introduced into a naturally sampled pulsewidth modulated waveform. The analysis is complemented by simulation using a strategy based on Newton’s numerical method. The theory is verified by a comparison between the analytical-, simulated- and experimental results.