Thesis (Ph. D.)--University of Texas at Austin, 1999. / Vita. Includes bibliographical references (leaves 112-119). Available also in a digital version from Dissertation Abstracts.

Thesis (Ph. D.)--University of Washington, 2001. / Vita. Includes bibliographical references (leaves 168-180).

Diamond and diamond-like carbon films, with their exceptionally good mechanical, chemical, and optical properties, are the best materials as protective hard coatings for electronic devices and cutting tools. The biocompatibility of these materials makes it suitable for bone implants. The wide range applications of these films are hindered because of the high compressive stresses developed during the deposition. Use of carbide and nitride interfacial layers has emerged as one of the methods to reduce the compressive stresses.The present research focuses on the study of different materials as the interfacial layers for diamond and tetrahedral amorphous carbon films. For tetrahedral amorphous carbon AlN, Ta, TiN, TiC, TaN and W were investigated as the interlayer materials. The interlayer was deposited at different substrate temperatures to study the temperature induced changes in the residual stress. The tetrahedral amorphous carbon with TiN interlayer deposited at 300°C and 600°C exhibited a maximum reduction in the stress.TiN and TiC were deposited as interlayer for the diamond films on Ti-6Al-4V alloy. TiC has improved the adhesion of diamond with the substrate and exhibited less compressive stresses compared to TiN.

The heteroepitaxial growth of cubic silicon carbide (3C-SiC) on (111) silicon (Si) substrates, via a horizontal hot-wall chemical vapor deposition (CVD) reactor, has been achieved. Growth was conducted using a two step process: first the Si substrate surface is converted to SiC via a carbonization process and second the growth of 3C-SiC is performed on the initial carbonized layer. During carbonization, the surface of the Si is converted to 3C-SiC, which helps to minimize the stress in the growing crystal. Propane (C3H8) and silane (SiH4), diluted in hydrogen (H2), were used as the carbon and silicon source, respectively. A deposition rate of approximately 10 µm/h was established during the initial process at a temperature of ~1380 °C. The optimized process produced films with X-ray rocking curve full-width at half-maximum (FWHM) values of 219 arcsec, which is significantly better than any other published results in the literature. Once this process was developed a lower temperature process was developed at a slower growth rate of ~2 µm/h at 1225 °C. The crystal quality was inferior at the reduced temperature but this new process allows for the growth of 3C-SiC(111) films on oxide release layers for MEMS applications. In addition, for electronic device applications, a lower temperature process reduces the generation of defects caused by the nearly 8 % mismatch in the coefficient of thermal expansion (CTE) between 3C-SiC and Si. Finally a new process using a poly-Si seed layer deposited on an oxide-coated Si wafer was used to form 3C-SiC films for MEMS applications. The results indicated initially that the films may even be monocrystalline (based on X-ray evaluation) but later analysis performed using TEM indicated they were highly-ordered polycrystalline films. The grown 3C-SiC films were analyzed using a variety of characterization techniques. The thickness of the films was assessed through Fourier Transform infrared (FTIR) spectroscopy, and confirmed (in the case of growth on poly-Si seed layers) by cross-section scanning electron microscopy (SEM). The SEM cross-sections were also used to investigate the 3C-SiC/oxide interface. The surface morphology of the films was inspected via Nomarsky interference optical microscopy, atomic force microscopy (AFM), and SEM. The crystalline quality of the films was determined through X-ray diffraction (XRD).

In this thesis, a systematic study has been carried out on the synthesis, characterization and applications of microcrystalline diamond (MCD) and nanocrystalline diamond (NCD) thin films deposited by the chemical vapor deposition (CVD) method. Firstly, an overview of diamond films synthesized from carbon-containing gas plasmas is presented. A parameter study was performed to grow diamond thin films. The transition from micro- to nanocrystallinity of diamond grains was achieved by controlling the Ar/Hydrogen gas ratio. The nanocrystallinity is the result of a new growth mechanism which involves the insertion of carbon dimmer into carbon-carbon and carbon-hydrogen bonds. Secondly, characterization of diamond films has been carried out by different techniques including electron microscopy, near edge X-ray absorption fine structure (NEXAFS), nanoindentation, and Raman spectroscopy. Unique properties of NCD, compared to those of MCD grown by conventional hydrogen rich plasma, have been observed and investigated. Thirdly, various applications of diamond films are discussed: a). Well-adhered MCD coatings have been deposited on WC-Co substrates with proper surface pretreatment. A diffusion barrier Cr/CrN/Cr was deposited on the cemented carbide substrate and the substrate was short peened with 150 micron friable diamond powders to achieve higher nucleation density and stronger adhesion strength; b). A nitrogen doped NCD based biosensor was fabricated for glucose sensing. Carboxyl functional group and conducting polymer (polyaniline) have been utilized respectively to electrochemically functionalize the diamond surface. A linear response to glucose concentration has been obtained from the electrode with good sensitivity and stability; c). A novel approach to synthesize NCD wires has been developed for the first time. The NCD coating was successfully coated on Si nanowires (SiNWs) to form NCD wire with diameter around a few microns. This study opens a whole new area for applications based on diamond wires such as neural transmission electrodes, field emission emitters, and electrochemical electrodes with improved properties

The heteroepitaxial growth of cubic silicon carbide (3C-SiC) on silicon (Si) substrates at high growth rates, via a horizontal hot-wall chemical vapor deposition (CVD) reactor, has been achieved. The final growth process was developed in three stages; an initial "baseline" development stage, an optimization stage, and a large area growth stage. In all cases the growth was conducted using a two step, carbonization plus growth, process. During carbonization, the surface of the Si is converted to 3C-SiC, which helps to minimize the stress in the growing crystal. Propane (C3H8) and silane (SiH4), diluted in hydrogen (H2), were used as the carbon and silicon source, respectively. A deposition rate of approximately 10 um/h was established during the baseline process. Once the baseline process proved to be repeatable, optimization of the process began. Through variations in temperature, pressure, and the Si/C ratio, thick 3C-SiC films (up to 22 um thick) and high deposition rates (up to 30 um/h) were obtained. The optimized process was then applied to growth on 50 mm diameter Si(100) wafers. The grown 3C-SiC films were analyzed using a variety of characterization techniques. The thickness of the films was assessed through Fourier Transform infrared (FTIR) spectroscopy, and confirmed by cross-section scanning electron microscopy (SEM). The SEM cross-sections were also used to investigate the 3C-SiC/Si interface. The surface morphology of the films was inspected via Nomarsky interference optical microscopy, atomic force microscopy (AFM), and SEM. The crystalline quality of the films was determined through X-ray diffraction (XRD) and low-temperature photoluminescence (LTPL) analysis. A mercury probe was used to make non-contact CV/IV measurements and determine the film doping.

This dissertation research focused on the growth of 4H-SiC epitaxial layers in low-pressure horizontal hot-wall chemical vapor deposition (CVD) reactors. The goal of the research was to develop a growth process that maximized the growth rate and produced films of smooth morphology. The epitaxial growth of SiC was carried out in two different reactor sizes, a 75 mm reactor and a 200 mm reactor. The maximum repeatable growth rate achieved was 30-32 um/h in the 200 mm reactor using the standard chemistry of hydrogen-propane-silane (H2-C3H8-SiH4) at growth temperatures <̲ 1600 °C, which is the highest growth rate reported to date in a horizontal hot-wall reactor at these temperatures. This growth rate was achieved with a silane flow rate of 30 sccm. The process development and characterization of 4H-SiC epitaxial films grown using the standard chemistry are presented. There are many ways to increase the growth rate, such as changing the pressure, increasing the reactant flow rates, or increasing the temperature. The method of choice for this dissertation work was to first increase the reactant flow rates, i.e. silane flow rate, and then to alter the growth chemistry by using a growth additive. When the silane flow is increased, while maintaining a specific growth temperature, supersaturation of silicon may occur. When this happens, particulates may form and deposit onto the sample surface during growth which degrades the film morphology of the epitaxial layers. In order to overcome this severe limitation in the growth of SiC, hydrogen chloride (HCl) was added to the standard chemistry of H2-C3H8-SiH4 during growth when the SiH4 flow was increased beyond 30 sccm. With the addition of HCl, the Si supersaturation was suppressed and the growth rate was increased from ~32 um/h to ~ 49 um/h by increasing the silane precursor up to 45 sccm, while maintaining the Si/C ratio of the standard chemistry process. The addition of HCl to the standard chemistry for growth of SiC films was pioneering work that has since been duplicated by several research groups.

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This dissertation describes the development of a process for the precise positioning of semiconductor nanoparticles grown by hot wire chemical vapor deposition and thermal chemical vapor deposition on amorphous dielectrics, and it presents two studies that demonstrate the process. The studies entailed growth and characterization using surface science techniques and scanning electron microscopy. The two systems, Ge nanoparticles on HfO₂ and Si nanoparticles on Si₃N₄, are of interest because their electronic properties show potential in flash memory devices. The positioning technique resulted in nanoparticles deposited within 20 nm diameter feature arrays having a 6x10¹⁰ cm⁻² feature density. Self-assembling diblock copolymer poly(styrene-b-methyl methacrylate) thin films served as the patterning soft mask. The diblock copolymer features were transferred using a CHF₃/O₂ reactive ion etch chemistry into a thin film SiO₂ hard mask to expose the desired HfO₂ or Si₃N₄ deposition surface underneath. Selective deposition upon exposed pore bottoms was performed at conditions where adatom accumulation occurred on the HfO₂ or Si₃N₄ surfaces and not upon the SiO₂ mask template. The selective deposition temperatures for the Ge/HfO₂ and Si/Si₃N₄ systems were 700 to 800 K and 900 to 1025 K, respectively. Germanium nucleation on HfO₂ is limited from hot wire chemical vapor deposition by depositing nanoparticles within 67% of the available features. Unity filling of features with Ge nanoparticles was achieved using room temperature adatom seeding before deposition. Nanoparticle shape and size are regulated through the Ge interactions with the SiO₂ feature sidewalls with the adatom removal rate from the features being a function of temperature. The SiO₂ mask limited Ge nanoparticle growth laterally to within ~5 nm of the hard mask at 800 K. Silicon deposition on patterned Si₃N₄ has multiple nanoparticles, up to four, within individual 20 nm features resulting from the highly reactive Si₃N₄ deposition surface. Silicon nucleation and continued nanoparticle growth is a linear function of deposition flux and an inverse function of sample temperature. Diblock copolymer organization can be directed into continuous crystalline domains having ordered minority phases in a process known as graphoepitaxy. In graphoepitaxy forced alignment within microscopic features occurs provided certain dimensional constraints are satisfied. Graphoepitaxy was attempted to precisely locate 20 nm diameter features for selective Ge or Si deposition and initial studies are presented. In addition to precise nanoparticle positioning studies, kinetic studies were performed using the Ge/HfO₂ material system. Germanium hot wire chemical vapor deposition on unpatterned HfO₂ surfaces was interpreted within the mathematical framework of mean-field nucleation theory. A critical cluster size of zero and critical cluster activation energy of 0.4 to 0.6 eV were estimated. Restricting HfO₂ deposition area to a 200 nm to 100 [mu]m feature-width range using SiO₂ decreases nanoparticle density compared to unpatterned surfaces. The studies reveal the activation energies for surface diffusion, nucleation, and Ge etching of SiO₂ are similar in magnitude. Comparable activation energies for Ge desorption, surface diffusion and cluster formation obscure the change with temperature an individual process rate has on nanoparticle growth characteristics as the feature size changes. / text

The packing density of microelectronic devices has increased exponentially over the past four decades. Continuous enhancements in device performance and functionality have been achieved by the introduction of new materials and fabrication techniques. This thesis summarizes the thin film materials and metallization processes by chemical vapor deposition (CVD) developed during my graduate study with Professor Gordon at Harvard University. These materials and processes have the potential to build future generations of microelectronic devices with higher speeds and longer lifetimes. Manganese Silicate Diffusion Barrier: Highly conformal, amorphous and insulating manganese silicate \((MnSi_xO_y)\) layers are formed along the walls of trenches in interconnects by CVD using a manganese amidinate precursor vapor that reacts with the surfaces of the insulators. These \((MnSi_xO_y)\) layers are excellent barriers to diffusion of copper, oxygen and water. Manganese Capping Layer: A selective CVD manganese capping process strengthens the interface between copper and dielectric insulators to improve the electromigration reliability of the interconnects. High selectivity is achieved by deactivating the insulator surfaces using vapors containing reactive methylsilyl groups. Manganese at the Cu/insulator interface greatly increases the strength of adhesion between the copper and the insulator. Bottom-up Filling of Copper and Alloy in Narrow Features: Narrow trenches, with widths narrow than 30 nm and aspect ratios up to 9:1, can be filled with copper or copper-manganese alloy in a bottom-up fashion using a surfactant-catalyzed CVD process. A conformal manganese nitride \((Mn_4N)\) layer serves as a diffusion barrier and adhesion layer. Iodine atoms chemisorb on the \(Mn_4N\) layer and are then released to act as a catalytic surfactant on the surface of the growing copper layer to achieve void-free, bottom-up filling. Upon post-annealing, manganese in the alloy diffuses out from the copper and forms a self-aligned barrier in the surface of the insulator. Conformal Seed Layers for Plating Through-Silicon Vias: Through-silicon vias (TSV) will speed up interconnections between chips. Conformal, smooth and continuous seed layers in TSV holes with aspect ratios greater than 25:1 can be prepared using vapor deposition techniques. \(Mn_4N\) is deposited conformally on the silica surface by CVD to provide strong adhesion at Cu/insulator interface. Conformal copper or Cu-Mn alloy seed layers are then deposited by an iodine-catalyzed direct-liquid-injection (DLI) CVD process. / Chemistry and Chemical Biology