Orientador: Rodolfo Jardim de Azevedo / Tese (doutorado) - Universidade Estadual de Campinas, Instituto de Computação / Made available in DSpace on 2018-08-24T12:29:38Z (GMT). No. of bitstreams: 1 Lopes_BrunoCardoso_D.pdf: 3162388 bytes, checksum: 3a46d0fb9404a69bf87489922e4743b0 (MD5) Previous issue date: 2014 / Resumo: Sistemas embarcados modernos são compostos de SoC heterogêneos, variando entre processadores de baixo e alto custo. Apesar de processadores RISC serem o padrão para estes dispositivos, a situação mudou recentemente: fabricantes estão construindo sistemas embarcados utilizando processadores RISC - ARM e MIPS - e CISC (x86). A adição de novas funcionalidades em software embarcados requer maior utilização da memória, um recurso caro e escasso em SoCs. Assim, o tamanho de código executável é crítico, porque afeta diretamente o número de misses na cache de instruções. Processadores CISC costumavam possuir maior densidade de código do que processadores RISC, uma vez que a codificação de instruções com tamanho variável beneficia as instruções mais usadas, os programas são menores. No entanto, com a adição de novas extensões e instruções mais longas, a densidade do CISC em aplicativos recentes tornou-se similar ao RISC. Nesta tese de doutorado, investigamos a compressibilidade de processadores RISC e CISC; SPARC e x86. Nós propomos uma extensão de 16-bits para o processador SPARC, o SPARC16. Apresentamos também, a primeira metodologia para gerar ISAs de 16-bits e avaliamos a compressão atingida em comparação com outras extensões de 16-bits. Programas do SPARC16 podem atingir taxas de compressão melhores do que outros ISAs, atingindo taxas de até 67%. O SPARC16 também reduz taxas de cache miss em até 9%, podendo usar caches menores do que processadores SPARC mas atingindo o mesmo desempenho; a redução pode chegar à um fator de 16. Estudamos também como novas extensões constantemente introduzem novas funcionalidades para o x86, levando ao inchaço do ISA - com o total de 1300 instruções em 2013. Alem disso, 57 instruções se tornam inutilizadas entre 1995 e 2012. Resolvemos este problema propondo um mecanismo de reciclagem de opcodes utilizando emulação de instruções legadas, sem quebrar compatibilidade com softwares antigos. Incluímos um estudo de caso onde instruções x86 da extensão AVX são recodificadas usando codificações menores, oriundas de instruções inutilizadas, atingindo até 14% de redução no tamanho de código e 53% de diminuição do número de cache misses. Os resultados finais mostram que usando nossa técnica, até 40% das instruções do x86 podem ser removidas com menos de 5% de perda de desempenho / Abstract: Modern embedded devices are composed of heterogeneous SoC systems ranging from low to high-end processor chips. Although RISC has been the traditional processor for these devices, the situation changed recently; manufacturers are building embedded systems using both RISC - ARM and MIPS - and CISC processors (x86). New functionalities in embedded software require more memory space, an expensive and rare resource in SoCs. Hence, executable code size is critical since performance is directly affected by instruction cache misses. CISC processors used to have a higher code density than RISC since variable length encoding benefits most used instructions, yielding smaller programs. However, with the addition of new extensions and longer instructions, CISC density in recent applications became similar to RISC. In this thesis, we investigate compressibility of RISC and CISC processors, namely SPARC and x86. We propose a 16-bit extension to the SPARC processor, the SPARC16. Additionally, we provide the first methodology for generating 16-bit ISAs and evaluate compression among different 16-bit extensions. SPARC16 programs can achieve better compression ratios than other ISAs, attaining results as low as 67%. SPARC16 also reduces cache miss rates up to 9%, requiring smaller caches than SPARC processors to achieve the same performance; a cache size reduction that can reach a factor of 16. Furthermore, we study how new extensions are constantly introducing new functionalities to x86, leading to the ISA bloat at the cost a complex microprocessor front-end design, area and energy consumption - the x86 ISA reached over 1300 different instructions in 2013. Moreover, analyzed x86 code from 5 Windows versions and 7 Linux distributions in the range from 1995 to 2012 shows that up to 57 instructions get unused with time. To solve this problem, we propose a mechanism to recycle instruction opcodes through legacy instruction emulation without breaking backward software compatibility. We present a case study of the AVX x86 SIMD instructions with shorter instruction encodings from other unused instructions to yield up to 14% code size reduction and 53% instruction cache miss reduction in SPEC CPU2006 floating-point programs. Finally, our results show that up to 40% of the x86 instructions can be removed with less than 5% of overhead through our technique without breaking any legacy code / Doutorado / Ciência da Computação / Doutor em Ciência da Computação

Collecting and deploying online games made by inexperienced developers can behard. This is something KTH (Royal Institute of Technology) has a problem withpertaining to a course involving SDL and SDL_Net programming. A good solutionto this problem is to host these games on a website. An easy-to-use way of compilingand deploying multiplayer games and game-servers written in C as web applicationsand web servers was needed. Specifically for games written in C using SDL andSDL_net libraries. The compiler toolchain Emscripten was used to compile gameand server code from C to WebAssembly, that could then be used through the generated JavaScript functions. Communication between the client and the server washandled by WebSockets. As much of the Emscripten specific functions were to behidden behind C libraries, emulating the format of SDL_Net. The finished solutionsthat emulated the format of SDL_Net, consisted of two new libraries, one for theserver and the other for the client. The libraries successfully emulated the TCP partsof SDL_Net library. The browsers event scheduler necessitates applications to beable to return control back to it. This meant that the game codes endlessly loopingfunctions had to be rewritten to enable rendering in the browser. / Det kan vara svårt att samla in och distribuera onlinespel gjorda av oerfarnautvecklare. Detta är något som KTH (Kungliga Tekniska Högskolan) har problemmed i en kurs som involverar SDL och SDL_Net programmering. En bra lösning pådetta problem är att köra dessa spel på en webbsida. Ett lättanvänt sätt att kompileraoch distribuera multiplayer-spel och spelservrar skrivna i C till webbapplikationeroch webbservrar behövdes. Specifikt för spel skrivna i C med SDL och SDL_netbiblioteken. Kompileringsverktyget Emscripten användes för att kompilera spel- ochserverkod från C till WebAssembly, som sedan kunde användas genom degenererade JavaScript-funktionerna. Kommunikationen mellan klienten ochservern sköttes av WebSockets. I största möjliga mån skulle Emscripten specifikafunktioner döljas bakom C-bibliotek som emulerade formatet av SDL_Net. Defärdiga lösningarna som emulerar formatet av SDL_Net bestod av två nya bibliotek,ett för servern och det andra för klienten. De emulerade framgångsrikt TCP-delarnaav SDL_Net biblioteket. Webbläsarens händelseschemaläggare kräver attapplikationer har möjligheten att återge kontroll till den. Detta gjorde att spelkodensoändligt loopande funktioner behövdes skrivas om för att kunna rendera i webbläsaren.

Modern build systems that build large software projects often utilize a distributed compiler, allowing the compilation of object files to be parallelized over multiple machines. These build systems are often not able to fully utilize all the resources available on all machines. As linking is not part of this distributed process, the unused resources could be used to perform linking instead, reducing the total build time. However, linking is often performed at the end of the build process, thus not being able to access the previously unused resources. In this thesis project, a linker that runs concurrently with the compilation process of the build system is designed, implemented, and evaluated . As the compilation process produces an object file, the linker performs a partial link using this file. The link is finalized at the end of the build, not unlike a traditional linker. The results show that the total build time is reduced when using the new linker in a build system utilizing a distributed compiler. In some cases, the time spent linking at the end of the build system is reduced over 50 percent when compared to the reference linker.

Выпускная квалификационная работа состоит из введения, трех глав, библиографического списка и списка словарей. Во введении обоснована актуальность выбранной темы, поставлены цели и задачи. Главная цель проекта — это издание книги стихотворений. В первой главе рассматривается история русского стихосложения. Во второй главе обозначены принципы составления книг поэзии. В третьей главе представлен макет авторского сборника стихотворений. Общий объем работы составляет 80 страниц. / The graduation thesis consists of an introduction, three chapters, a bibliography, and a list of dictionaries. In the introduction, the relevance of the chosen topic is substantiated, goals and objectives are set. The main goal of the project is to publish a book of poems. The first chapter deals with the history of Russian versification. The second chapter outlines the principles for compiling books of poetry. The third chapter presents the layout of the author's collection of poems. The total volume of work is 80 pages.

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This master's thesis is describing problems of embedded systems and their development. Furthermore, the operating system GNU/Linux and it's cross-compiling is described. Hardware problems are analyzed too. Concrete solution is system which is able to boot from the USB disc and it is based on OpenWrt distribution running on Edimax BR-6104KP router. The whole solution is described the way which can lead to any general embedded system.

V této práci byly zavedeny a studovány nové systémy formálních modelů, zvané stavově synchronizované automatové systémy stupně n . Výpočet je v těchto prezentovaných systémech řízen pomocí slov patřících do konečného řídícího jazyka, kde každé slovo z tohoto jazyka je složeno ze stavů komponent systému. Dále byla v této práci studována výpočetní síla zavedených systémů. Praktické použití zavedených systémů bylo demonstrováno na příkladu z oblasti překladu přirozených jazyků a dále na příkladu z oblasti paralelního překladu.

This project addresses parallelization of building and testing projects written i Java programming language. It proposes software that uses methods of continual integration, parallelization and distribution of computationally intensive tasks to grid architecture. Suggested software helps to accelerate the development of software product and automation of its parts.