This diploma thesis deals with analysis of function and subsequent construction of a quasi-resonant DC / DC converter 300 V / 50 V for an output of about 1.5 kW. The aim of this work is to test and describe the behavior of an experimental converter at various operating parameters. In the theoretical part, resonant circuits are described, as well as our connection of the resonant converter. Based on the used topology and the simulated behavior of the converter, the individual components of the power circuit and its control and excitation circuit are designed in Chapters 4 and 5. The sixth chapter deals with the construction and testing of the converter, including a description of its behavior. The last chapter contains technical documentation.

With the increasing demands on electronic loads (e.g. desktop, laptop, monitor, LED lighting and server) in modern technology-driven lives, performance of switched-mode power supply (SMPS) for electronics have been growing to prominence. As front-end converters in typical SMPS structure, ac-dc power-factor correction (PFC) circuits play a key role in regulations of input power factor, harmonics and dc output voltage, which has a decisive effect on entire power-supply performances. Universal ac-line and low-power system (90–264 Vrms, up to 300–400 W) is one of the most common power-supply specifications and boost-derived PFC topologies have been widely used for the purpose. In order to concurrently achieve high efficiency and low-cost system in the PFC stage, zero-current switching (ZCS) control schemes are highly employed in control principles. Representative schemes are discontinuous conduction mode (DCM) and critical conduction mode (CRM). Both modes can realize ZCS turn-on without diode reverse recovery so that low switching losses and low-cost diode utilizations are obtainable. Among various boost-family PFC topologies, three-level boost (TLB) converter has generated considerable research interest in high-voltage high-power applications. It is mainly due to the fact that the topology can have halved component voltage stresses, improved waveform qualities and electromagnetic interference (EMI) from phase interleaved continuous conduction mode (CCM) operations, compared to other two-level boost PFC converters. On the other hand, in the field of universal-line low-power applications, TLB PFC has been thoroughly out of focus since doubled component counts and increased control complexity than two-level topologies are practical burden for the low-cost systems. However, recent researches on TLB PFC with ZCS control schemes have found that cost-competitiveness of the topology is actually comparable to two-level boost PFC converters because the halved component voltage stresses enable usage of low voltage-rating components of which unit prices are cheaper than higher-rating ones. Based on the justification, researches on ZCS control schemes for TLB PFC have been conducted to get enhanced waveform qualities and performance factors. Following the research stream, a three-level current modulation scheme that can be adopted in both DCM and CRM is proposed in Chapter 2 of this dissertation. Main concept of the proposed current modulation is additional degree-of-freedom in current-slope shaping by differentiating on-times of two active switches, which cannot be found from any other single-phase boost-derived PFC topologies. Using the multilevel feature, proposed operations in one switching period consist of three steps: common-switch on-time, single-switch on-time and common-switch off-time. The single-switch on-time step is key design factor of the proposed modulation that can be utilized either in fixed or adjustable form depending on control purpose. Based on the basic modulation concept, three-level CRM control scheme, adjustable three-level DCM control scheme, and spread-spectrum frequency modulation (SSFM) with adjustable three-level DCM scheme are proposed in Chapter 3–5, respectively. In each chapter, implemented control scheme aims to improve different performance factors. In Chapter 3, the proposed three-level CRM scheme uses increased single-switch on-time period to reduce peak inductor current and magnitude of variable switching frequency. It is generally accepted fact that CRM operations suffer from high switching losses and poor efficiency at light load due to considerable increment of switching frequency. Thus, efficiency improvement effect by the proposed CRM scheme becomes remarkable as load condition goes lighter. In experimental verifications, maximum improvement is measured by 1.2% at light load (20%) and overall efficiency is increased by at least 0.4% all over the load range. In Chapter 4, three-level DCM control scheme adopts adjustable single-switch on-time period in fixed switching-frequency framework. The purpose of adjustable control scheme is to widen the length of non-zero inductor current period as much as possible so that discontinued current period and high peak current of DCM operations can be minimized. Experiment results show that, compared to conventional two-level DCM control, full-load peak inductor currents are reduced by 20.2% and 17.1% at 110 and 220 Vrms input voltage conditions, respectively. Moreover, due to turn-off switching energy decrements by the turn-off current reductions, efficiency is also improved by at least 0.4% regardless of input voltage and load conditions. In Chapter 5, a downward SSFM technique is developed first for DCM operations of boosting PFC converters including two-level topologies. This chapter aims to achieve significant reduction of high differential-mode (DM) EMI amplitudes from DCM operations, which is major drawback of DCM control. By using the simple linearized frequency modulation, peak DM EMI noise at full load condition is reduced by 12.7 dBμV than conventional fixed-frequency DCM control. On top of the proposed SSFM, the adjustable three-level DCM control scheme in Chapter 4 is adopted to get further reductions of EMI noises. Experimental results prove that the collaborations of SSFM and adjustable DCM scheme reduce the EMI amplitudes further by 2.5 dBμV than the result of SSFM itself. The reduced EMI amplitudes are helpful to design input EMI filter with higher cut-off frequency and smaller size. Different from two-level boosting PFC converters, TLB PFC topology has two output capacitors in series and inherently suffers from voltage unbalancing issue, which can be noted as topological trade-off. In Chapter 6, two simple but effective voltage balancing schemes are introduced. The balancing schemes can be easily built into the proposed ZCS control schemes in Chapter 3–5 and experimental results validate the effectiveness of the proposed balancing principles. For all the proposed control schemes in this dissertation, detailed operation principles, derivation process of key equations, comparative analyses, implementation method with digital controller and experimental verifications with TLB PFC prototype are provided. / Doctor of Philosophy / Electronic-based devices and loads have been essential parts of modern society founded on rapid advancements of information technologies. Along with the progress, power supplying and charging of electronic products become routinized in daily lives, but still remain critical requisites for reliable operations. In many power-electronics-based supplying systems, ac-dc power-factor correction (PFC) circuits are generally located at front-end to feed back-end loads from universal ac-line sources. Since PFC stages have a key role in regulating ac-side current quality and dc-side voltage control, the importance of PFC performances cannot be emphasized enough from entire system point of view. Thus, advanced control schemes for PFC converters have been developed in quantity to achieve efficient operations and competent power qualities such as high power factor, low harmonic distortions and low electromagnetic interferences (EMI) noises. In this dissertation, a sort of PFC topologies named three-level boost (TLB) converter is chosen for target topology. Based on inherent three-level waveform capability of the topology, multiple zero-current switching (ZCS) control schemes are proposed. Compared to many conventional two-level PFC topologies, TLB PFC can provide additional degree-of-freedom to current modulation. The increased control flexibility can realize improvements of various waveform qualities including peak current stress, switching frequency range, harmonics and EMI amplitude. From the experimental results in this dissertation, improvements of waveform qualities in TLB PFC with the proposed schemes are verified with comparison to two-level current control schemes; in terms of efficiency, the results show that TLB PFC with the proposed schemes can have similar converter efficiency with conventional two-level boost converter in spite of increased component counts in the topology. Further, the proposed three-level control schemes can be utilized in adjustable forms to accomplish different control objectives depending on system characteristics and applications. In each chapter of this dissertation, a novel control scheme is proposed and explained with details of operation principle, key equations and digital implementation method. All the effectiveness of proposals and analyses are validated by a proper set of experimental results with a TLB PFC prototype.

Boost dc-to-dc converters have very good source interface properties. The input inductor makes the source current smooth and hence these converters provide very good EMI performance. On account of this good property, the boost converter is also the preferred converter for off-line UPF rectifiers. One of the issues of concern in these converters is the large size of the storage capacitor on the dc link. The boost converter suffers from the disadvantage of discontinuous current injected to the load. The size of the capacitor is therefore large. Further, the ripple current in the capacitor is as much as the load current; hence the ESR specification of the tank capacitor is quite demanding. This is specially so in the emerging application areas of automotive power conversion, where the input voltage is low (typically 12V) and large voltage boost (4 to 5) are desired. The first part of this thesis suggests multi-phase boost converter to overcome the disadvantages of large size storage capacitor in boost converter. Comparison between the specification of single stage and multi-stages is thoroughly examined. Besides the average small signal analysis of N converters in parallel and obtaining an equivalent second order system are discussed. By paralleling the converters the design of closed loop control is a demanding task. To achieve proper current sharing among the stages using current control method is inevitable. Design and implementation of closed loop control of multi-phase boost converter both in analog and digital is the topic of next part of the thesis. Comparison between these two approaches is presented in this part and it will be shown that digital control is more convenient for such a topology on account of the requirement of synchronization, phase shifted operation, current balancing and other desired functions, which will be discussed later in detail. A new direct digital control method, which is simple and fast, is developed. Two different realizations with DSP controller and FPGA controller are considered. In the last part of the thesis a novel soft switching circuit for boost converter is presented. It provides Zero Voltage Switching (ZVS) for the main switch and Zero Current Switching (ZCS) for the auxiliary switch. The paper presents the idealized analysis giving all the circuit intervals and the equations necessary for the design of such a circuit. The proposed soft switching circuit is particularly suited for the tapped-inductor boost circuit with a minimum number of extra components. Extension of the method to tapped inductor boost converter addresses the application of Zero Voltage Transition (ZVT) to high conversion ratio converters. Extension of the method to multiphase boost converter shows that with less number of auxiliary switches soft switching operation can be achieved for all interleaved switching devices. Several laboratory prototype boost converters have been built to confirm the theoretical results and design methods are matching with both simulation and experimental results.

With the increasing demand for fast, cheaper, and efficient power converters come the need for a single-stage power factor correction (PFC) converter. Various single-stage PFC converter proposed in the literature has the drawback of high DC bus voltage at the input side and together with the shift to wide bandgap switches like GaN drives the converter cost higher. However, an interleaved topology with high-frequency isolation was proposed in this research work due to the drastic reduction in the DC bus voltage and extremely low input current ripple thereby making the need for an EMI filter circuit optional.   Meanwhile, this research work focuses on adapting the proposed topology for a high voltage low current application (EV charger - 400V, 7KW) and low voltage high current application (telecom power supply - 58V,  58A) owing to cost benefits. However, all single-stage PFC are faced with the drawback of second-order (100Hz) output harmonic ripple. Therefore, the design and simulation presented a huge peak to peak ripple of about 50V/3A and 26V/26A for the EV charger and telecom power supply case, respectively. This created the need for the design of a ripple cancellation circuit as the research required a peak to peak ripple of 8V and 200mV for the EV - charger and telecom power supply, respectively.   A novel output passive ripple cancellation technique was developed for the EV charger case due to the ease it offers in terms of control, circuit complexity and extremely low THDi when compared with the active cancellation approach. The ripple circuit reduced the 50V ripple to 431mV with the use of a total of 2.2mF capacitance at the output stage.   Despite designing the passive technique, an active ripple cancellation circuit was designed using a buck converter circuit for the telecom power supply. The active approach was chosen because the passive has a slow response and incurs more loss at a high current level. Adding the active ripple cancellation circuit led to a quasi-single stage LLC PFC converter topology. A novel duty-ratio feedforward control was added to synchronize the PFC control of the input side with the buck topology ripple cancellation circuit. The addition of the ripple circuit with the feedforward control offered a peak to peak ripple of 6.7mV and a reduced resonant inductor current by half.   After analysis, an extremely low THDi of 0.47%, PF of 99.99% and a peak efficiency of 97.1% was obtained for the EV charger case. The telecom power supply offered a THDi of 2.3%, PF of 99.96% with a peak efficiency of 95%.

Energy harvesting is identified as an alternative solution for powering implantable biosensors. It can potentially enable the development of self-powered implants if the harvested energy is properly handled. This development implies that batteries, which impose many limitations, are replaced by miniature harvesting devices. Customized interface circuits are necessary to correct for differences in the voltage and power levels provided by harvesting devices from one side, and required by biosensor circuits from another. This thesis investigates the available harvesting sources within the human body, proposes various methods and techniques for designing power-efficient interfaces, and presents two CMOS implementations of such interfaces. Based on the investigation of suitable sources, this thesis focuses on glucose biofuel cells and thermoelectric harvesters, which provide appropriate performance in terms of power density and lifetime. In order to maximize the efficiency of the power transfer, this thesis undertakes the following steps. First, it performs a detailed analysis of all potential losses within the converter. Second, in relation to the performed analysis, it proposes a design methodology that aims to minimize the sum of losses and the power consumption of the control circuit. Finally, it presents multiple design techniques to further improve the overall efficiency. The combination of the proposed methods and techniques are validated by two highly efficient energy harvesting interfaces. The first implementation, a thermoelectric energy harvesting interface, is based on a single-inductor dual-output boost converter. The measurement results show that it achieves a peak efficiency of 86.6% at 30 μW. The second implementation combines the energy from two sources, glucose biofuel cell and thermoelectric harvester, to accomplish reliable multi-source harvesting. The measurements show that it achieves a peak efficiency of 89.5% when the combined input power is 66 μW. / Energiskörd har identifierats som en alternativ lösning för att driva inplanterbara biosensorer. Det kan potentiellt möjliggöra utveckling av själv-drivna inplanterbara biosensorer. Denna utveckling innebär att batterier, som sätter många begränsningar, ersätts av miniatyriserade energiskördsenheter. Anpassade gränssnittskretsar är nödvändiga för att korrigera för de skillnader i spänning och effektnivå som produceras av de energialstrande enheterna, och de som krävs av biosensorkretsarna. Denna avhandling undersöker de tillgängliga källorna för energiskörd i den mänskliga kroppen, föreslår olika metoder och tekniker för att utforma effektsnåla gränssnitt och presenterar två CMOS-implementeringar av sådana gränssnitt. Baserat på undersökningen av lämpliga energiskördskällor, fokuserar denna avhandling på glukosbiobränsleceller och termoelektriska energiskördare, som har lämpliga prestanda i termer av effektdensitet och livstid. För att maximera effektiviteten hos effektöverföringen innehåller denna avhandling följande steg. Först görs en detaljerad analys av alla potentiella förluster inom boost-omvandlare. Sedan föreslår denna avhandling en designmetodik som syftar till att maximera den totala effektiviteten och effektförbrukningen. Slutligen presenterar den flera designtekniker för att ytterligare förbättra den totala effektiviteten. Kombinationen av de föreslagna metoderna och teknikerna är varierade genom två högeffektiva lågeffekts energigränssnittskretsar. Den första inplementeringen är ett termoelektriskt energiskördsgränssnitt baserat på en induktor, med dubbla utgångsomvandlare. Mätresultaten visar att omvandlaren uppnår en maximal effektivitet av 86.6% vid 30 μW. Det andra genomförandet kombinerar energin från två källor, en glukosbiobränslecell och en termoskördare, för att åstadkomma en tillförlitlig multi-källas energiskördslösning. Mätresultaten visar att omvandlaren uppnår en maximal effektivitet av 89.5% när den kombinerade ineffekten är 66 μW. / <p>QC 20170508</p> / Mi-SoC

The project deals with the design of a switch-mode power supply (SMPS) with a medium and high power output. The power supply uses multiphase control switching. Electric energy is converted through a series parallel LLC resonant circuit to reach the maximum efficiency with a small size and cost efficiency of the designed power supply. The semiconductor switches use ZVS (Zero Voltage Switching) on the primary side and ZCS (Zero Current Switching) on the secondary side of the converter. The design of the converter is based on the knowledge of the high power output converters (types of switching, art topologies) and resonant topologies (series resonant circuit – SRC, parallel resonant circuit – PRC and series parallel circuit –SPRC). The design of the converter was done theoreticaly and tested by using simulation program. The simulation and partial tests served to build prototype the Interleaves Converter (ILLC). The function of the converter was tested in laboratory. The laboratory results have been compared with the theoretical and the simulation results.