京都大学 / 0048 / 新制・課程博士 / 博士(工学) / 甲第18992号 / 工博第4034号 / 新制||工||1621(附属図書館) / 31943 / 京都大学大学院工学研究科電気工学専攻 / (主査)教授 篠原 真毅, 教授 和田 修己, 教授 山川 宏 / 学位規則第4条第1項該当 / Doctor of Philosophy (Engineering) / Kyoto University / DFAM

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In this Thesis a Unified Discrete State-Space Model for power converters in CCM is presented. Two main approaches to arriving at the discrete model are used. The first approach involves an impulse function approximation of the duty cycle modulations of the converter switches , and this approach results in a small signal discrete model. The Second approach is direct and does not involve any approximation of the modulations , this approach yields both a large signal nonlinear discrete model and a linear small signal model. Harmonic analysis of the converter states at steady-state is done for steady-state waveform acquisition , which increases the accuracy of the model especially for finding the control to inductor current frequency response. Finally the Discrete model is verified for the Half-Bridge DC/DC topology for its three main control schemes (Asymmetric , Symmetric , DCS). A GUI platform in MATLAB is presented as a wrapper that utilizes the models and analysis presented in this thesis.

Active transient voltage compensator (ATVC) has been proposed to improve VR transient response at high slew rate load, which engages in transient periods operating in MHZ to inject high slew rate current in step up load and recovers energy in step down load. Main VR operates in low switching frequency mainly providing DC current. Parallel ATVC has largely reduced conduction and switching losses. Parallel ATVC also reduces the number of VR bulk capacitors. Combined linear and adaptive nonlinear control has been proposed to reduce delay times in the actual controller, which injects one nonlinear signal in transient periods and simplifies the linear controller design. Switching mode current compensator with nonlinear control in secondary side is proposed to eliminate the effect of opotocoupler, which reduces response times and simplifies the linear controller design in isolated DC-DC converters. A novel control method has been carried out in two-stage isolated DC-DC converter to simplify the control scheme and improve the transient response, allowing for high duty cycle operation and large step-down voltage ratio with high efficiency. A balancing winding network composed of small power rating components is used to mitigate the double pole-zero effect in complementary-controlled isolated DC-DC converter, which simplifies the linear control design and improves the transient response without delay time. A parallel post regulator (PPR) is proposed for wide range input isolated DC-DC converter with secondary side control, which provides small part of output power and most of them are handled by unregulated rectifier with high efficiency. PPR is easy to achieve ZVS in primary side both in wide range input and full load range due to 0.5 duty cycle. PPR has reduced conduction loss and reduced voltage rating in the secondary side due to high turn ratio transformer, resulting in up to 8 percent efficiency improvement in the prototype compared to conventional methods.

Evolutions in integrated circuit technology require the use of a high-frequency synchronous buck converter in order to achieve low cost, low profile, fast transient response and high power density. However, high frequency operation leads to increased power MOSFET switching losses. Optimization of the MOSFETs plays an important role in improving converter performance. This dissertation focuses on revealing the power loss mechanism of power MOSFETs and the relationship between power MOSFET structure and its power loss. The analytical device model, combined with circuit modeling, cannot reveal the relationship between device structure and its power loss due to the highly non-linear characteristics of power MOSFETs. A physically-based mixed device/circuit modeling approach is used to investigate the power losses of the MOSFETs under different operating conditions. The physically based device model, combined with SPICE-like circuit simulation, provides an expeditious and inexpensive way of evaluating and optimizing circuit and device concepts. Unlike analytical or other SPICE models of power MOSFETs, the numerical device model, relying little on approximations or simplifications, faithfully represents the behavior of realistic power MOSFETs. The impact of power MOSFET parameters on efficiency of synchronous buck converters, such as gate charge, on resistance, reverse recovery, is studied in detail in this thesis. The results provide a good indication on how to optimize power MOSFETs used in VRMs. The synchronous rectifier plays an important role in determining the performance of the synchronous buck converter. The reverse recovery of its body diode and the Cdv/dt induced false trigger-on are two major mechanisms that impact SyncFET's performance. This thesis gives a detailed analysis of the SyncFET operation mechanism and provides several techniques to reduce its body-diode influence and suppress its false Cdv/dt trigger-n. This thesis also investigates the influence of several circuit level parameters on the efficiency of the synchronous buck converter, such as input voltage, circuit parasitic inductance, and gate resistance to provide further optimization of synchronous buck converter design.

Renewable energy source plays an important role in energy co-generation and distribution. A traditional solar-based inverter system has two stages cascaded, which has simpler controller but low efficiency. A new solar-based single-stage grid-connected inverter system can achieve higher efficiency by reducing the power semiconductor switching loss and output stable and synchronizing sinusoid current into the utility grid. In Chapter 1, the characteristic I-V and P-V curve of PV array has been illustrated. Based on prediction of the PV power capacity installed on the grid-connected and off-grid, the trends of grid-tied inverter for DG system have been analyzed. In Chapter 2, the topologies of single-phase grid-connect inverter system have been listed and compared. The key parameters of all these topologies are listed in a table in terms of topology, power decoupling, isolation, bi-directional/uni-directional, power rating, switching frequency, efficiency and input voltage. In Chapter 3, to reduce the capacitance of input filter, an active filter has been proposed, which will eliminate the 120/100Hz low frequency ripple from the PV array's output voltage completely. A feedforward controller is proposed to optimize the step response of PV array output voltage. A sample and hold also is used to provide the 120/100Hz low frequency decoupling between the controller of active filter and inverter stage. In Chapter 4, the single-stage inverter is proposed. Compared with conventional two-stage inverter, which has two high frequency switching stages cascaded, the single-stage inverter system increases the system efficiency by utilizing DC/DC converter to generate rectified sinusoid voltage. A transformer analysis is conducted for the single-stage inverter system, which proves the transformer has no low-frequency magnetic flux bias. To apply peak current mode control on single-stage inverter and get unified loop gain, adaptive slope compensation is also proposed for single-stage inverter. In Chapter 5, a digital controller for single-stage inverter is designed and optimized by the Matlab Control Toolbox. A Psim simulation verified the performance of the digital controller design. In Chapter 6, three bi-directional single-stage inverter topologies are proposed and compared. A conventional single-stage bi-directional inverter has certain shortcoming that cannot be overcome. A modular grid-connect micro-inverter system with dedicated reactive energy processing unit can overcome certain shortcoming and increase the system efficiency and reliability. A unique controller design is also proposed. In Chapter 7, a PFM ZCS flyback inverter system is invented. By using half-wave quasi-resonant ZCS flyback resonant converter and PFM control, this topology completely eliminates switching loss. A detailed mathematical analysis provides all the key parameters for the inverter design. As the inductance of transformer secondary side get smaller, the power stage transfer function of PFM ZCS flyback inverter system demonstrates nonlinearity. An optimized PFM ZCS flyback DC/DC converter design resolves this issue by introducing a MOSFET on the secondary side of transformer. In Chapter 8, experimental results of uni-direcitonal single-stage inverter with grid-connection, bi-directional single-stage inverter and single-stage PFM ZCS flyback inverter have been provided. Conclusions are given in Chapter 9.

A monolithically integrated smart rectifier has been presented first in this work. The smart rectifier, which integrates a power MOSFET, gate driver and control circuitry, operates in a self-synchronized fashion based on its drain-source voltage, and does not need external control input. The analysis, simulation, and design considerations are described in detail. A 5V, 5-µm CMOS process was used to fabricate the prototype. Experimental results show that the proposed rectifier functions as expected in the design. Since no dead-time control needs to be used to switch the sync-FET and ctrl-FET, it is expected that the body diode losses can be reduced substantially, compared to the conventional synchronous rectifier. The proposed self-synchronized rectifier (SSR) can be operated at high frequencies and maintains high efficiency over a wide load range. As an example of the smart rectifier's application in isolated DC-DC converter, a synchronous flyback converter with SSR is analyzed, designed and tested. Experimental results show that the operating frequency could be as high as 4MHz and the efficiency could be improved by more than 10% compared to that when a hyper fast diode rectifier is used. Based on a new current-source gate driver scheme, an integrated gate driver for buck converter is also developed in this work by using a 0.35µm CMOS process with optional high voltage (50V) power MOSFET. The integrated gate driver consists both the current-source driver for high-side power MOSFET and low-power driver for low-side power iv MOSFET. Compared with the conventional gate driver circuit, the current-source gate driver can recovery some gate charging energy and reduce switching loss. So the current-source driver (CSD) can be used to improve the efficiency performance in high frequency power converters. This work also presents a new implementation of a power supply in package (PSiP) 5MHz buck converter, which is different from all the prior-of-art PSiP solutions by using a high-Q bondwire inductor. The high-Q bondwire inductor can be manufactured by applying ferrite epoxy to the common bondwire during standard IC packaging process, so the new implementation of PSiP is expected to be a cost-effective way of power supply integration.

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Battery energy storage system (BESS) is promising to be implemented in residential applications for supporting PV integration, load shifting, and backup power purposes. For this application, 48V second-life battery draws more and more attentions for their cost-effectiveness, safe voltage level, reliability, and potential large market. This thesis proposes the comprehensive control and design of an isolated battery-driven grid interface (IBDGI) with the dual-active-bridge (DAB) converter for residential applications with 48V battery pack. The three-phase DAB converter is a promising candidate as the front-end DC/DC converter in the two-stage IBDGI due to its high efficiency, high power density, and low capacitance requirement. An effective design strategy for the three-phase DAB converter is proposed based on the zero-voltage-switching (ZVS) zone and back-ow power to achieve high efficiency for a wide operating voltage range and different load conditions. Based on the power loss model, an easily-implemented variable switching frequency operating method is proposed to further increase the efficiency at light load conditions. The dead-time effect is observed in the three-phase DAB converter. To avoid the dead-time effect and better understand the phenomena, a comprehensive analysis is proposed. All the cases of the dead-time effect in the three-phase DAB converter are analyzed in terms of the buck, boost, and matching states. The expressions of the transmission power, constraint conditions, and key time of the dead-time effect are derived for each state. The operation waveforms of the dead-time effect are also presented. The hybrid capacitor bank composed by the LC resonant lter with electrolytic capacitor and lm capacitor is utilized for the DC bus of the IBGDI. The electrolytic capacitors work as passive decoupling purpose while the lm capacitor is responsible for high switching harmonic ltering. Moreover, a current sharing method between the hybrid capacitor bank is proposed to extend the electrolytic capacitor's life. The LCL single-phase inverter is applied for the downstream of the IBDGI. A step-by-step design procedure of the LCL lter with passive damping is proposed for the 120V/240V dual grid-tied and standalone modes. The PR controllers are also designed for the LCL inverter for standalone and grid-tied modes. At the system level, a novel second harmonic current (SHC) reduction strategy is proposed for the IBDGI with the three-phase DAB converter by adding a load current feedforward (LCFF) path to the DAB voltage closed-loop controller. This method will suppress the SHC without modi cations of the original controller's bandwidth, which make it easy to be implemented. The small-signal model of the three-phase DAB converter is provided and veri ed by the step response. The parameter sensitivity analysis for the LCFF method is proposed to show that the SHC is well suppressed within ±20% parameter error. The proposed converter and control methods are veri ed by simulation and experimental results. / Thesis / Doctor of Philosophy (PhD)