No description available.

A new equivalent circuit model for IGBT is presented. It takes into account both electron and hole conduction in sensors and is incorporated with SPICE3 for the simulation of three types of current sensors, namely active, bipolar, and MOS sensors. It adopts a multi-MOS model to include the doping variation in the MOS body. The results agree well with the current sensing measurements within an average error of 4.4%.

The use of Insulated Gate Bipolar Transistors (IGBT) have enabled better switching performance than the Metal Oxide Semiconductor Field effect Transistor (MOSFET) in medium to high power applications due to their lower on-state power loss and higher current densities. The power ratings of IGBTs are slowly increasing and are envisaged to replace thyristors in medium power applications such as High Voltage Direct Current (HVDC) inverter systems and traction drive controls. Devices such as the MOS Controlled Thyristor (MCT) and Emitter Switched Thyristor (EST) were developed in an effort to further simplify drive requirements of thyristors by incorporating a voltage controlled MOS gate into the thyristor structure. However, the MCT is unable to achieve controlled current saturation which is a desirable characteristic of power switching devices while the EST has only limited control. The IGBT can achieve current saturation, however, due to the transistor based structure it exhibits a larger on-state voltage in high power applications compared with thyristor based devices. MOS Gated Thyristor (MGT) devices are a promising alternative to transistor based devices as they exhibit a lower forward voltage drop and improved current densities. This current research focuses on the Clustered Insulated Gate Bipolar Transistor (CIGBT) whilst being operated under soft-switching regimes. The CIGBT is a MOS gated thyristor device that exhibits a unique self-clamping feature that protects cathode cells from high anode voltages under all operating conditions. The self-clamping feature also enables current saturation at high gate biases and provides low switching losses. Its low on-state voltage and high voltage blocking capabilities make the CIGBT suitable as a contender to the IGBT in medium to high power switching applications. For the first time, the CIGBT has been operated under soft-switching regimes and transient over-voltages at turn-on have been witnessed which have been found to be associated with a number of factors. The internal dynamics of the CIGBT have been analysed using 2D numerical simulations and it has been shown that a major influence on the peak voltage is the P well spacing within the CIGBT structure. For example, Small adjacent P well spacings within the device results in an inability for the CIGBT to switch iv on correctly. Further to this, implant concentrations of the n well region during device fabrication can also affect the turn-on transients. Despite this, the CIGBT has been experimental analysed under soft-switching conditions and found to outperform the IGBT by 12% and 27% for on-state voltage drop and total energy losses respectively. Turn off current bumps have been seen whilst switching the device in zero voltage and zero current switching mode of operation and the internal dynamics have been analysed to show the influence upon the current at turn off. Preliminary results on the Trench CIGBT (TCIGBT) under soft switching conditions has also been analysed for the first time and was found to have a reduced peak over-voltage and better switching performance than the planer CIGBT. Through optimisation of the CIGBT structure and fabrication process, it is seen that the device will become a suitable replacement to IGBT in medium power application.

Gallium Nitride (GaN) is considered a very promising material for use in the field of power devices as its application in power systems would result in a significant increase in the power density, reduced power losses, and the potential to operate at high frequencies. The wide bandgap of the material allows a high critical electric field to be sustained which can lead to the design of devices with a shorter drift region, and therefore with lower on-state resistance, if compared to a silicon-based device with the same breakdown voltage. The use of an AlGaN/GaN heterostructure allows the formation of a two-dimensional electron gas (2DEG) at the heterointerface where carriers can reach very high mobility values. These properties can lead to the production of High Electron Mobility Transistors (HEMTs) and Schottky barrier diodes with superior performance, even when compared to devices based on state-of-the-art technologies such as Silicon Carbide or superjunctions. Furthermore, epitaxial growth of GaN layers on silicon wafers allows a significant reduction in the production cost and makes these devices competitive from a price perspective. This thesis will deal with a variety of topics concerning the characterization, design and optimization of AlGaN/GaN HEMTs and Schottky diodes with a 600 to 650V rating. Discussion will span several topics from device cross-section physics to circuit implementation and will be based on both experimental results and advanced modelling. More specifically, the thesis is concerned with the characterization of AlGaN/GaN Schottky diodes and extraction of their main parameters such as ideality factor, barrier height and series resistance. A thorough investigation of their reverse recovery performance and a comparison to competing technologies is also given. Several topics which concern the operation of AlGaN/GaN HEMTs are then discussed. The underlying physics of p-gate enhancement mode transistors are analysed followed by a discussion of the challenges associated with the implementation of these devices at a circuit level. Finally, a comparison of the performance of a specific area-saving layout (Bonding pad over active area) and a conventional design is given. The thesis aims to significantly enhance the understanding of the behaviour of these devices to enable better or new commercial designs to emerge.

This Ph.D. thesis carries out extensive and in-depth research on the packaging technology of silicon carbide (SiC) power modules, including new packaging structures, multi-physics modeling and optimal design methods for half-bridge power modules, manufacturing processes, and experimental validations. A new packaging scheme, the Silver-Sintered Molybdenum (SSM) packaging, is proposed in this thesis. It contains a molybdenum (Mo) -based insulated-metal-substrate (IMS) structure, nano-silver sintering die-attachments, and planar interconnections. This technology has the potential to increase the operating temperature of SiC power modules to above 200 degrees, and can greatly improve their lifetime. These advantages are verified by active power cycling and passive temperature cycling simulations. Analytical modeling methods for half-bridge power modules with the SSM packaging are also studied. A decoupled Fourier-based thermal model is introduced. This model considers the decoupling effect between different heat source regions and can give a three-dimensional analytical solution for the temperature field of a simplified half-bridge power module structure. In addition, based on the partial inductance model for rectangular busbars, an analytical stray inductance model for half-bridge power modules is also proposed. The accuracy of these two models is estimated by both numerical simulations and experiments. With the proposed analytical models, an optimal design method for half-bridge power modules with the SSM packaging is proposed in this study, which uses the particle swarm optimization algorithm. This method is successfully applied in the design of a prototype power module and is able to minimize the stray inductance and volume while maintaining desired junction temperatures. This thesis also introduces the manufacturing process of the prototype power module. Several new processes are proposed and validated, including a pressure-less nano-silver sintering process to bond SiC dies on Mo substrates, the formation of the Mo-based IMS structure, and the re-metallization of SiC dies. / Thesis / Doctor of Philosophy (PhD)

The Emitter Controlled Thyristor (ECT) is a new MOS-Gated Thyristor (MGT) that combines the ease of a MOS gate control with the superior current carrying capability of a thyristor structure for high-power applications. An ECT is composed of an emitter switch in series with the thyristor, an emitter-short switch in parallel with the emitter junction of the thyristor, a turn-on FET and the main thyristor structure. Numerical analysis shows that the ECT also offers superior high voltage current saturation capability even for high breakdown voltage ratings. Two different ECT structures are investigated in this research from numerical simulations to experimental fabrications. A novel ECT structure that utilizes IGBT compatible fabrication process was proposed. The emitter short FET, emitter switch FET and turn-on FET are all integrated with a high voltage thyristor. Numerical simulation results show that the ECT has a better conductivity modulation than that of the IGBT and at the same time exhibits superior high voltage current saturation capability, superior FBSOA and RBSOA. The technology trade-off between turn-off energy loss and forward voltage drop of the ECT is also better than that of the IGBT because of the stronger conductivity modulation. A novel self-aligned process is developed to fabricate the device. Experimental characteristics of the fabricated ECT devices show that the ECT achieves lower forward voltage drop and superior high voltage current saturation capability. A Hybrid ECT (HECT) structure was also developed in this research work. The HECT uses an external FET to realize the emitter switching function, hence a complicated fabrication issue was separated into two simple one. The cost of the fabrication decreases and the yield increases due to the hybrid integration. Numerical simulations demonstrate the superior on-state voltage drop and high voltage current saturation capability. A novel seven-mask process was developed to fabricate the HECT. Experimental results show that the HECT could achieve the lower forward voltage drop and superior current saturation capability. The resistive switching test was carried out to demonstrate the switching characteristics of the HECT. / Master of Science

The Emitter Controlled Thyristor (ECT) is a new MOS-Gated Thyristor (MGT) that combines the ease of a MOS gate control with the superior current carrying capability of a thyristor structure for high-power applications. An ECT is composed of an emitter switch in series with the thyristor, an emitter-short switch in parallel with the emitter junction of the thyristor, a turn-on FET and the main thyristor structure. Numerical analysis shows that the ECT also offers superior high voltage current saturation capability even for high breakdown voltage ratings. Two different ECT structures are investigated in this research from numerical simulations to experimental fabrications. A novel ECT structure that utilizes IGBT compatible fabrication process was proposed. The emitter short FET, emitter switch FET and turn-on FET are all integrated with a high voltage thyristor. Numerical simulation results show that the ECT has a better conductivity modulation than that of the IGBT and at the same time exhibits superior high voltage current saturation capability, superior FBSOA and RBSOA. The technology trade-off between turn-off energy loss and forward voltage drop of the ECT is also better than that of the IGBT because of the stronger conductivity modulation. A novel self-aligned process is developed to fabricate the device. Experimental characteristics of the fabricated ECT devices show that the ECT achieves lower forward voltage drop and superior high voltage current saturation capability. A Hybrid ECT (HECT) structure was also developed in this research work. The HECT uses an external FET to realize the emitter switching function, hence a complicated fabrication issue was separated into two simple one. The cost of the fabrication decreases and the yield increases due to the hybrid integration. Numerical simulations demonstrate the superior on-state voltage drop and high voltage current saturation capability. A novel seven-mask process was developed to fabricate the HECT. Experimental results show that the HECT could achieve the lower forward voltage drop and superior current saturation capability. The resistive switching test was carried out to demonstrate the switching characteristics of the HECT. / Master of Science

No description available.

Power management solutions such as voltage regulator (VR) mandate DC-DC converters with high power density, high switching frequency and high efficiency to meet the needs of future computers and telecom equipment. The trend towards DC-DC converters with higher switching frequency presents significant challenges to power MOSFET technology. Optimization of the MOSFETs plays an important role in improving low-voltage DC-DC converter performance. This dissertation focuses on developing and optimizing high performance low voltage power MOSFETs for high frequency applications. With an inherently large gate charge, the trench MOSFET suffers significant switching power losses and cannot continue to provide sufficient performance in high frequency applications. Moreover, the influence of parasitic impedance introduced by device packaging and PCB assembly in board level power supply designs becomes more pronounced as the output voltage continues to decrease and the nominal current continues to increase. This eventually raises the need for highly integrated solutions such as power supply in package (PSiP) or on chip (PSoC). However, it is often more desirable in some PSiP architectures to reverse the source/drain electrodes from electrical and/or thermal point of view. In this dissertation, a stacked-die Power Block PSiP architecture is first introduced to enable DC-DC buck converters with a current rating up to 40 A and a switching frequency in the MHz range. New high- and low-side NexFETs are specially designed and optimized for the new PSiP architecture to maximize its efficiency and power density. In particular, a new NexFET structure with iv its source electrode on the bottom side of the die (source-down) is designed to enable the innovative stacked-die PSiP technology with significantly reduced parasitic inductance and package footprint. It is also observed that in synchronous buck converter very fast switching of power MOSFETs sometimes leads to high voltage oscillations at the phase node of the buck converter, which may introduce additional power loss and cause EMI related problems and undesirable electrical stress to the power MOSFET. At the same time, the synchronous MOSFET plays an important role in determining the performance of the synchronous buck converter. The reverse recovery of its body diode and the Cdv/dt induced false trigger-on are two major mechanisms that impact the performance of the SyncFET. This dissertation introduces a new approach to effectively overcome the aforementioned challenges associated with the state-of-art technology. The threshold voltage of the low-side NexFET is intentionally reduced to minimize the conduction and body diode related power losses. Meanwhile, a monolithically integrated gate voltage pull-down circuitry is proposed to overcome the possible Cdv/dt induced turn-on issue inadvertently induced by the low VTH SynFET. Through extensive modeling and simulation, all these innovative concepts are integrated together in a power module and fabricated with a 0.35µm process. With all these novel device technology improvements, the new power module delivers a significant improvement in efficiency and offers an excellent solution for future high frequency, high current density DC-DC converters. Megahertz operation of a Power v Block incorporating these new device techniques is demonstrated with an excellent efficiency observed.

Bidirectional power switching devices are needed in many power management applications, particularly in lithium-ion battery protection circuitry. A monolithic bidirectional power switch fabricated with a simplified CMOS technology is introduced in this dissertation. Throughout the design process, ISE TCAD tool plays an important role. Design variables are carefully analyzed to improve the device performance or yield the best trade off. Optimization is done with the help of TCAD simulation and theoretical calculations. The device has been successfully fabricated using simplified 0.5 micron CMOS process. The experimental result shows a breakdown voltage of 25V. Due to the interdigitated source to source design, the inter-terminal current flowing path is effectively reduced to a few microns. The experimental result shows an ultra low specific on resistance. In comparison with other bi-directional power semiconductor switches by some major semiconductor manufacturers, the proposed BDS device has less than one half of the specific on resistance, thus substantially lower on state power loss of the switch. The proposed BDS device has a unique NPNPN structure, in comparison with NPNP structure, which is the analytical structure for CMOS latch-up, the proposed device inherently exhibits a better latch up immunity than CMOS inverter, thanks to the negative feed back mechanism of the extra NPN parasitic BJT transistor. In order to implement the device into simulators like PSPICE or Cadence IC Design, a compact model named variable resistance model has been built. This simple analytical model fits quite well with experimental data, and can be easily implemented by Verilog-A or other hardware description languages. Also, macro modeling is possible provided that the model parameters can be extracted from experimental curves. Several advanced types of BDS devices have been proposed, they exceed the basic BDS design in terms of breakdown voltage and /or on resistance. These advanced structures may be prominent for further improvement of the basic BDS device to a higher extend. Some cell phone providers such as Nokia is already asking for higher breakdown voltage of BDS device, due to the possibility of incidentally insert the battery pack into the cell phone with wrong pin polarity. Hopefully, the basic BDS design or one of these advanced types may eventually be implemented into the leading brand cell phone battery packs.