L’explosion du marché des télécommunications a donné lieu, lors de ces dernières années, à la multiplication des standards de radiocommunication. De nos jours, l’ensemble de ces moyens de communication utilisés pour le transfert de voix et de données doit être intégré dans les terminaux mobiles. Cependant, cette tendance s’oppose aux contraintes de faible coût qui tendent à diminuer la taille de l’électronique embarquée dans un terminal mobile, mais aussi aux contraintes de diminution de la consommation pour une plus grande autonomie des objets sans fils. C’est donc autour de ces verrous technologiques et techniques que se concentre une part importante des efforts de « R&D » aujourd’hui. Ainsi, l’objectif des travaux présentés repose sur la recherche et le développement d'une architecture contribuant à l’amélioration des performances du bloc central de la chaîne d’émission/réception : l'oscillateur local.L’architecture innovante de synthétiseur de fréquence multistandard réalisée est fondée sur le principe de « conception orientée délai » (DOD - Delay Oriented Design). Une nouvelle technique de stabilisation, issue de la superposition d’une boucle à verrouillage de délai et de phase, est proposée afin d’élargir la bande passante.De l’étude système à la mesure en passant par l’étude comportementale et la réalisation du circuit, les différentes étapes de conception de ce système fractionnaire sont présentées. Les simulations et les mesures ont démontré la capacité du synthétiseur à couvrir une bande comprise entre 1,6 et 3,5GHz avec un signal de référence à 500MHz, mais aussi à stabiliser une architecture très large bande. / The explosion of the wireless communication market is largely responsible of the expansion for RF communication standards for voice and data. Nowadays, each one of them must be integrated in one mobile terminal.However, this trend is opposed to the constraints of low cost, which tend to reduce the size of the electronics in a mobile terminal, but also the constraints of reduced consumption for greater autonomy for wireless systems. It is then around these technological and technical barriers that focus an important part of efforts to « R & D » today. Thus, the objective of the work presented is based on research and development of an architecture that contributes to improve the performances of the central block of transceivers: the local oscillator.The innovative architecture of multistandard synthesizer realized is based on the principle of Delay Oriented Design (DOD). A new technique of stabilization, based on the superposition of a delay and a phase locked loop, is proposed to expand the bandwidth. From study system to measurements through the behavioral comportment and implementation of the circuit, the various stages when designing an RF system are presented. Simulations and measurements have demonstrated the ability of the synthesizer to cover a frequency band between 1.6 and 3.5 GHz with a reference signal at 500MHz, but also to stabilize a broadband architecture.

The research conducted for this thesis seeks to understand issues associated with integrating a direct spread spectrum system (DSSS) transceiver on to a single chip. Various types of sequences, such as Kasami sequences and Gold sequences, are available for use in typical spread spectrum systems. For this thesis, complex spreading sequences (CSS) are used for improved cross-correlation and autocorrelation properties that can be achieved by using such a sequence. While CSS and DSSS are well represented in the existing body of knowledge, and discrete bulky hardware solutions exist – an effort to jointly integrate CSS and DSSS on-chip was identified to be lacking. For this thesis, spread spectrum architecture was implemented focussing on sub-systems that are specific to CSS. This will be the main contribution for this thesis, but the contribution is further appended by various RF design challenges: highspeed requirements make RF circuits sensitive to the effects of parasitics, including parasitic inductance, passive component modelling, as well as signal integrity issues. The integration is first considered more ideally, using mathematical sub-systems, and then later implemented practically using complementary metal-oxide semiconductor (CMOS) technology. The integration involves mixed-signal and radio frequency (RF) design techniques – and final integration involves several specialized analogue sub-systems, such as a class F power amplifier (PA), a low-noise amplifier (LNA), and LC voltage-controlled oscillators (VCOs). The research also considers various issues related to on-chip inductors, and also considers an active inductor implementation as an option for the VCO. With such an inductor a better quality factor is achievable. While some conventional sub-system design techniques are deployed, several modifications are made to adapt a given sub-system to the design requirements for this thesis. The contribution of the research lies in the circuit level modifications done at sub-system level aimed towards eventual integration. For multiple-access communication systems, where a number of independent users are required to share a common channel, the transceiver proposed in this thesis, can contribute towards improved data rate or bit error rate. The design is completed for fabrication in a standard 0.35-μm CMOS process with minimal external components. With an active chip area of about 5 mm2, the simulated transmitter consumes about 250 mW&the receiver consumes about 200 mW. AFRIKAANS : Die navorsing wat vir hierdie tesis onderneem is, beoog om kundigheid op te bou aangaande die kwessies wat met die integrasie van ‘n direkte spreispektrumstelsel (DSSS) sender-ontvanger op ‘n enkele skyfie verband hou. Verskeie tipes sekwensies, soos byvoorbeeld Kasami- en Gold-sekwensies, is vir gebruik in tipiese spreispektrumstelsels beskikbaar. Vir hierdie tesis is komplekse spreisekwensies (KSS) gebruik vir verbeterde kruis- en outokorrelasie-eienskappe wat bereik kan word deur so ‘n sekwensie te gebruik. Alhoewel DSSS en KSS reeds welbekend is, en diskrete hardeware oplossings reeds bestaan, is die vraag na gesamentlike geïntegreerde DSSS en KSS op een vlokkie geïdentifiseer. Vir hierdie tesis is spreispektrumargitektuur aangewend met die klem op KSS substelsels. Dit is dan ook die belangrikste bydrae van hierdie tesis, maar die bydrae gaan verder gepaard met verskeie RF-ontwerpuitdagings: hoëspoed-vereistes maak RF-stroombane sensitief vir die uitwerking van parasitiese komponente, met inbegrip van parasitiese induktansie, passiewe komponentmodellering en ook seinintegriteitskwessies. Die integrasie word eerstens meer idealisties oorweeg deur wiskundige substelsels te gebruik en dan later prakties te implementeer deur komplementêre metaaloksied-halfgeleiertegnologie (CMOS) te gebruik. Die integrasie behels gemengdesein- en radiofrekwensie(RF)-ontwerptegnieke – en finale integrasie behels verskeie gespesialiseerde analoë substelsels soos ‘n klas F-kragversterker (KV), ‘n laeruis-versterker (LRV), en LC-spanningbeheerde ossileerders (SBO’s). Die navorsing oorweeg ook verskeie kwessies in verband met op-skyfie induktors en oorweeg ook ‘n aktiewe induktorimplementering as ‘n opsie vir die SBO. Met sodanige induktor is ‘n beter kwaliteitsfaktor haalbaar. Hoewel enkele konvensionele substelsel-ontwerptegnieke aangewend word, word daar verskeie wysigings aangebring om ‘n gegewe substelsel by die ontwerpvereistes vir hierdie tesis aan te pas. Die bydrae van die navorsing is hoofsaaklik die stroombaanmodifikasies wat gedoen is op substelselvlak om integrasie te vergemaklik. Vir veelvoudige-toegang kommunikasiestelsels waar ‘n aantal onafhanklike gebruikers dieselfde seinkanaal moet deel, kan die sender-ontvanger voorgestel in hierdie tesis meewerk om die datatempo en fouttempo te verbeter. Die ontwerp is voltooi vir vervaardiging in ‘n standaard 0.35-μm CMOS-proses met minimale eksterne komponente. Met ‘n aktiewe skyfie-oppervlakte van ongeveer 5 mm2, verbruik die gesimuleerde sender ongeveer 250 mW en die ontvanger verbruik ongeveer 200 mW. / Thesis (PHD)--University of Pretoria, 2011. / Electrical, Electronic and Computer Engineering / unrestricted