Previous research has indicated an increasing need for intelligent automated design. The contention of this project is that Artificial Intelligence (A.I.) techniques can be used to mimic the process of map design in cartography. A suitable environment for such a map system is considered. Attention is focused on methods for identifying and resolving conflicts that occur when spatial data are displayed using cartographic techniques. The research attempts to find a suitable mechanism for describing and identifying spatial conflicts and serves to focus attention on exactly what makes good map design. It appears that human judgement of design requires the understanding of the map as a whole and is based on geographical knowledge and an understanding of spatial processes. This is in addition to the knowledge of design and perception of maps. An appropriate method of description enables evaluation and assessment of the graphic. The potential spatial conflicts that can occur in a map, along with possible solutions for resolving those conflicts, are identified. Automated techniques were devised for identifying features in proximity and resolving those clusters by application of cartographic license (localized feature displacement). Following from this the knowledge governing the use of all generalization techniques is identified and explicitly itemized. A suitable taxonomy of rules is investigated and the knowledge implemented in a rule based system called CLARITY. The rules base contains over one hundred rules. The results and evaluation of the implementation, together with suggested further work conclude this project.

This thesis developed a domain independent “shell system for routine mechanical design”. This shell is used to produce domain specific design systems by simply placing domain- related knowledge into it. A general “design model”, which is an informal description of the mechanisms behind the design process, has been implemented. The design model is established based on the “characteristics and mechanisms common in routine mechanical design activities”. By examining particular design examples, it is concluded that the routine design activities have: 1) a “common design procedure” from specification recognition to detailed design; 2) “common mechanisms” to determine parameters and the like; and 3) “common knowledge formats” to express design knowledge. Only “detailed design knowledge” is specific to each domain, but can be represented in common knowledge formats. The “model” and its implementation, the shell system, describe the design process in four stages: specification development, synthesis, analysis and non-functional considerations. The synthesis achieves rough structural configurations by following the “configuration decomposition approach” which is derived from the well-developed configuration decomposition patterns in the routine design, and which uses function-to-configuration, configuration decomposition and function-checking relations. In the analysis stage, configuration parameters are determined by design relations which are represented by “design slices” written in the form of “basic description elements”. The analysis knowledge is organized in a multilevel structure from lower levels of basic description elements, design slices, to upper levels of “design procedures” and “knowledgeable configuration units”. Design slices are classified as “solving slices” and “checking slices” responsible respectively for determining parameters and ensuring that checking criteria among parameters are met. A design procedure is a pile of design slices and determines a set of parameters since design relations are used in groups. The uppermost level consists of knowledgeable configuration units. They organize design procedures, parameter sets and configuration decomposition patterns under a configuration. The reasoning process in analysis is decentralized through a number of “interpreters” which handle various tasks such as choosing a design procedure. The non-functional design aspects are considered in the design relations and are incorporated into the analysis. The shell system provides general design knowledge representation formats and general reasoning mechanisms. It is implemented on a SUN workstation using KEE which provides object-oriented programming and rule reasoning facilities. Connection between design components is dealt with using partial configurations and constraints which define the relationships between configurations and partial configurations involved in a connection. The iteration process caused by dependency among parameters is handled using the failure design procedures, that is, if a checking relation is not satisfied, a failure design procedure is called to modify some parameters at the early design stage. The geometry aspect is implemented parametrically based on an existing feature-based modelling system (IPDM). Two specific design systems: a cam system and a bolted flange system, have been developed based on the shell. Both accept given specifications, and output configurations with parameters and graphic display. The development process of these two systems is simple and efficient; and design results are satisfactory. These examples illustrated the versatility and effectiveness of the developed approach to routine mechanical engineering design activities. The major feature of this work is the explicit descriptive style in representing the design knowledge. The domain independent shell approach enhanced by this feature greatly simplifies the development of domain specific knowledge bases. / Thesis / Master of Engineering (ME)

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About eighty percent of all engineering work done today is repetitive, and about ninety percent of all engineering work consist of modelling minor changes. By replacing all the repetitive human engineering work with computers, the engineers could instead focus on creating new products or improving the existing. This could make companies more competitive and increase sales. Using design automation to model small changes would also enable companies to produce small batches at a lower cost. This project is done in collaboration with Thule Group. One of Thule’s largest product categories contain roof racks. The company manufacture the roof racks at their warehouse in Sweden and all variant modelling of them are performed by their technicians and engineers. For every new car model that is released, a new variant of the attachment for the roof racks needs to be modelled. There are different types of brackets used in the attachments, whereas two of them are called Evo Clamp and Evo Flush. For each new car model, new tool inserts for the manufacturing of the brackets also needs to be modelled. In previous research, a design automation process of the tool inserts for Evo Clamp was created. This project aims to use the outcome from that research to create a new design automation process for tool inserts to create Evo Flush. To execute the project, the DRM framework was used. To gather information, a literature study and an empirical study were performed. Furthermore, the design automation was created using VB.NET and Solidworks. To evaluate the outcome of the project, three factors were set up to test the process by. The outcome from this project was also compared to the outcome from the Evo Clamp research. The results showed that it was difficult to reuse and adapt the previous research since the templates for the tool inserts of the two different brackets were modelled in two completely different ways. Therefore, the main conclusion from this project is that; if the intention is to automate a process, then this must be kept in mind when modelling the components and templates. To have concrete modelling guidelines seems to be even more important if the intention is to reuse code from one process when automating another.

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The semiconductor industry has seen a paradigm shift from Application Specific Integrated Circuits to Multiprocessor System on Chip systems over the last decade, primarily due to the miniaturization of the transistor. However, billion of transistors available on a single chip need to be used efficiently to provide more functionalities in portable devices, yet minimize power and chip area, which increases the design complexity of multiprocessor systems. Tighter time to market deadlines further pressurizes the designer, requiring a comprehensive automation of the design process of such complex multiprocessor systems. This thesis presents a design automation methodology for the design of Multiprocessor System on Chip (MPSoC) systems for multimedia applications. This thesis introduces a heterogeneous multiprocessor system where processing elements are connected in a pipelined fashion. A multimedia application is executed very efficiently on a pipelined system due to the stream oriented data flow nature of such applications. Application Specific Instruction set Processors (ASIPs) are used as the elementary processing elements in the multiprocessor system as they can be customized according to the application tasks assigned to them. The problem of selecting a processor configuration for each of the ASIPs in the pipelined system is formalized. We present three different techniques to select processor configurations by exploring the design space of an ASIP based pipelined system, and integrating them into a flexible and designer driven design flow for efficient exploration of large design spaces in order of 10^16 design points. The first two techniques are based on Integer Linear Programming (ILP), named Exact ILP formulation (EIF) and Reduced ILP formulation (RIF), while the third technique is based on a novel heuristic. We also developed a design space pruning algorithm that can enable the use of EIF and RIF to obtain optimal or near optimal design points from large design spaces. For four multimedia applications, we show that RIF and the heuristic can explore the design space and reveal the Pareto front in several hours, while EIF took several days to obtain the Pareto front. The quick availability of the Pareto front of a design space will help the designer to make early changes in the design. Furthermore, it is shown that, on average, the error incurred by RIF and the heuristic is within 1.25% and 2.25% of the optimal design points obtained via EIF for all the four multimedia applications. In the worst case, RIF introduced an error of 17.08% while the heuristic had an error of 11.39%.

Reconfigurable computing has the potential for providing significant performance increases to a number of computing applications. However, realizing these benefits requires digital design experience and knowledge of hardware description languages (HDLs). While a number of tools have focused on translation of high-level languages (HLLs) to HDLs, the tools do not always create optimized digital designs that are competitive with hand-coded solutions. This work describes an automatic optimization in the C-to-HDL transformation that reorganizes operations between pipeline stages in order to reduce critical path lengths. The effects of this optimization are examined on the MD5, SHA-1, and Smith-Waterman algorithms. Results show that the optimization results in performance gains of 13%-37% and that the automatically-generated implementations perform comparably to hand-coded implementations.