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Characterisation of the physical behaviour of GaAs MESFETsBarton, T. M. January 1988 (has links)
No description available.
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Optoelectronic Device Modeling of GaAs Nanowire Solar CellsRobertson, Kyle 11 October 2019 (has links)
Nanowire solar cells have great potential as candidates for high efficiency, next-generation solar cell devices. To realize their potential, accurate and efficient modeling techniques en- compassing both optical and electrical phenomena must be developed. In this work, a coupled optical and electronic model of GaAs nanowire solar cells was developed, with the goal of building a platform for automated, algorithmic device optimization.
Significant work was done on the optical portion of model, with the goal of reducing run- times and improving the level of automation. Enhancements were made to an open-source implementation of the Rigorous Coupled Wave Analysis method for solving Maxwell’s equations, to make it more accurate for modeling nanowire solar cells. Its accuracy and efficiency were thoroughly investigated, and with the enhancements presented here it was shown to be an effective technique for rapid optical modeling of nanowire devices. Purely optical optimizations of a sample AlInP-passivated GaAs nanowire on a GaAs substrate were performed to demonstrate the efficacy of the technique using a Nelder-Mead simplex optimization of device geometry.
The optical model was then coupled into a finite volume method based electrical model implemented in TCAD Sentaurus, to compute device efficiencies and ultimately optimize electrical device performance. As a first step, an algorithmic optimization of a p-i-n nanowire solar cell consisting of an AlInP-passivated GaAs nanowire on a Si substrate was performed using the generation rates computed by the enhanced RCWA implementation. The overall geometry was fixed to the result of the optical optimization, and only internal electrical parameters were optimized. The results showed that significant performance improvements can be obtained with the right choice of doping levels and doping region configurations, even without optimizing the global device geometry.
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Built-in self-test in integrated circuits - ESD event mitigation and detectionEatinger, Ryan Joseph January 1900 (has links)
Master of Science / Department of Electrical Engineering / William Kuhn / When enough charges accumulate on two objects, the air dielectric between them breaks down to create a phenomenon known as electrostatic discharge (ESD). ESD is of great concern in the integrated circuit industry because of the damage it can cause to ICs. The problem will only become worse as process components become smaller.
The three main types of ESD experienced by an IC are the human body model (HBM), the charged device model (CDM), and the machine model (MM). HBM ESD has the highest voltage while CDM ESD has the highest bandwidth and current of the three ESD types.
Integrated circuits generally include ESD protection circuitry connected to their pads. Pads are the connection between the IC and the outside world, making them the required location for circuitry designed to route ESD events away from the IC's internal circuitry. The most basic protection pads use diodes connected from I/O to VDD and I/O to ground. A voltage clamp between VDD and ground is also necessary to protect against CDM and MM event types where the device may not yet have a low impedance supply path connected.
The purpose of this research is to investigate the performance of ESD circuits and to develop a method for detecting the occurrence of an ESD event in an integrated circuit by utilizing IC fuses. The combination of IC fuses and detection circuitry designed to sense a broken fuse allows the IC to perform a built-in self-test (BIST) for ESD to identify compromised ICs, preventing manufacturers from shipping damaged circuits.
Simulations are used to design an optimized protection circuit to complement the proposed ESD detection circuit. Optimization of an ESD pad circuit increases the turn-on speed of its voltage clamps and decreases the series resistance of its protection diodes. These improvements minimize the stress voltage placed on internal circuitry due to an ESD event. An ESD measurement setup is established and used to verify voltage clamp operation.
This research also proposes an ESD detection circuit based on IC fuses, which fail during an ESD event. A variety of IC fuses are tested using the ESD measurement setup as well as a TLP setup in order to determine the time and current needed for them to break. Suitable IC fuses have a resistance less than 5 Ω and consistently break during the first trial.
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Frequency domain model fitting and Volterra analysis implemented on top of harmonic balance simulationAikio, J. P. (Janne P.) 24 April 2007 (has links)
Abstract
The modern wireless communication techniques are aiming on increasing bandwidth and the number of carriers for higher data rate. This sets challenging linearity requirements for RF power amplifiers (PAs). Unfortunately, high linearity can only be obtained at the cost of efficiency. In order to improve the performance of the PA, in-depth understanding of nonlinear behaviour is mandatory. This calls for techniques that can give componentwise information of the causes of the distortion. The aim of this thesis is to develop a technique that can provide such information.
This thesis proposes a detailed distortion analysis technique that is based on frequency domain fitting of polynomial models. Simulated large-signal spectra are used for fitting as these contain the necessary information about the large-signal bias point and amplitude range. Moreover, in the frequency domain the delays are easy to compensate, and detailed analysis to any fitted tone can be performed. The fitting procedure as such is simple but becomes difficult in multi-dimensional nonlinearities if the controlling voltages correlate strongly. In this thesis the solvability and reliability of the fitting procedure is increased by numerical operations, model-degree reduction and by using different excitations.
A simplified Volterra method is used to calculate the distortion contributions by using the fitted model. The overall distortion is analysed by calculating the voltage response of the contributions of each nonlinearity to the terminal nodes of the device by the use of linear transfer functions of the circuit. The componentwise analysis is performed by phasor presentation enabling the cancelling mechanisms to be seen.
The proposed technique is implemented on top of harmonic balance simulation in an APLAC circuit simulator in which extensive distortion simulations are performed. The technique relies on the existing device model and thus the fitted model can be only as accurate as the particular simulation model. However, two different RF PAs are analysed that show a good agreement between measurements and simulations.
The proposed technique is verified with several test cases including amplitude dependent amplitude and phase distortion, intermodulation distortion sweet spots, bandwidth dependent memory effects and impedance optimization. The main finding of the detailed analysis is that the distortion is a result of several cancelling mechanisms. In general, cubic nonlinearity of transconductance is dominating the in-band distortion but is cancelled by the 2nd-degree nonlinearity that is mixed to the fundamental band from envelope and 2nd harmonic bands that is usually the main cause of memory effects.
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Predicting Electrochromic Smart Window PerformanceDegerman Engfeldt, Johnny January 2012 (has links)
The building sector is one of the largest consumers of energy, where the cooling of buildings accounts for a large portion of the total energy consumption. Electrochromic (EC) smart windows have a great potential for increasing indoor comfort and saving large amounts of energy for buildings. An EC device can be viewed as a thin-film electrical battery whose charging state is manifested in optical absorption, i.e. the optical absorption increases with increased state-of-charge (SOC) and decreases with decreased state-of-charge. It is the EC technology's unique ability to control the absorption (transmittance) of solar energy and visible light in windows with small energy effort that can reduce buildings' cooling needs. Today, the EC technology is used to produce small windows and car rearview mirrors, and to reach the construction market it is crucial to be able to produce large area EC devices with satisfactory performance. A challenge with up-scaling is to design the EC device system with a rapid and uniform coloration (charging) and bleaching (discharging). In addition, up-scaling the EC technology is a large economic risk due to its expensive production equipment, thus making the choice of EC material and system extremely critical. Although this is a well-known issue, little work has been done to address and solve these problems. This thesis introduces a cost-efficient methodology, validated with experimental data, capable of predicting and optimizing EC device systems' performance in large area applications, such as EC smart windows. This methodology consists of an experimental set-up, experimental procedures and a twodimensional current distribution model. The experimental set-up, based on camera vision, is used in performing experimental procedures to develop and validate the model and methodology. The two-dimensional current distribution model takes secondary current distribution with charge transfer resistance, ohmic and time-dependent effects into account. Model simulations are done by numerically solving the model's differential equations using a finite element method. The methodology is validated with large area experiments. To show the advantage of using a well-functioning current distribution model as a design tool, some EC window size coloration and bleaching predictions are also included. These predictions show that the transparent conductor resistance greatly affects the performance of EC smart windows. / Byggnadssektorn är en av de största energiförbrukarna, där kylningen av byggnader står för en stor del av den totala energikonsumtionen. Elektrokroma (EC) smarta fönster har en stor potential för att öka inomhuskomforten och spara stora mängder energi för byggnader. Ett elektrokromt fönster kan ses som ett tunnfilmsbatteri vars laddningsnivå yttrar sig i dess optiska absorption, d.v.s. den optiska absorptionen ökar med ökad laddningsnivå och vice versa. Det är EC-teknologins unika egenskaper att kunna kontrollera absorptionen (transmittansen) av solenergi och synligt ljus i fönster med liten energiinsats som kan minska byggnaders kylningsbehov. EC-teknologin används idag till att producera små fönster och bilbackspeglar, men för att nå byggnadsmarknaden är det nödvändigt att kunna producera stora EC-anordningar med fullgod prestanda. En välkänd utmaning med uppskalning är att utforma EC-systemet med snabb och jämn infärgning (laddning) och urblekning (urladdning), vilket även innebär att uppskalning är en stor ekonomisk risk på grund av den dyra produktionsutrustningen. Trots att detta är välkända problem har lite arbete gjorts för att lösa dessa. Denna avhandling introducerar ett kostnadseffektivt tillvägagångssätt, validerat med experimentella data, kapabelt till att förutsäga och optimera ECsystems prestanda för anordningar med stor area, såsom elektrokroma smarta fönster. Detta tillvägagångssätt består av en experimentell uppställning, experiment och en tvådimensionell strömfördelningsmodell. Den experimentella uppställningen, baserad på kamerateknik, används i de experimentella tillvägagångssätten så att modellen kan utvecklas och valideras. Den tvådimensionella strömfördelningsmodellen inkluderar sekundär strömfördelning med laddningsöverföringsmotstånd, ohmska och tidsberoende effekter. Modellsimuleringarna görs genom att numeriskt lösa en modells differentialekvationer med hjälp av en finita-element-metod. Tillvägagångssättet är validerat med experiment gjorda på stora EC anordningar. För att visa fördelarna med att använda en väl fungerande strömfördelningsmodell som ett designverktyg, har några prediktioner av infärgning och urblekning av EC-fönster inkluderats. Dessa prediktioner visar att den transparenta strömtilledarresistansen har stor påverkan på EC-fönsters prestanda.
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A Device Model for Intermediate Band SemiconductorsDumitrescu, Eduard Christian 18 January 2022 (has links)
Semiconductors with an additional intermediate band (IB) have the potential to greatly improve solar cell efficiency. Their theoretical efficiency limit is over 50% higher than that of standard semiconductor solar cells at full concentration. In practice however, their efficiencies are low compared to this detailed balance limit. Part of the reason is that it has not been possible to optimize IB device geometry because no device model has existed that could capture all the effects present in IB materials (e.g., charge transport inside the IB and self-consistent optics). In this thesis I introduce my new device model for intermediate band semiconductors called Simudo. The software uses the finite element method to solve the coupled Poisson/drift-diffusion (PDD) system of equations that describe the carrier dynamics inside semiconductor (IB or not) devices, along with optical propagation. I benchmark its accuracy on standard semiconductor problems against Synopsys Sentaurus, and I find that not only does it give valid results but in fact converges to the solution with a smaller number of mesh points by having quartic rather than merely quadratic solution convergence with respect to the number of mesh points. I also demonstrate Simudo's immediate usefulness by answering the question of whether IB mobility can compensate for mismatched optical absorption processes in different regions of the device. The device model work is preceded by three introductory chapters bringing the reader up to speed on semiconductor device physics and providing them with a primer on the finite element method. The coupled PDD equations are numerically challenging to solve, and the road to development of Simudo tried a number of formulations of the problem that were not successful. In the final chapter I discuss some of these formulations and why they did not succeed.
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Compact Modeling of Silicon Carbide (SiC) Vertical Junction Field Effect Transistor (VJFET) in PSpice using Angelov Model and PSpice Simulation of Analog Circuit Building Blocks using SiC VJFET ModelPurohit, Siddharth 09 December 2006 (has links)
This thesis presents the development of compact model of novel silicon carbide (SiC) Vertical Junction Field Effect Transistor (VJFET) for high-power circuit simulation. An empirical Angelov model is developed for SiC VJFET in PSpice. The model is capable of accurately replicating the device behavior for the DC and Transient conditions. The model was validated against measured data obtained from devices developed by Mississippi Center for Advanced Semiconductor Prototyping at MSU and SemiSouth Laboratories. The modeling approach is based on extracting Angelov Equations Coefficients from experimental device characteristics using non linear fitting. The coefficients are extracted for different parameters (temperature, width, etc). Multi-Dimensional Interpolation Technique is used to incorporate the effect of more than one parameter. The models developed in this research are expected to be valuable tools for electronic designers in the future. The developed model was applied for investigating the characteristics of a few standard analog circuit blocks using SiC VJFET and Si JFET in order to demonstrate the capabilities of the model to reveal the relative advantages of one over the other. The selected circuits of interest were Voltage Follower, Common Source Amplifier, Current Source and Differential Amplifier. Simulations of analog circuit building blocks incorporating SiC VJFET showed better circuit functionality compared to their Si counterparts.
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Memristor Device Modeling and Circuit Design for Read Out Integrated Circuits, Memory Architectures, and Neuromorphic SystemsYakopcic, Chris 05 June 2014 (has links)
No description available.
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NANO-ELECTRO-MECHANICAL SWITCH (NEMS) FOR ULTRA-LOW POWER PORTABLE EMBEDDED SYSTEM APPLICATIONS: ANALYSIS, DESIGN, MODELING, AND CIRCUIT SIMULATIONAlzoubi, Khawla Ali 30 July 2010 (has links)
No description available.
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Electron transport in graphene transistors and heterostructures : towards graphene-based nanoelectronicsKim, Seyoung, 1981- 12 July 2012 (has links)
Two graphene layers placed in close proximity offer a unique system to investigate interacting electron physics as well as to test novel electronic device concepts. In this system, the interlayer spacing can be reduced to value much smaller than that achievable in semiconductor heterostructures, and the zero energy band-gap allows the realization of coupled hole-hole, electron-hole, and electron-electron two-dimensional systems in the same sample. Leveraging the fabrication technique and electron transport study in dual-gated graphene field-effect transistors, we realize independently contacted graphene double layers separated by an ultra-thin dielectric. We probe the resistance and density of each layer, and quantitatively explain their dependence on the backgate and interlayer bias. We experimentally measure the Coulomb drag between the two graphene layers for the first time, by flowing current in one layer and measuring the voltage drop in the opposite layer. The drag resistivity gauges the momentum transfer between the two layers, which, in turn, probes the interlayer electron-electron scattering rate. The temperature dependence of the Coulomb drag above temperatures of 50 K reveals that the ground state in each layer is a Fermi liquid. Below 50 K we observe mesoscopic fluctuations of the drag resistivity, as a result of the interplay between coherent intralayer transport and interlayer interaction. In addition, we develop a technique to directly measure the Fermi energy in an electron system as a function of carrier density using double layer structure. We demonstrate this method in the double layer graphene structure and probe the Fermi energy in graphene both at zero and in high magnetic fields. Last, we realize dual-gated bilayer graphene devices, where we investigate quantum Hall effects at zero energy as a function of transverse electric field and perpendicular magnetic field. Here we observe a development of v = 0 quantum Hall state at large electric fields and in high magnetic fields, which is explained by broken spin and valley spin symmetry in the zero energy Landau levels. / text
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