No description available.

abstract: A model of self-heating is incorporated into a Cellular Monte Carlo (CMC) particle-based device simulator through the solution of an energy balance equation (EBE) for phonons. The EBE self-consistently couples charge and heat transport in the simulation through a novel approach to computing the heat generation rate in the device under study. First, the moments of the Boltzmann Transport equation (BTE) are discussed, and subsequently the EBE of for phonons is derived. Subsequently, several tests are performed to verify the applicability and accuracy of a nonlinear iterative method for the solution of the EBE in the presence of convective boundary conditions, as compared to a finite element analysis solver as well as using the Kirchhoff transformation. The coupled electrothermal characterization of a GaN/AlGaN high electron mobility transistor (HEMT) is then performed, and the effects of non-ideal interfaces and boundary conditions are studied. The proposed thermal model is then applied to a novel $\Pi$-gate architecture which has been suggested to reduce hot electron generation in the device, compared to the conventional T-gate. Additionally, small signal ac simulations are performed for the determination of cutoff frequencies using the thermal model as well. Finally, further extensions of the CMC algorithm used in this work are discussed, including 1) higher-order moments of the phonon BTE, 2) coupling to phonon Monte Carlo simulations, and 3) application to other large-bandgap, and therefore high-power, materials such as diamond. / Dissertation/Thesis / Doctoral Dissertation Electrical Engineering 2020

Silicon Carbide (SiC) is a wide bandgap semiconductor that is currently of major interest for power electronics applications. SiC-based semiconductor devices and circuits are presently being developed for use in high-temperature, high-power, and/or high-radiation conditions under which conventional semiconductors lose their efficiency. However, the blocking capabilities of SiC power rectifiers and transistors are yet to approach their impressive theoretical limit due to so called edge effects at the device periphery. Surface passivation, which addresses many issues related to surface electric fields, is an extremely important fabrication step for high performance semiconductor electronic devices. Surface passivation can influence the surface recombination velocity, surface charge, interface trap density, and other surface characteristics. In this work, two-dimensional device simulations are used to establish the trends and the extent of the influence of charges, present in surface passivation dielectrics, on the reverse bias characteristics of SiC devices. Actual charges and charge instability are experimentally evaluated in a few common types of passivation dielectrics used in SiC device technologies. Device simulations are used to predict the corresponding improvement (or degradation) of the breakdown conditions at the device periphery, associated with the experimentally measured dielectric charges.

Silicon Carbide (SiC) is a wide band-gap semiconductor material with excel-lent material properties for high frequency, high power and high temperature elec-tronics. In this work different SiC field-effect transistors have been studied using theoretical methods, with the focus on both the devices and the methods used. The rapid miniaturization of commercial devices demands better physical models than the drift-diffusion and hydrodynamic models most commonly used at present. The Monte Carlo method is the most accurate physical methods available and has been used in this work to study the performance in short-channel SiC field-effect devices. The drawback of the Monte-Carlo method is the computational power required and it is thus not well suited for device design where the layout requires to be optimized for best device performance. One approach to reduce the simulation time in the Monte Carlo method is to use a time-domain drift-diffusion model in contact and bulk regions of the device. In this work, a time-domain drift-diffusion model is implemented and verified against commercial tools and would be suitable for inclusion in the Monte-Carlo device simulator framework. Device optimization is traditionally performed by hand, changing device pa-rameters until sufficient performance is achieved. This is very time consuming work without any guarantee of achieving an optimal layout. In this work a tool is developed, which automatically changes device layout until optimal device per-formance is achieved. Device optimization requires hundreds of device simulations and thus it is essential that computationally efficient methods are used. One impor-tant physical process for RF power devices is self heating. Self heating can be fairly accurately modeled in two dimensions but this will greatly reduce the computa-tional speed. For realistic influence self heating must be studied in three dimensions and a method is developed using a combination of 2D electrical and 3D thermal simulations. The accuracy is much improved by using the proposed method in comparison to a 2D coupled electro/thermal simulation and at the same time offers greater efficiency. Linearity is another very important issue for RF power devices for telecommunication applications. A method to predict the linearity is imple-mented using nonlinear circuit simulation of the active device and neighboring passive elements.

<p>Silicon Carbide (SiC) is a wide band-gap semiconductor material with excel-lent material properties for high frequency, high power and high temperature elec-tronics. In this work different SiC field-effect transistors have been studied using theoretical methods, with the focus on both the devices and the methods used. The rapid miniaturization of commercial devices demands better physical models than the drift-diffusion and hydrodynamic models most commonly used at present.</p><p>The Monte Carlo method is the most accurate physical methods available and has been used in this work to study the performance in short-channel SiC field-effect devices. The drawback of the Monte-Carlo method is the computational power required and it is thus not well suited for device design where the layout requires to be optimized for best device performance. One approach to reduce the simulation time in the Monte Carlo method is to use a time-domain drift-diffusion model in contact and bulk regions of the device. In this work, a time-domain drift-diffusion model is implemented and verified against commercial tools and would be suitable for inclusion in the Monte-Carlo device simulator framework.</p><p>Device optimization is traditionally performed by hand, changing device pa-rameters until sufficient performance is achieved. This is very time consuming work without any guarantee of achieving an optimal layout. In this work a tool is developed, which automatically changes device layout until optimal device per-formance is achieved. Device optimization requires hundreds of device simulations and thus it is essential that computationally efficient methods are used. One impor-tant physical process for RF power devices is self heating. Self heating can be fairly accurately modeled in two dimensions but this will greatly reduce the computa-tional speed. For realistic influence self heating must be studied in three dimensions and a method is developed using a combination of 2D electrical and 3D thermal simulations. The accuracy is much improved by using the proposed method in comparison to a 2D coupled electro/thermal simulation and at the same time offers greater efficiency. Linearity is another very important issue for RF power devices for telecommunication applications. A method to predict the linearity is imple-mented using nonlinear circuit simulation of the active device and neighboring passive elements.</p>

Though the concept of junctionless field effect transistor (JLFET) is old, it was not possible to fabricate a useful JLFET device, as it requires a very shallow channel region. Very recently, the emergence of new and advanced technologies has made it possible to create viable JLFET devices using nanowires. This work aims to computationally investigate the interplay of quantum size-quantization and random dopant fluctuations (RDF) effects in nanoscale JLFETs. For this purpose, a 3-D fully atomistic quantum-corrected Monte Carlo device simulator has been integrated and used in this work. The size-quantiza¬tion effect has been accounted for via a param¬eter-free effec¬tive potential scheme and benchmarked against the NEGF approach in the ballistic limit. To study the RDF effects and treat full Coulomb (electron-ion and electron-electron) interactions in the real-space and beyond the Poisson picture, the simulator implements a corrected-Coulomb electron dynamics (QC-ED) approach. The essential bandstructure and scattering parameters (energy bandgap, effective masses, and the density-of-states) have been computed using an atomistic 20-band nearest-neighbour sp3d5s* tight-binding scheme. First, an experimental device was simulated to evaluate the validity of the simulator. Because of the small dimension, quantum mechanical confinement was found to be the dominant mechanism that significantly degrades the current drive capability of nanoscale JLFETs. Surface roughness scattering is not as prominent as observed in conventional MOSFETs. Also, because of its small size, the performance of the device is prone to the effect of variability, for which a discrete doping model was proved essential. Finally, a new JLFET was designed and optimized in this work. The proposed device is based on a gate-all-around silicon nanowire. Source/drain length is 32.5 nm and channel length is 14 nm. Gate contact length is 9 nm. The EOT (equivalent oxide thickness) is 1 nm. It has a metal gate with a workfunction of 4.55 eV. The source, channel and drain regions are n-type with a doping density of 1.5×1019 cm-3. Detailed simulation shows that the two most influential mechanisms that degrade the drive capability are quantum mechanical confinement and Coulomb scattering. Surface roughness scattering is found to be very weak. In addition, thinner nanowire is more prone to Coulomb scattering exhibiting a reduced ON-current (ION). Simulation results show that silicon nanowires with a side length (width and depth) of 3 nm and a doping density of 1.5×1019 cm-3 produce satisfactory drive current.

Ga2O3, which is a novel and ultra-wide band gap oxide semiconductor material, has attracted more and more attention due to its chemical and thermal stability and various potential applications to devices. This dissertation focuses on systemic investigation of β-Ga2O3 and ε- Ga2O3 from fundamental material properties, device modeling and verification of circuit performance. ab initio calculation was employed to do theoretical investigation of material properties. Based on Generalized Gradient Approximations (GGA), we calculate the band structure, effective mass of electron, density of states and phonon band structure. However, calculated band gap is only 2.36 eV and 2.16 eV, which is much lower than experimental measured value. In order to overcome the underestimation, the GGA+U method was carried out for both materials. band gap as 4.8 eV and 5.0 eV are finally identified, which have a good agreement with experimental results. Device simulation is done with Monte Carlo (MC) method and Drift-Diffusion method. Firstly, we used traditional ensemble MC to calculate the mobility of bulk material. We found conventional phonon scattering model cannot capture electron-phonon interaction (EPI) very well due to complex phonon structure of β-Ga2O3. Therefore, a refined MC method was proposed. By including multi-phonon scattering model, the refined MC works very well with multi-phonon modes EPI. The calculated mobility of bulk material is 118 cm2/(V•s), which is close to measured 120 cm2/(V•s). Using obtained mobility, the performance of depletion-mode β-Ga2O3 MOSFET was simulated in Silvaco TCAD.

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Research on two-dimensional (2D) materials currently occupies a sizeable fraction of the materials science community, which has led to the development of a comprehensive body of knowledge on such layered structures. However, the goal of this thesis is to deepen the understanding of the comparatively unknown heterostructures composed of different stacked layers. First, we utilise linear-scaling density functional theory (LS-DFT) to simulate intricate interfaces between the most promising layered materials, such as transition metal dichalcogenides (TMDC) or black phosphorus (BP) and hexagonal boron nitride (hBN). We show that hBN can protect BP from external influences, while also preventing the band-gap reduction in BP stacks, and enabling the use of BP heterostructures as tunnelling field effect transistors. Moreover, our simulations of the electronic structure of TMDC interfaces have reproduced photoemission spectroscopy observations, and have also provided an explanation for the coexistence of commensurate and incommensurate phases within the same crystal. Secondly, we have developed new functionality to be used in the future study of 2D heterostructures, in the form of a linear-response phonon formalism for LS-DFT. As part of its implementation, we have solved multiple implementation and theoretical issues through the use of novel algorithms.

abstract: ABSTRACT An Ensemble Monte Carlo (EMC) computer code has been developed to simulate, semi-classically, spin-dependent electron transport in quasi two-dimensional (2D) III-V semiconductors. The code accounts for both three-dimensional (3D) and quasi-2D transport, utilizing either 3D or 2D scattering mechanisms, as appropriate. Phonon, alloy, interface roughness, and impurity scattering mechanisms are included, accounting for the Pauli Exclusion Principle via a rejection algorithm. The 2D carrier states are calculated via a self-consistent 1D Schrödinger-3D-Poisson solution in which the charge distribution of the 2D carriers in the quantization direction is taken as the spatial distribution of the squared envelope functions within the Hartree approximation. The wavefunctions, subband energies, and 2D scattering rates are updated periodically by solving a series of 1D Schrödinger wave equations (SWE) over the real-space domain of the device at fixed time intervals. The electrostatic potential is updated by periodically solving the 3D Poisson equation. Spin-polarized transport is modeled via a spin density-matrix formalism that accounts for D'yakanov-Perel (DP) scattering. Also, the code allows for the easy inclusion of additional scattering mechanisms and structural modifications to devices. As an application of the simulator, the current voltage characteristics of an InGaAs/InAlAs HEMT are simulated, corresponding to nanoscale III-V HEMTs currently being fabricated by Intel Corporation. The comparative effects of various scattering parameters, material properties and structural attributes are investigated and compared with experiments where reasonable agreement is obtained. The spatial evolution of spin-polarized carriers in prototypical Spin Field Effect Transistor (SpinFET) devices is then simulated. Studies of the spin coherence times in quasi-2D structures is first investigated and compared to experimental results. It is found that the simulated spin coherence times for GaAs structures are in reasonable agreement with experiment. The SpinFET structure studied is a scaled-down version of the InGaAs/InAlAs HEMT discussed in this work, in which spin-polarized carriers are injected at the source, and the coherence length is studied as a function of gate voltage via the Rashba effect. / Dissertation/Thesis / Ph.D. Electrical Engineering 2011