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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Output voltage offsets in transistor differential amplifiers induced by internal AC to DC conversion

Duffy, William Thomas, 1949- January 1974 (has links)
No description available.
2

Diferenční zesilovače s bipolárními a unipolárními tranzistory / Differential amplifiers with bipolar and field-effect transistors

Mašlan, Stanislav January 2009 (has links)
Simulation and comparison of various types of differential amplifiers.
3

Simulations of analog circuit building blocks based on radiation and temperature-tolerant SIC JFET Technologies

Aurangabadkar, Nilesh Kirti Kumar. January 2003 (has links)
Thesis (M.S.)--Mississippi State University. Department of Electrical and Computer Engineering. / Title from title screen. Includes bibliographical references.
4

Wide bandwidth GaAs MESFET amplifier

Yan, Kai-tuan Kelvin 29 April 1992 (has links)
Graduation date: 1992
5

Reliability and hot-electron effects in analog and mixed-mode circuits

Ge, David Ying 29 April 1993 (has links)
Reliability of sub-micron analog circuits is directly related to impact ionization and the subsequent changes in threshold voltage and drain current of n-MOSFET devices. This thesis presents theory of the hot-electron effects on the device characteristics and circuit performance, explores several approaches to improve performance at both the device and circuit level, and finally shows a new composite n-MOSFET device which significantly suppresses substrate current - an indication of hot-electron degradation. By using the composite device in the output gain stage of a CMOS differential amplifier with 1p.m technology, the normalized substrate current of the n-channel device is reduced by eight orders of magnitude for a sloping input waveform. The reduction in device substrate current is achieved at the cost of increased area and reduced frequency response. Replacing conventional n-channel devices with composite n-MOSFETs provides a simple way to improve device and circuit reliability without modification of the device structure and/or fabrication process. / Graduation date: 1993
6

Teste de amplificadores diferenciais através de medida DC e transiente de tensões internas de polarização

Bender, Isis Duarte January 2015 (has links)
Este trabalho apresenta estudos voltados ao teste de Amplificadores Diferenciais. No primeiro momento, por meio de simulações SPICE, falhas catastróficas são injetadas em dois Amplificadores Diferenciais, projetados para uma tecnologia CMOS de 0,5m com configurações complementares, a fim de comprovar a ocorrência de variações nas tensões DC dos nós do circuito sob teste à medida que há injeções de falhas no mesmo. Também se faz análises preliminares dos resultados para verificar a possibilidade de diagnosticar as falhas através de assinaturas compostas pela digitalização (em um bit) dos valores DC dos nós do circuito sob teste. Posteriormente, é desenvolvida uma metodologia de teste simples e com baixo custo, aplicável a Amplificadores Totalmente Diferenciais. Considerando a necessidade do Circuito de Realimentação de Modo Comum para manter o controle do modo comum das saídas, é proposta a reutilização deste circuito como verificador, possibilitando a observação de falhas ocorridas tanto no Amplificador quanto no próprio bloco de CMFB. Falhas catastróficas e paramétricas são injetadas, por simulação, em dois amplificadores totalmente diferenciais, um projetado em 180nm e outro em 130nm. Testes DC e transientes são realizados e a cobertura de falhas é avaliada. Os resultados das simulações apontam boa cobertura de falhas, enquanto apenas os sinais de realimentação de modo comum precisam ser monitorados. Dessa forma é proposta uma estratégia de teste que apresenta um baixo custo e uma baixa sobrecarga de área do circuito. / This work presents a study related to the testing of Differential Amplifiers. Firstly, by means of SPICE simulations, catastrophic faults are injected in two complementary Differential Amplifiers, designed considering a 0,5μm CMOS technology, in order to prove the concept of testing the circuit by checking the occurrence of variations in the DC voltage of the circuit internal nodes due to the injected faults. The possibility of diagnosing faults using a digitized representation of the DC values of the observed nodes of the circuit was also investigated. Then, a simple and cost-effective test methodology for Fully Differential Amplifiers (FDA) is proposed. Considering the need of the common mode feedback circuit to maintain the control of the common mode output voltage, it is proposed to re-use this circuit as a checker, allowing the observation of faults in both the amplifier itself and the CMFB block. Catastrophic and parametric faults are injected in two FDAs, designed in 180nm and 130nm technology respectively. DC and transient tests are performed and the fault coverage is evaluated. The simulation results indicate high fault coverage, while only the signals from the common mode feedback need to be monitored. This way a low cost and low overhead test methodology is proposed.
7

Teste de amplificadores diferenciais através de medida DC e transiente de tensões internas de polarização

Bender, Isis Duarte January 2015 (has links)
Este trabalho apresenta estudos voltados ao teste de Amplificadores Diferenciais. No primeiro momento, por meio de simulações SPICE, falhas catastróficas são injetadas em dois Amplificadores Diferenciais, projetados para uma tecnologia CMOS de 0,5m com configurações complementares, a fim de comprovar a ocorrência de variações nas tensões DC dos nós do circuito sob teste à medida que há injeções de falhas no mesmo. Também se faz análises preliminares dos resultados para verificar a possibilidade de diagnosticar as falhas através de assinaturas compostas pela digitalização (em um bit) dos valores DC dos nós do circuito sob teste. Posteriormente, é desenvolvida uma metodologia de teste simples e com baixo custo, aplicável a Amplificadores Totalmente Diferenciais. Considerando a necessidade do Circuito de Realimentação de Modo Comum para manter o controle do modo comum das saídas, é proposta a reutilização deste circuito como verificador, possibilitando a observação de falhas ocorridas tanto no Amplificador quanto no próprio bloco de CMFB. Falhas catastróficas e paramétricas são injetadas, por simulação, em dois amplificadores totalmente diferenciais, um projetado em 180nm e outro em 130nm. Testes DC e transientes são realizados e a cobertura de falhas é avaliada. Os resultados das simulações apontam boa cobertura de falhas, enquanto apenas os sinais de realimentação de modo comum precisam ser monitorados. Dessa forma é proposta uma estratégia de teste que apresenta um baixo custo e uma baixa sobrecarga de área do circuito. / This work presents a study related to the testing of Differential Amplifiers. Firstly, by means of SPICE simulations, catastrophic faults are injected in two complementary Differential Amplifiers, designed considering a 0,5μm CMOS technology, in order to prove the concept of testing the circuit by checking the occurrence of variations in the DC voltage of the circuit internal nodes due to the injected faults. The possibility of diagnosing faults using a digitized representation of the DC values of the observed nodes of the circuit was also investigated. Then, a simple and cost-effective test methodology for Fully Differential Amplifiers (FDA) is proposed. Considering the need of the common mode feedback circuit to maintain the control of the common mode output voltage, it is proposed to re-use this circuit as a checker, allowing the observation of faults in both the amplifier itself and the CMFB block. Catastrophic and parametric faults are injected in two FDAs, designed in 180nm and 130nm technology respectively. DC and transient tests are performed and the fault coverage is evaluated. The simulation results indicate high fault coverage, while only the signals from the common mode feedback need to be monitored. This way a low cost and low overhead test methodology is proposed.
8

Teste de amplificadores diferenciais através de medida DC e transiente de tensões internas de polarização

Bender, Isis Duarte January 2015 (has links)
Este trabalho apresenta estudos voltados ao teste de Amplificadores Diferenciais. No primeiro momento, por meio de simulações SPICE, falhas catastróficas são injetadas em dois Amplificadores Diferenciais, projetados para uma tecnologia CMOS de 0,5m com configurações complementares, a fim de comprovar a ocorrência de variações nas tensões DC dos nós do circuito sob teste à medida que há injeções de falhas no mesmo. Também se faz análises preliminares dos resultados para verificar a possibilidade de diagnosticar as falhas através de assinaturas compostas pela digitalização (em um bit) dos valores DC dos nós do circuito sob teste. Posteriormente, é desenvolvida uma metodologia de teste simples e com baixo custo, aplicável a Amplificadores Totalmente Diferenciais. Considerando a necessidade do Circuito de Realimentação de Modo Comum para manter o controle do modo comum das saídas, é proposta a reutilização deste circuito como verificador, possibilitando a observação de falhas ocorridas tanto no Amplificador quanto no próprio bloco de CMFB. Falhas catastróficas e paramétricas são injetadas, por simulação, em dois amplificadores totalmente diferenciais, um projetado em 180nm e outro em 130nm. Testes DC e transientes são realizados e a cobertura de falhas é avaliada. Os resultados das simulações apontam boa cobertura de falhas, enquanto apenas os sinais de realimentação de modo comum precisam ser monitorados. Dessa forma é proposta uma estratégia de teste que apresenta um baixo custo e uma baixa sobrecarga de área do circuito. / This work presents a study related to the testing of Differential Amplifiers. Firstly, by means of SPICE simulations, catastrophic faults are injected in two complementary Differential Amplifiers, designed considering a 0,5μm CMOS technology, in order to prove the concept of testing the circuit by checking the occurrence of variations in the DC voltage of the circuit internal nodes due to the injected faults. The possibility of diagnosing faults using a digitized representation of the DC values of the observed nodes of the circuit was also investigated. Then, a simple and cost-effective test methodology for Fully Differential Amplifiers (FDA) is proposed. Considering the need of the common mode feedback circuit to maintain the control of the common mode output voltage, it is proposed to re-use this circuit as a checker, allowing the observation of faults in both the amplifier itself and the CMFB block. Catastrophic and parametric faults are injected in two FDAs, designed in 180nm and 130nm technology respectively. DC and transient tests are performed and the fault coverage is evaluated. The simulation results indicate high fault coverage, while only the signals from the common mode feedback need to be monitored. This way a low cost and low overhead test methodology is proposed.
9

Αναλογικά κυκλώματα χαμηλής τροφοδοσίας με MOS τρανζίστορ οδηγούμενα από το υπόστρωμα

Ράικος, Γεώργιος 14 February 2012 (has links)
Τα τελευταία χρόνια η ανάγκη για αναλογικά ολοκληρωμένα κυκλώματα με χαμηλή τάση τροφοδοσίας και χαμηλή ισχύ γίνεται κάτι περισσότερο από επιτακτική. Ο βασικότερος λόγος για την ανάγκη αυτή είναι η ραγδαία ανάπτυξη από φορητές ηλεκτρονικές συσκευές για εφαρμογές πολυμέσων (laptops, netbooks, mobiles) έως ολοκληρωμένων συστημάτων βιοιατρικών εφαρμογών. Μάλιστα σε πολλές περιπτώσεις απαιτείται αυτές οι ηλεκτρονικές συσκευές να έχουν δυνατότητα διασύνδεσης σε ασύρματα δίκτυα (WLANs) και επομένως επιβάλλεται η ενσωμάτωση συστημάτων πομποδεκτών. Έτσι, οι απαιτήσεις για όσο το δυνατόν μικρότερη κατανάλωση και επομένως χαμηλότερη τροφοδοσία είναι επιβεβλημένες. Ένα από τα βασικότερα «δομικά» κυκλώματα σχεδίασης αναλογικών κυκλωμάτων είναι οι διαφορικοί ενισχυτές τάσης. Στην παρούσα διατριβή παρουσιάζονται πλήρεις λύσεις διαφορικών ενισχυτών χαμηλής τάσης τροφοδοσίας σε τυπική CMOS τεχνολογία των 0.35μm και 0.18μm. Οι προτεινόμενοι ενισχυτές σχεδιάστηκαν με την τεχνική οδήγησης τρανζίστορ από το υπόστρωμα (Bulk-driven technique). Αρχικά σχεδιάστηκαν διαφορικοί ενισχυτές τάσεις με τοπολογία αρνητικής αντίστασης στην βαθμίδα εισόδου. Με τον τρόπο αυτό έγινε αύξηση της μικρής διαγωγιμότητας εισόδου που παρουσιάζει η τεχνική οδήγησης τρανζίστορ από το υπόστρωμα. Έτσι, προέκυψαν πρωτότυπες δομές ενισχυτών με χαμηλή τροφοδοσία μέχρι και 0.8V. Οι επιδόσεις των ενισχυτών χαρακτηρίστηκαν από κατάλληλες προσομοιώσεις αλλά και από πειραματικές μετρήσεις καθώς κατασκευάστηκε ολοκληρωμένο κύκλωμα ενισχυτή. Η σύγκλιση των αποτελεσμάτων των προσομοιώσεων με των πειραματικών απέδειξε πως τόσο τα προτεινόμενα κυκλώματα όσο και η ίδια η τεχνική σχεδίασης αποτελούν σημαντική λύση όπου απαιτούνται διαφορικοί ενισχυτές τάσης χαμηλής τροφοδοσίας. Στη συνέχεια σχεδιάστηκε βαθμίδα διαφορικού ακόλουθου τάσης με την τεχνική οδήγησης τρανζίστορ από το υπόστρωμα και τροφοδοσία 1V. Η βαθμίδα αυτή χρησιμοποιήθηκε ως διαφορική βαθμίδα εισόδου διαφορικού ενισχυτή τάσης με τροφοδοσία 1V. Ο ενισχυτής αυτός λειτουργεί για μεταβολή του κοινού σήματος εισόδου μεταξύ των άκρων της τροφοδοσίας. Ο ακόλουθος τάσης τροποποιήθηκε κατάλληλα ώστε να λειτουργεί με τροφοδοσία 0.5V και χρησιμοποιήθηκε ως διαφορική βαθμίδα εισόδου σε διαφορικό ενισχυτή τάσης ίδιας τροφοδοσίας. Και οι δυο προτεινόμενες τοπολογίες ενισχυτών αποτελούν πλήρεις λύσεις για εφαρμογές ενισχυτών τάσης με χαμηλή και πολύ χαμηλή τροφοδοσία αντίστοιχα. Τέλος με την τεχνική οδήγησης τρανζίστορ από το υπόστρωμα σχεδιάστηκε ενισχυτής μεταβλητού κέρδους. Για το σκοπό αυτό αναπτύχθηκε τεχνική γραμμικής μεταβολής διαγωγιμότητας διαγωγών. Ο ενισχυτής μεταβλητού κέρδους που σχεδιάστηκε λειτουργεί με τροφοδοσία 0.8V ενώ το κέρδος έχει εύρος μεταβολής 17dB και μπορεί να ενσωματωθεί σε βρόχο αυτομάτου ελέγχου κέρδους χαμηλής τροφοδοσίας. Για το σκοπό αυτό σχεδιάστηκαν με την τεχνική οδήγησης τρανζίστορ από το υπόστρωμα και δυο κυκλώματα τετραγωνικής συνάρτησης με τροφοδοσία 0.8V και 0.5V αντίστοιχα. / In recent years the need for analog integrated circuits with low-voltage and low-power is more than urgent. The main reason for this need is the rapid growth of portable electronic devices for multimedia applications (laptops, netbooks, mobiles, etc.) and even more for biomedical devices applications. In many cases, these electronic devices provide connectivity to wireless networks (WLANs) and therefore they incorporate transceiver systems. Thus, requirements such as low-voltage and low-power are a necessity. One of the basic analog “building blocks” for circuit design is differential voltage amplifiers. This thesis presents complete solutions for low-voltage differential amplifiers in standard CMOS technology of 0.35μm and 0.18μm. The proposed amplifiers were designed with bulk-driven technique. In the first place are designed differential voltage amplifiers that include input stage with negative resistance circuitry. This way the proposed amplifiers improve the small input transconductance due to bulk-driven transistors. Thus, novel amplifier structures are obtained with a voltage supply equal even to 0.8V. The amplifiers performance is characterized both through simulation and experimental results. The convergence of simulation and experimental results demonstrate that the proposed amplifiers circuits designed with bulk-driven technique are significant solution in the design of low-voltage amplifiers. In the next step a differential bulk-driven voltage follower is designed with 1V voltage supply. The proposed follower is used as a differential input stage for a differential voltage amplifier with the same voltage supply. The proposed amplifier is capable to operate rail-to-rail for common mode input signals. Also, the proposed voltage follower is modified in order to operate in extreme voltage supply of 0.5V. The modified voltage follower is used, again, as a differential input stage for a differential voltage amplifier while the whole amplifier used a voltage supply equal to 0.5V. Both proposed amplifiers topologies that use bulk-driven differential voltage followers as input stages are complete solutions for low-voltage and ultra low-voltage amplifiers applications. Finally, a new technique for linear transconductance variation, applicable in any kind of transconductor, is introduced. The proposed technique is used to build a bulk-driven variable gain amplifier (VGA). The proposed VGA operate with 0.8V voltage supply while produce a gain range variation equal to 17dB. The amplifier could incorporate in an automatic gain control loop (AGC) for low-voltage applications. For this purpose, two bulk-driven voltage squarers circuits with voltage supply 0.8V and 0.5V was also proposed.

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