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  • About
  • The Global ETD Search service is a free service for researchers to find electronic theses and dissertations. This service is provided by the Networked Digital Library of Theses and Dissertations.
    Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
1

Pattern synthesis for small phased array antennas

Darwood, Peter B. January 1998 (has links)
No description available.
2

Performance optimisation of small antenna arrays

Khan, Asim Ali January 2011 (has links)
This thesis addresses radiation pattern synthesis problems for small linear periodic phased arrays (with array elements less then 10). Due to the small array size conventional pattern synthesis techniques fail to produce the required results. In the case of practical small arrays, mutual coupling and element pattern asymmetric effect degrade the array radiation performance. The main performance metrics considered in this thesis include side lobe level (SLL), gain, halfpower beamwidth (HPBW) and mainbeam scan direction. The conventional pattern synthesis approaches result in sub optimal gain, SLL and HPBW due to the limited number of elements and the mutual coupling involved. In case of difference pattern synthesis these factors resulted in lower difference pattern slope, degraded SLL and difference peak asymmetry. The sum and difference patterns are used in monopulse arrays and a simplified feed that could produce both patterns with acceptable radiation properties is of interest and has been examined (chapter 5). A conventional technique is applied to small arrays to synthesise a sector beam and there is limited control over the radiation pattern. It is shown that the mutual coupling has significant effect on the array radiation pattern and mitigation is necessary for optimum performance (chapter 6). Furthermore, wideband phased arrays may have a natural limitation of the HPBW in low gain applications and minimisation of the variation becomes important. Also the SLL variations for wideband antenna arrays in the presence of mutual coupling considerably degrade the radiation pattern. The mutual coupling degrades significantly the radiation pattern performance in case of small scanning wideband arrays (chapter 7). It is the primary goal of this thesis to develop an optimisation scheme thatis applied in the above scenarios (chapters 3 & 4). The only degree of freedom assumed is the array excitation. Optimised amplitude and phase for each element in the array are determined by the proposed scheme, concurrently. The deterministic optimisation techniques reported in the literature for the pattern synthesis may involve complicated problem modelling. The heuristic opti-misation techniques generally are computationally expensive. The proposedIntelligent z-space Boundary Condition-Particle Swarm Optimiser (IzBC-PSO)is based on a heuristic algorithm. This scheme can be applied to a wider rangeof problems without significant modifications and requires fewer computationscompared to the competing techniques.In order to verify the performance of IzBC-PSO antenna array measure-ments were performed in the receiving mode only using the online and offlinedigital beamforming setups described in chapter 8. The measurement resultsshow that the proposed scheme may be successfully applied with both onlineand offline digital beamformers for a practical small array (chapter 8).
3

Design and Characterization of Phased Arrays for UAS Detection and Tracking

Buck, David 02 August 2022 (has links)
This work continues the development of phased array radar for UAS detection and tracking. The earlier 1D scanning, 4 channel BYU SAA radar is improved upon and replicated to form a network of radars. These are shown to work together for higher level tracking across multiple fields of view. Additionally, a new phased array instrument is designed and constructed with 16 channels, 2D scanning, and improved signal processing algorithms. Preliminary metrics and field results show the operation of this sensor. A new technique for measuring array mutual impedances from embedded element patterns is developed here. This technique uses an antenna range instead of a network analyzer. New mathematical relationships are built to handle cases for practical measurements and field transformations. Demonstration of this method with a 2x2 uniform rectangular array is shown and compares favorably with the mutual impedances traditionally measured with a network analyzer. A new way to measure radiation efficiency using the antenna Y factor method is demonstrated. This method does not require an expensive field measurement chamber and can be done with a simple ground shield and absorber foam. Various X band antennas have their radiation efficiency characterized and compare favorable with known efficiencies.
4

Efficient FPGA SoC Processing Design for a Small UAV Radar

Newmeyer, Luke Oliver 01 April 2018 (has links)
Modern radar technology relies heavily on digital signal processing. As radar technology pushes the boundaries of miniaturization, computational systems must be developed to support the processing demand. One particular application for small radar technology is in modern drone systems. Many drone applications are currently inhibited by safety concerns of autonomous vehicles navigating shared airspace. Research in radar based Detect and Avoid (DAA) attempts to address these concerns by using radar to detect nearby aircraft and choosing an alternative flight path. Implementation of radar on small Unmanned Air Vehicles (UAV), however, requires a lightweight and power efficient design. Likewise, the radar processing system must also be small and efficient.This thesis presents the design of the processing system for a small Frequency Modulated Continuous Wave (FMCW) phased array radar. The radar and processing is designed to be light-weight and low-power in order to fly onboard a UAV less than 25 kg in weight. The radar algorithms for this design include a parallelized Fast Fourier Transform (FFT), cross correlation, and beamforming. Target detection algorithms are also implemented. All of the computation is performed in real-time on a Xilinx Zynq 7010 System on Chip (SoC) processor utilizing both FPGA and CPU resources.The radar system (excluding antennas) has dimensions of 2.25 x 4 x 1.5 in3, weighs 120 g, and consumes 8 W of power of which the processing system occupies 2.6 W. The processing system performs over 652 million arithmetic operations per second and is capable of performing the full processing in real-time. The radar has also been tested in several scenarios both airborne on small UAVs as well as on the ground. Small UAVs have been detected to ranges of 350 m and larger aircraft up to 800 m. This thesis will describe the radar design architecture, the custom designed radar hardware, the FPGA based processing implementations, and conclude with an evaluation of the system's effectiveness and performance.
5

Efficient FPGA SoC Processing Design for a Small UAV Radar

Newmeyer, Luke Oliver 01 April 2018 (has links)
Modern radar technology relies heavily on digital signal processing. As radar technology pushes the boundaries of miniaturization, computational systems must be developed to support the processing demand. One particular application for small radar technology is in modern drone systems. Many drone applications are currently inhibited by safety concerns of autonomous vehicles navigating shared airspace. Research in radar based Detect and Avoid (DAA) attempts to address these concerns by using radar to detect nearby aircraft and choosing an alternative flight path. Implementation of radar on small Unmanned Air Vehicles (UAV), however, requires a lightweight and power efficient design. Likewise, the radar processing system must also be small and efficient. This thesis presents the design of the processing system for a small Frequency Modulated Continuous Wave (FMCW) phased array radar. The radar and processing is designed to be light-weight and low-power in order to fly onboard a UAV less than 25 kg in weight. The radar algorithms for this design include a parallelized Fast Fourier Transform (FFT), cross correlation, and beamforming. Target detection algorithms are also implemented. All of the computation is performed in real-time on a Xilinx Zynq 7010 System on Chip (SoC) processor utilizing both FPGA and CPU resources. The radar system (excluding antennas) has dimensions of 2.25 x 4 x 1.5 in3, weighs 120 g, and consumes 8 W of power of which the processing system occupies 2.6 W. The processing system performs over 652 million arithmetic operations per second and is capable of performing the full processing in real-time. The radar has also been tested in several scenarios both airborne on small UAVs as well as on the ground. Small UAVs have been detected to ranges of 350 m and larger aircraft up to 800 m. This thesis will describe the radar design architecture, the custom designed radar hardware, the FPGA based processing implementations, and conclude with an evaluation of the system's effectiveness and performance.
6

Conception et réalisation d'un système de Télécommunications MIMO avec Formation Numérique de Faisceaux en réception ; Calibrage aveugle du Démodulateur triphasé Zéro-IF et comparaison au démodulateur classique à 2 voies I et Q.

Mabrouk, Kais 12 December 2008 (has links) (PDF)
Dans le cadre de ce travail de recherche, nous nous somme intéressés à un système de télécommunication MIMO (Multiple Input Multiple Output) à multiplexage spatial utilisant des récepteurs Zero-IF et la technique de formation numérique de faisceaux (FF). Le domaine d'application de ces travaux de recherches peuvent être aussi bien les applications fixes (exp: WiFi, IEEE) que les applications mobiles (exp: LTE, 3GPP).<br /> La première partie de ce travail est consacrée à une étude comparative entre les différents types de démodulateurs cinq-port et triphasés. Cette étude a permis de mettre en évidence l'aspect tridimensionnel des démodulateurs cinq-port et triphasés, de gagner 20dB en termes de réjection des produits d'intermodulation des signaux adjacents et de trouver une nouvelle méthode de calibrage aveugle du récepteur.<br /> La seconde partie de la thèse se concentre sur le prototypage d'un système MIMO. Cette phase nous a permis d'exposer les difficultés de mise en place de ce genre de système et de souligner les nouvelles problématiques qui n'apparaissait pas auparavant dans les systèmes mono- transcepteur. Aussi, un algorithme de Formation de Faisceau a été développé dans cette partie. Ce FF numérique a permis non seulement d'accroître la capacité mais aussi la qualité de liaison en considérant le système MIMO comme N système SIMO en parallèle. Comparativement à la technique ZF(Zero Forcing), nous démontrons que le FF permet d'obtenir une meilleure qualité de signaux pour des faibles valeurs de rapport signal à bruit.
7

Low Cost Fpga Based Digital Beamforming Architecture for Casa Weather Radar Applications

Seguin, Emmanuel J 01 January 2010 (has links) (PDF)
Digital beamforming is a powerful signal processing technique used in many communication and radar sensing applications. However, despite its many advantages, its high cost makes it a less popular choice than other directional antenna options. The development of a low cost architecture for digital beamforming would make it a more feasible option, allowing it to be used for a number of new applications. Specifically, the Collaborative, Adaptive Sensing of the Atmosphere (CASA) project’s Distributed Collaborative Adaptive Sensing (DCAS) system, a low cost weather radar system, could benefit from the incorporation of digital beamforming into small, inexpensive but highly functional radars. Existing DBF architectures are implemented in complex systems which include a number of expensive processing modules and other associated hardware. This project shows a low-cost digital beamforming architecture that has been developed by utilizing today’s powerful and inexpensive FPGA devices along with recently available low-voltage-differential-signaling enabled multi-channel analog to digital conversion hardware. The utilization of commercially available devices rather than custom hardware allows this architecture to be manufactured at a fraction of the cost of most. This makes it a viable alternative to the classic dish antennas for the DCAS system, allowing a reduction in size and cost which will benefit deployment. The flexibility of an FPGA-based DBF system will result in a more robust radar system. With this in mind, an architecture has been developed, fabricated and evaluated.

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