As research into the dynamic characteristics of job performance across time has continued to accumulate, associated implications for performance appraisal have become evident. At present, several studies have demonstrated that systematic trends in job performance across time influence how performance is ultimately judged. However, little research has considered the processes by which the performance trend-performance rating relationship occurs. In the present study, I addressed this gap. Specifically, drawing on attribution theory, I proposed and tested a model whereby the performance trend-performance rating relationship occurs through attributions to ability and effort. The results of this study indicated that attributions to ability, but not effort, mediate the relationship between performance trend and performance ratings and that this relationship depends on attribution-related cues. Implications for performance appraisal research and theory are discussed.

Due to government regulations together with health and safety reasons, there are increasing demands on reducing hazardous polluting chemicals from fossil fuel power plants. Therefore, more efforts are imposed on using renewable resources such as water, wind, solar and tide to produce clean/green electricity. On top of that, there is another increasing demand from Original Equipment Manufacturers (OEMs) to operate power plants with higher load while keep the power loss to the minimum. These requirements drive conventional fluid film bearings to its mechanical and temperature limits. This calls for the development of new bearing system designs. An outstanding tribological performance such as low start-up and break-away friction, excellent resistance to chemical attack and anti-seizure properties, can be achieved by introducing compliant polymer liners. At the same time, bearings with compliant liners may alter rotor-bearing system dynamic behaviour compared to the systems with conventional white metal bearings. The research approach of this thesis is to implement compliant liner on bearing surface, impose synchronous shaft excitation and investigate the effect of bearing design parameters on bearing dynamic response. Plain cylindrical journal bearings with different compliant liner thicknesses were analysed using a FEM approach. The numerical model was compared with an in-house developed code based on the finite difference method (FDM) for a bearing operated at steady state conditions. Results obtained by the numerical models showed good agreement. After verification of the numerical model for fixed geometry journal bearings, models for tilting pad journal bearings were developed. Dynamic behaviour of the tilting pad journal bearing with three pads with line pivot geometry was compared with published data. A good agreement was obtained between the two numerical models. The effect of pad pivot geometry on bearing dynamic response was investigated. Vertical and horizontal shaft configurations were compared in terms of the effect of preload factor, radial clearance, pivot offset, and pad inclination angles. Influence of the elastic properties of compliant liners was also studied. All these factors significantly affect bearing dynamic response. It is shown how these factors should be selected to control the journal orbit sizes. Misalignments in compliant tilting pad journal bearings were analysed for load between pivots and load on pivots with consideration of thermal effects. Significant improvements in bearing performance were obtained with compliant bearings compared to white metal bearings. Furthermore, different polymer materials (PTFE, UHMWPE, pure PEEK and PEEK composite) were characterized using Frequency Response Function (FRF). It was shown that as the excitation frequency increased the equivalent stiffness was more or less constant while equivalent damping decreased exponentially. PTFE had similar equivalent stiffness compared to PEEK. As for equivalent damping, PTFE had slightly higher damping compared to PEEK or UHMWPE. Oil film thickness, oil film temperature and loads on tilting pad journal bearing were measured on 10 MW Kaplan hydroelectric power machine. Test results were compared to FEM model. It was shown that stiffness of the supporting structure may be more important to machine performance than the stiffness of the bearing alone. / <p>QC 20150409</p> / Swedish Hydropower Centre

abstract: An embedded HVDC system is a dc link with at least two ends being physically connected within a single synchronous ac network. The thesis reviews previous works on embedded HVDC, proposes a dynamic embedded HVDC model by PSCAD program, and compares the transient stability performance among AC, DC and embedded HVDC. The test results indicate that by installing the embedded HVDC, AC network transient stability performance has been largely improved. Therefore the thesis designs a novel frequency control topology for embedded HVDC. According to the dynamic performance test results, when the embedded HVDC system equipped with a frequency control, the system transient stability will be improved further. / Dissertation/Thesis / M.S.Tech Electrical Engineering 2013

This work details the development of a stability and control module for implementation into a Multidisciplinary Design Optimization (MDO) framework for the conceptual design of conventional and advanced aircraft. A novel approach, called the Variance Constrained Flying Qualities (VCFQ) approach, is developed to include closed-loop dynamic performance metrics in the design optimization process. The VCFQ approach overcomes the limitations of previous methods in the literature, which only functioned for fully decoupled systems with single inputs to the system. Translation of the modal parameter based flying qualities requirements into state variance upper bounds allows for multiple-input control laws which can guarantee upper bounds on closed-loop performance metrics of the aircraft states and actuators to be rapidly synthesized. A linear matrix inequality (LMI) problem formulation provides a general and scalable numerical technique for computing the feedback control laws using convex optimization tools. The VCFQ approach is exercised in a design optimization study of a relaxed static stability transonic transport aircraft, wherein the empennage assembly is optimized subject to both static constraints and closed-loop dynamic constraints. Under the relaxed static stability assumption, application of the VCFQ approach resulted in a 36% reduction in horizontal tail area and a 32% reduction in vertical tail area as compared to the baseline configuration, which netted a weight savings of approximately 5,200 lbs., a 12% reduction in cruise trimmed drag, and a static margin which was marginally stable or unstable throughout the flight envelope. State variance based dynamic performance constraints offer the ability to analyze large, highly coupled systems, and the linear matrix inequality problem formulation can be extended to include higher-order closed-loop design objectives within the MDO. Recommendations for further development and extensions of this approach are presented at the end. / This material is based on research sponsored by Air Force Research Laboratory under agreement number FA8650-09-2-3938. The U.S. Government is authorized to reproduce and distribute reprints for Governmental purposes notwithstanding any copyright notation thereon. The views and conclusions contained herein are those of the authors and should not be interpreted as necessarily representing the official policies or endorsements, either expressed or implied, of Air Force Research Laboratory or the U.S. Government. / Ph. D.

Paralleling operation of DC/DC converters is widely used in today's distributed power systems. To ensure balanced output currents among paralleled power modules, current sharing control is usually necessary.Active current sharing controls with current feedback mechanism are widely used in today's power supplies. However, the dynamic performance of these current sharing control schemes are not yet clearly explored. In this work, the dynamic current sharing performance is evaluated for paralleling systems with the output impedance approach. As the representative of the terminal characteristic of a power converter, output impedance is a powerful tool to study the dynamic response under load transients. The dynamic current sharing analyses are then conducted for three different active current sharing control structures and a comprehensive comparison among them helps the designer to choose appropriate controls for different applications. On the other hand, high-frequency load transients are possible to happen for voltage regulators, which are the power supplies of microprocessors. In order to study the dynamic current sharing performance for a paralleling system when the perturbation frequency is higher than half of the switching frequency,the conventional output impedance concept needs to be extended. Due to the non-linear behavior of a switching modulator, the beat-frequency phenomenon could cause unexpected failure of a power supply when the perturbation frequency is close to the switching frequency. To address this issue, an unconventional multi-frequency model is proposed for high-frequency dynamic current sharing studies. With this model, the sideband components are possible to be included and the beat-frequency oscillations can be predicted. After that, the conventional impedance concept is expanded in the form of extended describing function, so that the terminal characteristics of paralleled converters are represented by a series of impedances. Besides the analyses, this work also proposed several solutions for the beat-frequency oscillation issue which are experimentally verified. In summary, both low-frequency and high-frequency dynamic current sharing performances are studied in this dissertation. The output impedance concept and its extension in the form of extended describing function are utilized as the tools for researches. With these powerful tools, more insights are obtained to help better design of a paralleling system. / Ph. D.

Propõe-se, com este trabalho, estudar numericamente se a redundância cinemática e a redundância de atuação podem ser boas alternativas para que manipuladores planares de cinemática paralela atinjam altas acelerações. Sabe-se que estes tipos de redundância promovem uma redução de singularidades do sistema robótico entre outros benefícios. No entanto, a avaliação comparativa do desempenho dinâmico de manipuladores redundantes ainda é pouco estudada. Este estudo não é trivial pois a redundância significa não somente o aumento do torque disponível, mas também que a inércia do sistema foi aumentada. A avaliação numérica deste trabalho se dará por meio do desenvolvimento de modelos cinemáticos e dinâmicos das possíveis configurações de manipuladores paralelos planares com redundância cinemática e redundância de atuação. Esta avaliação pode ser feita pela comparação entre os manipuladores redundantes e o não-redundante para desenvolver uma mesma trajetória do end-effector. Entretanto, esta avaliação é dependente da trajetória, logo esse trabalho também propõe uma avaliação através de um índice dinâmico em toda a área de trabalho dos manipuladores. / The aim of this work is to study numerically if the kinematic redundancy and the actuation redundancy can be good alternatives for parallel planar manipulators to achieve high accelerations. It is known that types of redundancy promote, among other benefits, a significant reduction in the singularities. However, the evaluation of the redundancy as a good solution to increase the dynamic performance was not studied. This study is not trivial because the redundancy means not only that there is more torque available, but also that the inertia of the system has been considerably increased. Different configurations of the redundant manipulator will be evaluated numerically through kinematic and dynamic models. This evaluation can be performed by the comparison among the non redundant manipulator and the redundant manipulators to execute the same task. This evaluation is task dependent, so this work proposes a dynamic index to desing dynamic maps over the workspace.

Propõe-se, com este trabalho, estudar numericamente se a redundância cinemática e a redundância de atuação podem ser boas alternativas para que manipuladores planares de cinemática paralela atinjam altas acelerações. Sabe-se que estes tipos de redundância promovem uma redução de singularidades do sistema robótico entre outros benefícios. No entanto, a avaliação comparativa do desempenho dinâmico de manipuladores redundantes ainda é pouco estudada. Este estudo não é trivial pois a redundância significa não somente o aumento do torque disponível, mas também que a inércia do sistema foi aumentada. A avaliação numérica deste trabalho se dará por meio do desenvolvimento de modelos cinemáticos e dinâmicos das possíveis configurações de manipuladores paralelos planares com redundância cinemática e redundância de atuação. Esta avaliação pode ser feita pela comparação entre os manipuladores redundantes e o não-redundante para desenvolver uma mesma trajetória do end-effector. Entretanto, esta avaliação é dependente da trajetória, logo esse trabalho também propõe uma avaliação através de um índice dinâmico em toda a área de trabalho dos manipuladores. / The aim of this work is to study numerically if the kinematic redundancy and the actuation redundancy can be good alternatives for parallel planar manipulators to achieve high accelerations. It is known that types of redundancy promote, among other benefits, a significant reduction in the singularities. However, the evaluation of the redundancy as a good solution to increase the dynamic performance was not studied. This study is not trivial because the redundancy means not only that there is more torque available, but also that the inertia of the system has been considerably increased. Different configurations of the redundant manipulator will be evaluated numerically through kinematic and dynamic models. This evaluation can be performed by the comparison among the non redundant manipulator and the redundant manipulators to execute the same task. This evaluation is task dependent, so this work proposes a dynamic index to desing dynamic maps over the workspace.

No description available.

The scope of this work can be summarized by three main aspects of DC-DC power converters. The first aspect is soft switching topologies to improve conversion efficiency for On-Board Converters or Point of load (POL) converters, the second aspect is load adaptive control techniques to improve all load efficiency for battery powered DC-DC converters that are applied to mobile devices, and the third aspect is dynamic performance improvement techniques to improve load transient in voltage regulators. Topologies and control techniques for DC-DC converters are presented after reviewing loads powering requirements and steady-state and transients design challenges.

The data center serves as the hardware foundation for artificial intelligence (AI) and cloud computing, constituting a global market that has surpassed $200 billion and is experiencing rapid growth. It is estimated that data centers contribute to 1.7-2.2% of the world's electricity generation. Conversely, up to 80% of the long-term operational expenditure of data centers is allocated to electricity consumption. Consequently, enhancing the efficiency of electric energy conversion in data centers is not only economically advantageous but also crucial for achieving carbon-neutral objectives. Through collaborative efforts between the industrial and academic sectors, substantial advancements have been achieved in the energy conversion efficiency of data centers. Most converters within the data center power architecture now boast efficiencies exceeding 99%. However, the bottleneck for further improvements in system efficiency lies in the voltage regulator modules (VRMs), which grapple with challenges such as high conversion ratios, elevated output currents, and substantial load transients. These challenges are particularly pronounced for AI processors and graphics processing units (GPUs), given their heightened power demands compared to conventional central processing units (CPUs). To enhance system efficiency, a revolutionary shift in power architecture has been introduced, advocating for the adoption of a 48 V data center power architecture to replace the conventional 12 V architecture. The higher 48 V bus voltage significantly reduces distribution loss on the bus. However, the primary challenge lies in managing high step-down voltage conversion while maintaining high efficiency. Additionally, high-performance microprocessors, including CPUs, GPUs, application-specific integrated circuits (ASICs), and field-programmable gate arrays (FPGAs), require hundreds of amperes of current at low voltage levels (e.g., GPUs need >220 A at <1.85 V, CPUs need >1000 A at <1.0 V). An unavoidable consequence of upscaling processor current and size is the substantial resistive loss in VRMs. This is because such loss scales with the square of the current [I2R], and the power path area (and resistance R) expands with the processor size. The Power Delivery Network (PDN) resistance in the "last inch" of the power delivery path is becoming a limiting factor in processor performance and system efficiency. The key to reducing the I2R loss is minimizing the distance between the VRMs and processors by utilizing ultra-high power density VRMs. Furthermore, the design of Voltage Regulator Modules (VRMs) for high-performance microprocessors encounters additional formidable challenges, especially when dealing with the requirements of contemporary computing architectures. The key hurdles encompass achieving high efficiency, handling low output voltage, accommodating wide voltage ranges, managing elevated output currents, and addressing significant load transients. These challenges prompt both academia and industry to explore novel topologies, innovative magnetic integration methods, and advanced control strategies. The prevailing trend in state-of-the-art 48V solutions centers around the adoption of two-stage configurations, wherein the second stage can leverage conventional 12V solutions. However, this approach imposes limitations on power density and efficiency, given that power traverses two cascaded DC/DC converters. Additionally, the footprint of decoupling capacitors and I2R loss on the intermedia bus between the two stages is emerging as a noteworthy consideration in designs. In response to these challenges, a novel proposition introduces a single-stage 48V coupled-transformer voltage regulator (CTVR) tailored for high-performance microprocessors. This innovative design aims to deliver ultra-high power density and superior efficiency. The converter employs a unique magnetic structure that integrates transformers and coupled inductors from multiple current-doubler rectifiers. Significantly, by utilizing the magnetizing inductors of transformers as output inductors, there is a substantial reduction in the size of magnetic components. Various implementations are explored, each addressing specific design objectives. Initially, a single-stage coupled-transformer voltage regulator (CTVR) with discrete magnetics is presented, offering a 48V solution while maintaining a comparable size and cost to a state-of-the-art 12V multiphase buck regulator. Leveraging the indirect-coupling concept, magnetic components are standardized, enabling scalability and facilitating multiphase operation. A prototype is constructed and tested to validate the CTVR's performance. With a 48V input and 1.8V output, the peak efficiency registers at 92.1%, and the power area density is 0.45 W/mm2. However, voltage ringing is observed in both primary and secondary switches due to a larger leakage inductance and hard-switching operation. Subsequently, a transition to soft-switching operation is implemented to address the voltage ringing issue. The leakage inductance is intentionally designed to supply energy for zero-voltage switching (ZVS) of primary switches, turning the previously perceived drawback into an opportunity for efficiency improvement. As a result, testing demonstrates a peak efficiency increase of more than 1%, reaching 93.6%. Furthermore, efforts are made to enhance small leakage inductance by employing well-interleaved printed circuit board (PCB) windings. Following a series of design optimizations, the prototype achieves a peak efficiency of 93.1% and a remarkable power density of 1037 W/in3, accounting for gate driver loss and size. Despite an increase in cost associated with PCB windings, this proposed solution attains the highest power density and stands as the pioneering 48V single-stage design surpassing 1000 W/in3 power density. When prioritizing efficiency in the design, the quasi-parallel Sigma converter emerges as another optimal choices for a 48V solution. However, the intricate and distinctive quasi-parallel structure of the Sigma converter necessitates a thorough examination of its control mechanism, particularly in light of the rapid load transient response requirements. To address this, an adaptive voltage positioning (AVP) design for the Sigma converter is introduced, employing enhanced V2 control. Guidelines and limitations are provided to stabilize the converter and enhance its overall performance. Ultimately, the AVP function and load transient performance are substantiated through simulation and experimental results. / Doctor of Philosophy / Data center is the hardware foundation of artificial intelligence (AI) and cloud computing. The global data center market has exceeded $200 billion and is fast growing. It is estimated that data center accounts for 1.7~2.2% of the world's electricity generation. On the other hand, up to 80% of the long-term operation expenditure of data centers is electricity. Thus, improving the efficiency of electric energy conversion in data centers is economically beneficial and critical to reaching the carbon neutral goal. The bottleneck for further improvements in system efficiency lies in the voltage regulator modules (VRMs), which grapple with challenges such as high conversion ratios, elevated output currents, and substantial load transients. These challenges are particularly pronounced for AI processors and graphics processing units (GPUs). In response to these challenges, a novel proposition introduces a single-stage 48V coupled-transformer voltage regulator (CTVR) tailored for high-performance microprocessors. This innovative design aims to deliver ultra-high power density and superior efficiency. The converter employs a unique magnetic structure that integrates transformers and coupled inductors from multiple current-doubler rectifiers. Significantly, by utilizing the magnetizing inductors of transformers as output inductors, there is a substantial reduction in the size of magnetic components. Various implementations are explored, each addressing specific design objectives. When prioritizing efficiency in the design, the quasi-parallel Sigma converter emerges as another optimal choices for a 48V solution. However, the intricate and distinctive quasi-parallel structure of the Sigma converter necessitates a thorough examination of its control mechanism, particularly in light of the rapid load transient response requirements. To address this, an adaptive voltage positioning (AVP) design for the Sigma converter is introduced, employing enhanced V2 control. Guidelines and limitations are provided to stabilize the converter and enhance its overall performance. Ultimately, the AVP function and load transient performance are substantiated through simulation and experimental results.