Switch mode power supplies are widely used in different applications. High efficiency and high power density are two driving forces for power supply systems. However, high dv/dt and di/dt in switch mode power supplies will cause severe EMI noise issue. In a typical front-end converter, the EMI filter usually occupies 1/3 to 1/4 volume of total converter. Hence, reducing the EMI noise of power converter can help reduce the volume of EMI filter and improving the total power density of the converter. The EMI noise can be separated as differential mode (DM) noise and common mode (CM) noise. For off-line switch mode power supplies, DM noise is dominated by PFC converter. CM noise is a more complicated issue. It is contributed by both PFC converter and DC/DC converter. The DM noise is contributed by input current ripple. Therefore, one method to reduce DM noise is interleaving. There are three methods to reduce CM noise: symmetry, balance and shielding. The idea of symmetry concept is generating another dv/dt source to cancel the original dv/dt source. However, this method is very difficult to achieve and usually has more loss. The balance technique forms a Wheatstone bridge circuit to minimize the CM noise. However, the balance technique cannot achieve very good attenuation at high frequency due to parasitics. Shielding technique is very popular in isolated DC-DC converters to reduce CM noise. However, the previous shielding method requires precise control of parasitic capacitance and dv/dt. It is very difficult to achieve good CM noise attenuation in mass production. In this dissertation, a novel one-layer shielding method for PCB winding transformer is provided. This shielding technique can block CM noise from primary side and also cancel the CM noise from secondary side. In addition, shielding does not increase the loss of converter too much. Furthermore, this shielding technique can be applied to matrix transformer structure. For matrix transformer LLC converter, the inter-winding capacitor is very large and will cause severe CM noise problem. By adding shielding layer, CM noise has been greatly reduced. Although flyback and LLC resonant converter are used as examples to demonstrate the concept, the novel shielding technique can also be applied to other topologies that have similar transformer structure. With Wide-band-gap power devices, the switching frequency of power converter can be pushed 10 times higher than traditional Si based converters. This provides an opportunity to use PCB winding magnetics. In order to reduce the switching loss, critical conduction mode is used in PFC converter. Because of high AC current in the inductor winding, litz wire was used to build the inductor. However, with coupled inductor concept and the proposed winding structure, CRM inductor is integrate into PCB winding for the first time. Furthermore, balance technique is applied to reduce CM noise for PFC converter. With PCB winding, the balance technique has better high frequency performance. The PCB winding inductor can achieve high power density, high efficiency and automated manufacture. Traditionally, two-stage EMI filter was utilized to achieve required EMI noise attenuation. With the developed high frequency, low EMI noise converter, single-stage EMI filter can be applied. However, there are self-parasitic and mutual parasitic components to impact the filter performance on high frequency. The near-field measurement is utilized to visualize the magnetic flux near those filter components. Thus, a better filter design and layout can be achieved to have better high frequency performance. / Ph. D. / Switch mode power supplies are widely used in different applications. High efficiency and high power density are two driving forces for power supply systems. In a world full of electronic devices, it is very important that these devices can work properly in a complicated electromagnetic environment. Thus, electromagnetic compatibility (EMC) is a significant characteristic of electronic devices. However, high dv/dt and di/dt in switch mode power supplies will cause severe EMI noise issue. In a typical front-end converter, the EMI filter usually occupies 1/3 to 1/4 volume of total converter. Hence, reducing the EMI noise of power converter can help reduce the volume of EMI filter and improving the total power density of the converter. In this dissertation, several methods to reduce EMI noise are proposed and analyzed. First, the shielding method for PCB winding transformer is proposed. It can effectively reduce EMI noise at wide frequency range. Second, balance technique is applied to reduce EMI noise of PFC converter. Traditionally, two-stage EMI filter was utilized to achieve required EMI noise attenuation. With the developed high frequency, low EMI noise converter, single-stage EMI filter can be applied. However, there are self-parasitic and mutual parasitic components to impact the filter performance on high frequency. The near-field measurement is utilized to visualize the magnetic flux near those filter components. Thus, a better filter design and layout can be achieved to have better high frequency performance.

In today's industrial power converters, converter reliability is essential, and converter topologies are well-established. Without a doubt, the power electronic industry continues to seek efficient power delivery and high power density. Resonant converters, especially LLC converters, have been intensively studied and applied in DC-DC converters. One of the most demanding applications for LLC converters is data centers. To date, LLC Resonant converters, are deployed in many applications for improved efficiency, density, and reliability. With the introduction of WBG devices coupled with the soft switching feature, the switching frequency can be extended beyond Mega-Hertz. With the significant increase in operating frequency, complicated magnetic components can be broken down into a cellular structure, each with a few number of turns. They can be easily implemented using 4-6 layers of PCB windings. Moreover, integrating the cellular cores using flux cancellation can further improve the power density. The proposed integrated magnetics can be automated in the manufacturing process. The magnetic size is reduced at this frequency, and planar magnetics using PCB winding become more relevant. PCB magnetics feature multiple advantages over Litz wire. The benefits are summarized as follows: The labor-intensive manufacturing process can be automated, thus reduction of cost. There is much reduced CM noise by using the shield layer. They have parasitics with much-improved reproducibility in large quantities. PCB windings feature less leakage between transformer windings because of the flexibility of the winding interleaving and the reduced number of turns. There is better thermal management due to the increased surface-to-body ratio. The design has a low profile and high-power density. However, it is not without its own limitations. There are challenges for high frequency PCB-magnetic magnetic design for the LLC converter. Firstly, With the recently developed high frequency core material, a phenomenon referred to as the dimensional resonant is observed. The effects of dimensional resonance were discussed in the literature when using an unusually large core structure; however, it can be observed more frequently under high excitation frequency, particularly with integrated magnetics. This dissertation discusses the dimensional effects of core loss on a PCB-based magnetics structure. A case study is presented on a 3-kW 400-to-48-V LLC prototype running at 1 MHz. The converter utilizes a low-profile matrix of two integrated transformers with a rectangular and thin cross-section area for reduced core loss. Specific solutions are presented. % Secondly, The matrix transformer is suitable for an LLC converter with high output current. However, the matrix transformer also increases the core size and core losses. The core loss degrades the LLC converter's light load and peak efficiency. In this dissertation, We discuss the design process and implementation of the DC-DC stage of the power supply unit for narrow range 48 V data center bus architecture. The optimization takes into account the number of elemental transformers, number of transformer turns, switching frequency, and transformer dimensions, namely winding width and core cross-section area. The optimization process results in a nearly 99% efficient 400-to-48-V LLC with a very high-power density and low profile fully integrated on PCB. A matrix of four transformers is used to reduce the termination loss of the secondary synchronous rectifier and achieve better thermal management. The number of secondary turns is optimized to achieve the best trade-off between winding loss, core loss, and power density. Another challenge arises for magnetic integration when multiple magnetic components with different characteristics come together. For instance, in the case of a transformer and an inductor on the same PCB. The PCB transformer is designed with perfectly interleaved primary and secondary layers to utilize the full PCB layer thickness. As a rule of thumb, the transformer winding layer is designed within 1 to 2 times the skin depth. On the other hand, the inductor's winding lacks interleaving and suffers from high MMF stress on layers. This makes the inductor prone to high eddy currents and eddy loss. Furthermore, this dissertation addresses the challenges associated with the high winding and core loss in the Integrated Transformer-Inductor (ITL). To overcome these challenges, we propose an improved winding design of the ITL by utilizing idle shielding layers for inductor integration within the matrix transformer. This method offers full printed circuit board (PCB) utilization, where all layers are consumed as winding, resulting in a significant reduction in the winding loss of the ITL. Moreover, we propose an improved core structure of the ITL that offers better flux distribution of the leakage flux within the magnetic core. This method reduces the core loss by more than 50% compared to the conventional core structure. We demonstrate the effectiveness of our proposed concepts by presenting the design of the ITL used in a high-efficiency, high-power-density 3-kW 400-to-48-V LLC module. The proposed converter achieves a peak efficiency of 98.7% and a power density of 1500 W/in3. This dissertation presents the concept of matrix inductors to solve such problems. A matrix of four resonant inductors is also designed to reduce the proximity effect between inductor windings and reduce inductor PCB winding loss. The matrix inductor provides a solution for high thermal stress in PCB-based inductors and reduces the inter-winding capacitance between inductor layers. This dissertation solves the challenges in magnetic design in high-frequency DC-DC converters in offline power supplies and data centers. This includes the transformer and inductor of the LLC converter. With the academic contribution in this dissertation, Wide-bandgap devices WBG can be successfully utilized in high-frequency DC-DC converters with Mega-Hertz switching frequency to achieve high efficiency, high power density, and automated manufacturing. The cost will be reduced, and the performance will be improved significantly. / Doctor of Philosophy / Industrial power converters need to be reliable and efficient to meet the power industry's demand for efficient power delivery and high power density. Research should focus on improving existing converter designs to improve fabrication, efficiency, and reliability. Resonant converters have been found to be effective in power conversion, especially in data centers where energy consumption is high. Three-element Resonant converters (LLC) are already used to improve efficiency, density, and reliability. By using Wide Bandgap devices and soft switching, the switching frequency can be extended beyond MHz, simplifying magnetic components and improving power density. The proposed integrated magnetics can be automated during the manufacturing process, further improving power density. At higher frequencies, planar magnetic components made with PCB winding are more effective than Litz wire. They are cheaper to make because of automation, have less common-mode noise, and are more reproducible in large quantities. PCB winding also has a low profile, high-power density, and better thermal management. However, it is not without its own limitations. There are challenges for high frequency PCB-magnetic magnetic design for the LLC converter. Firstly, With the recently developed high frequency core material, a phenomenon referred to as the dimensional resonant is observed. The effects of dimensional resonance were discussed in the literature when using an unusually large core structure; however, it can be observed more frequently under high excitation frequency, particularly with integrated magnetics. This dissertation discusses the effects of core loss on a PCB-based magnetics structure and presents solutions, including a case study on a 3-kW 400-to-48 V LLC prototype running at 1 MHz. Another challenge arises for magnetic integration when multiple magnetic components with different characteristics come together. For instance, in the case of a transformer and an inductor on the same PCB. The PCB transformer is designed with perfectly interleaved winding and low Ohmic loss. On the other hand, the inductor's winding lacks interleaving and suffers from a high proximity field. This makes the inductor prone to high eddy currents and eddy loss. This dissertation presents the concept of matrix inductors to solve such problems. A matrix of four resonant inductors is also designed to reduce the proximity effect between inductor windings and reduce inductor PCB winding loss. The matrix inductor provides a solution for high thermal stress in PCB-based inductors and reduces the inter-winding capacitance between inductor layers. Furthermore, this dissertation addresses the challenges associated with the high winding and core loss in the Integrated Transformer-Inductor (ITL). To overcome these challenges, we propose an improved winding design of the ITL by utilizing idle shielding layers for inductor integration within the matrix transformer. This method offers full printed circuit board (PCB) utilization, where all layers are consumed as winding, resulting in a significant reduction in the winding loss of the ITL. Moreover, we propose an improved core structure of the ITL that reduces the core loss by more than 50% compared to the conventional core structure. We demonstrate the effectiveness of our proposed concepts on a high-efficiency, high-power-density 3-kW 400-to-48-V LLC module. The proposed converter achieves a peak efficiency of 98.7% and a power density of 1500 W/in3. This dissertation solves the challenges in magnetic design in high-frequency DC-DC converters in offline power supplies and data centers. This includes the transformer and inductor of the LLC converter. With the academic contribution in this dissertation, Wide-bandgap devices WBG can be successfully utilized in high-frequency DC-DC converters with Mega-Hertz switching frequency to achieve high efficiency, high power density, and automated manufacturing. The cost will be reduced, and the performance will be improved significantly.

As a scalable, high-efficiency, and simple converter topology, an interleaved, multiphase buck converter has been widely used to power microprocessors in information industry. As modern microprocessors continuously advance, the required current for high-performance microprocessors used in data center applications could be several hundreds of amperes with a current slew rate larger than 1000 A/μs. This poses great challenges for a high-efficiency, high-power-density voltage regulator design with a fast transient response. On the other hand, the design challenges of voltage regulators in mobile applications are also increasing due to the stringent requirement on the device thickness and the battery life. In a multiphase buck converter, discrete inductors are widely used as energy storage elements. However, this solution has a limited transient response with a large size of magnetic components. To overcome these issues, coupled inductor is proposed to realize a small steady-state current ripple, a fast transient response, and a small inductor size at the same time. Although lots of studies have been conducted in the topic of the coupled inductor, there are still several challenges unsolved in this area. These challenges are addressed through a comprehensive study in this dissertation. First, a comprehensive analysis of different coupled inductor structures is crucial to identify the benefits and limitations of each inductor structure and provide design guidance under different application requirements. Based on the coupling mechanism, different coupled inductor structures are categorized as a direct-coupled inductor (DCL), an indirect-coupled inductor (ICL) or a hybrid-coupled inductor (HCL) in this work. The performance of these three types of coupled inductors is analyzed in detail through the equivalent inductance analysis and the magnetic flux analysis. For the applications that require a small phase number, a DCL can achieve the smallest inductor size with a given inductance requirement. As the phase number increases, it is beneficial to use an ICL and an HCL due to their symmetrical, simple, and scalable inductor structures. As compared to an ICL, an HCL can achieve a smaller inductor size due to the flux-cancellation effect. The difference between a DCL, an ICL and an HCL are revealed quantitively with several design examples through this study. Second, the steady-state inductance (Lss) and the transient inductance (Ltr) are two key design parameters for coupled inductors. A large Lss and a small Ltr are preferred from the circuit performance point of view. However, there is a design conflict in an ICL and an HCL under the inductor size constraint, where reducing Ltr also results in a smaller Lss. A variable coupling coefficient concept is proposed to overcome this issue. With the same Lss, the proposed method can achieve a smaller Ltr during load transients as compared with the conventional method. This concept is realized by applying a nonlinear inductor in the additional winding loop with the current in this loop as the control source. Compared with the conventional structure, the proposed structure can achieve a great output voltage spike reduction and output capacitance reduction. Third, although an ICL and an HCL are promising candidates for multiphase coupled inductors, an extra inductor is required in the additional winding loop to adjust the coupling coefficient. This additional inductor occupies extra space. To shrink the total inductor size, several improved magnetic core structures are proposed to achieve the controllable coupling through the magnetic integration for an ICL and an HCL. Furthermore, the thickness of the core plate can be significantly reduced by the improved core structure for an HCL. Overall, it is demonstrated that the inductor footprint is greatly reduced by the proposed core structure, as compared with the conventional solution. Lastly, a novel PCB-embedded coupled inductor structure is proposed for a 20MHz integrated voltage regulator (IVR) for mobile applications. To achieve a small inductor footprint and a low profile, the inductor structure with a lateral flux pattern and direct coupling is adopted. Compared with the state-of-the-art solution, the proposed structure can adjust the coupling in a simple core structure by changing the inductor winding pattern. The proposed structure integrates multiple inductors into one magnetic core and is embedded into PCB with a total thickness of 0.54 mm. In contrast to prior arts, the proposed inductor structure features a large inductance density and quality factor with a much smaller DC resistance (DCR), thus is seen as a promising candidate for IVR applications. / Doctor of Philosophy / As modern microprocessors continuously advance in the information industry, the required current for high-performance microprocessors used in data center applications could be several hundreds of amperes with a current slew rate larger than 1000 A/μs. This poses great challenges for the power converter design. On the other hand, the design challenges of power converters in mobile applications are also increasing due to the stringent requirement on the device thickness and the battery life. As a scalable, high-efficiency, and simple converter topology, an interleaved, multiphase buck converter has been widely used to power these processors. In a multiphase buck converter, discrete inductors are widely used as energy storage elements. However, this solution has a limited transient response with a large size of magnetic components. To overcome these issues, coupled inductor is proposed to realize a small steady-state current ripple, a fast transient response, and a small inductor size at the same time. Although lots of studies have been conducted in the topic of the coupled inductor, there are still several challenges unsolved in this area. These challenges are addressed through a comprehensive study in this dissertation. First, a comprehensive analysis and comparison of different coupled inductor structures is crucial to identify the benefits and limitations of each inductor structure and provide design guidance under different application requirements. Based on the coupling mechanism, different coupled inductor structures are categorized as a direct-coupled inductor (DCL), an indirect-coupled inductor (ICL) or a hybrid-coupled inductor (HCL) in this work. The performance of these three types of coupled inductors is analyzed in detail through the equivalent inductance analysis and the magnetic flux analysis. The difference between a DCL, an ICL and an HCL are revealed quantitively with several design examples through this study. Second, the steady-state inductance (Lss) and the transient inductance (Ltr) are two key design parameters for coupled inductors. A large Lss and a small Ltr are preferred from the circuit performance point of view. However, there is a design conflict in an ICL and an HCL under the inductor size constraint, where reducing Ltr also results in a smaller Lss. A variable coupling coefficient concept is proposed to overcome this issue. This concept is realized by applying a nonlinear inductor in the conventional structure. Compared with the conventional structure, the proposed structure can achieve a great output voltage spike reduction and output capacitance reduction. Third, although an ICL and an HCL are promising candidates for multiphase coupled inductors, an extra inductor is required in the additional winding loop to adjust the coupling coefficient. This additional inductor occupies extra space. To shrink the total inductor size, several improved magnetic core structures are proposed to achieve the controllable coupling through the magnetic integration for an ICL and an HCL. Lastly, a novel PCB-embedded coupled inductor structure is proposed for a 20MHz integrated voltage regulator (IVR) for mobile applications. Compared with the state-of-the-art solution, the proposed structure can adjust the coupling in a simple core structure by changing the inductor winding pattern. In contrast to prior arts, the proposed inductor structure features a large inductance density and quality factor with a much smaller DC resistance (DCR), thus is seen as a promising candidate for IVR applications.

The data center serves as the hardware foundation for artificial intelligence (AI) and cloud computing, constituting a global market that has surpassed $200 billion and is experiencing rapid growth. It is estimated that data centers contribute to 1.7-2.2% of the world's electricity generation. Conversely, up to 80% of the long-term operational expenditure of data centers is allocated to electricity consumption. Consequently, enhancing the efficiency of electric energy conversion in data centers is not only economically advantageous but also crucial for achieving carbon-neutral objectives. Through collaborative efforts between the industrial and academic sectors, substantial advancements have been achieved in the energy conversion efficiency of data centers. Most converters within the data center power architecture now boast efficiencies exceeding 99%. However, the bottleneck for further improvements in system efficiency lies in the voltage regulator modules (VRMs), which grapple with challenges such as high conversion ratios, elevated output currents, and substantial load transients. These challenges are particularly pronounced for AI processors and graphics processing units (GPUs), given their heightened power demands compared to conventional central processing units (CPUs). To enhance system efficiency, a revolutionary shift in power architecture has been introduced, advocating for the adoption of a 48 V data center power architecture to replace the conventional 12 V architecture. The higher 48 V bus voltage significantly reduces distribution loss on the bus. However, the primary challenge lies in managing high step-down voltage conversion while maintaining high efficiency. Additionally, high-performance microprocessors, including CPUs, GPUs, application-specific integrated circuits (ASICs), and field-programmable gate arrays (FPGAs), require hundreds of amperes of current at low voltage levels (e.g., GPUs need >220 A at <1.85 V, CPUs need >1000 A at <1.0 V). An unavoidable consequence of upscaling processor current and size is the substantial resistive loss in VRMs. This is because such loss scales with the square of the current [I2R], and the power path area (and resistance R) expands with the processor size. The Power Delivery Network (PDN) resistance in the "last inch" of the power delivery path is becoming a limiting factor in processor performance and system efficiency. The key to reducing the I2R loss is minimizing the distance between the VRMs and processors by utilizing ultra-high power density VRMs. Furthermore, the design of Voltage Regulator Modules (VRMs) for high-performance microprocessors encounters additional formidable challenges, especially when dealing with the requirements of contemporary computing architectures. The key hurdles encompass achieving high efficiency, handling low output voltage, accommodating wide voltage ranges, managing elevated output currents, and addressing significant load transients. These challenges prompt both academia and industry to explore novel topologies, innovative magnetic integration methods, and advanced control strategies. The prevailing trend in state-of-the-art 48V solutions centers around the adoption of two-stage configurations, wherein the second stage can leverage conventional 12V solutions. However, this approach imposes limitations on power density and efficiency, given that power traverses two cascaded DC/DC converters. Additionally, the footprint of decoupling capacitors and I2R loss on the intermedia bus between the two stages is emerging as a noteworthy consideration in designs. In response to these challenges, a novel proposition introduces a single-stage 48V coupled-transformer voltage regulator (CTVR) tailored for high-performance microprocessors. This innovative design aims to deliver ultra-high power density and superior efficiency. The converter employs a unique magnetic structure that integrates transformers and coupled inductors from multiple current-doubler rectifiers. Significantly, by utilizing the magnetizing inductors of transformers as output inductors, there is a substantial reduction in the size of magnetic components. Various implementations are explored, each addressing specific design objectives. Initially, a single-stage coupled-transformer voltage regulator (CTVR) with discrete magnetics is presented, offering a 48V solution while maintaining a comparable size and cost to a state-of-the-art 12V multiphase buck regulator. Leveraging the indirect-coupling concept, magnetic components are standardized, enabling scalability and facilitating multiphase operation. A prototype is constructed and tested to validate the CTVR's performance. With a 48V input and 1.8V output, the peak efficiency registers at 92.1%, and the power area density is 0.45 W/mm2. However, voltage ringing is observed in both primary and secondary switches due to a larger leakage inductance and hard-switching operation. Subsequently, a transition to soft-switching operation is implemented to address the voltage ringing issue. The leakage inductance is intentionally designed to supply energy for zero-voltage switching (ZVS) of primary switches, turning the previously perceived drawback into an opportunity for efficiency improvement. As a result, testing demonstrates a peak efficiency increase of more than 1%, reaching 93.6%. Furthermore, efforts are made to enhance small leakage inductance by employing well-interleaved printed circuit board (PCB) windings. Following a series of design optimizations, the prototype achieves a peak efficiency of 93.1% and a remarkable power density of 1037 W/in3, accounting for gate driver loss and size. Despite an increase in cost associated with PCB windings, this proposed solution attains the highest power density and stands as the pioneering 48V single-stage design surpassing 1000 W/in3 power density. When prioritizing efficiency in the design, the quasi-parallel Sigma converter emerges as another optimal choices for a 48V solution. However, the intricate and distinctive quasi-parallel structure of the Sigma converter necessitates a thorough examination of its control mechanism, particularly in light of the rapid load transient response requirements. To address this, an adaptive voltage positioning (AVP) design for the Sigma converter is introduced, employing enhanced V2 control. Guidelines and limitations are provided to stabilize the converter and enhance its overall performance. Ultimately, the AVP function and load transient performance are substantiated through simulation and experimental results. / Doctor of Philosophy / Data center is the hardware foundation of artificial intelligence (AI) and cloud computing. The global data center market has exceeded $200 billion and is fast growing. It is estimated that data center accounts for 1.7~2.2% of the world's electricity generation. On the other hand, up to 80% of the long-term operation expenditure of data centers is electricity. Thus, improving the efficiency of electric energy conversion in data centers is economically beneficial and critical to reaching the carbon neutral goal. The bottleneck for further improvements in system efficiency lies in the voltage regulator modules (VRMs), which grapple with challenges such as high conversion ratios, elevated output currents, and substantial load transients. These challenges are particularly pronounced for AI processors and graphics processing units (GPUs). In response to these challenges, a novel proposition introduces a single-stage 48V coupled-transformer voltage regulator (CTVR) tailored for high-performance microprocessors. This innovative design aims to deliver ultra-high power density and superior efficiency. The converter employs a unique magnetic structure that integrates transformers and coupled inductors from multiple current-doubler rectifiers. Significantly, by utilizing the magnetizing inductors of transformers as output inductors, there is a substantial reduction in the size of magnetic components. Various implementations are explored, each addressing specific design objectives. When prioritizing efficiency in the design, the quasi-parallel Sigma converter emerges as another optimal choices for a 48V solution. However, the intricate and distinctive quasi-parallel structure of the Sigma converter necessitates a thorough examination of its control mechanism, particularly in light of the rapid load transient response requirements. To address this, an adaptive voltage positioning (AVP) design for the Sigma converter is introduced, employing enhanced V2 control. Guidelines and limitations are provided to stabilize the converter and enhance its overall performance. Ultimately, the AVP function and load transient performance are substantiated through simulation and experimental results.

The increased power consumption and power density demands of modern technologies combined with the focus on global energy savings have increased the demands on DC/DC power supplies. DC/DC converters are ubiquitous in everyday life, found in products ranging from small handheld electronics requiring a few watts to warehouse sized server farms demanding over 50 megawatts. To improve efficiency and power density while reducing complexity and cost the modular building block approach is gaining popularity. These modular building blocks replace individually designed specialty power supplies, providing instead an optimized complete solution. To meet the demands for lower loss and higher power density, higher efficiency and higher frequency must be targeted in future designs. The objective of this dissertation is to explore and propose methods to improve the power density and performance of point of load modules ranging from 10 to 600W. For non-isolated, low current point of load applications targeting outputs ranging from one to ten ampere, the use of a three level converter is proposed to improve efficiency and power density. The three level converter can reduce the voltage stress across the devices by a factor of two compared to the traditional buck; reducing switching losses, and allowing for the use of improved low voltage lateral and lateral trench devices. The three level can also significantly reduce the size of the inductor, facilitating 3D converter integration with a low profile magnetic by doubling the effective switching frequency and reducing the volt-second across the inductor. This work also proposes solutions for the drive circuit, startup, and flying capacitor balancing issues introduced by moving to the three level topology. The emerging technology of gallium nitride can offer the ability to push the frequency of traditional buck converters to new levels. Silicon based semiconductors are a mature technology and the potential to further push frequency for improved power density is limited. GaN transistors are high electron mobility transistors offering a higher band gap, electron mobility, and electron velocity than Si devices. These material characteristics make the GaN device more suitable for higher frequency and voltage operation. This work will discuss the fundamentals of utilizing the GaN transistor in high frequency buck converter design; addressing the packaging of the GaN transistor, fundamental operating differences between GaN and Si devices, driving of GaN devices, and the impact of dead time on loss in the GaN buck converter. An analytical loss model for the GaN buck converter is also introduced. With significant improvements in device technology and packaging, the circuit layout parasitics begins to limit the switching frequency and performance. This work will explore the design of a high frequency, high density 12V integrated buck converter, identifying the impact of parasitics on converter performance, propose design improvements to reduce critical parasitics, and assess the impact of frequency on passive integration. The final part of this research considers the thermal design of a high density 3D integrated module; this addresses the thermal limitations of standard PCB substrates for high power density designs and proposes the use of a direct bond copper (DBC) substrate to improve thermal performance in the module. For 48V isolated applications, the current solutions are limited in frequency by high loss generated from the use of traditional topologies, devices, packaging, and transformer design. This dissertation considers the high frequency design of a highly efficient unregulated bus converter targeting intermediate bus architectures for use in telecom, networking, and high end computing applications. This work will explore the impact of switching frequency on transformer core volume, leakage inductance, and winding resistance. The use of distributed matrix transformers to reduce leakage inductance and winding resistance, improving high frequency transformer performance will be considered. A novel integrated matrix transformer structure is proposed to reduce core loss and core volume while maintaining low leakage inductance and winding resistance. Lastly, this work will push for higher frequency, higher efficiency, and higher power density with the use of low loss GaN devices. / Ph. D.

With the rapid increase of cloud computing and the high demand for digital content, it is estimated that the power consumption of the IT industry will reach 10 % of the total electric power in the USA by 2020. Multi-core processors (CPUs) and graphics processing units (GPUs) are the key elements in fulfilling all of the digital content requirements, but come with a price of more power-hungry processors, driving the power per server rack to 20 KW levels. The need for more efficient power management solutions on the architecture level, down to the converter level, is inevitable. Recently, data centers have replaced the 12V DC server rack distribution with a 48V DC distribution, producing a significant overall system efficiency improvement. However, 48V rack architecture raises significant challenges for the voltage regulator modules (VRMs) required for powering the processor. The 48V VRM in the vicinity of the CPU needs to be designed with very high efficiency, high power density, high light-load efficiency, as well as meet all transient requirements by the CPU and GPU. Transferring the well-developed multi-phase buck converter used in the 12V VRM to the 48V distribution platform is not that simple. The buck converter operating with 48V, stepping down to sub 2V, will be subjected to significant switching related loss, resulting in lower overall system efficiency. These challenges drive the need to look for more efficient architectures for 48V VRM solutions. Two-stage conversions can help solve the design challenges for 48V VRMs. A first-stage unregulated converter is used to step-down the 48V to a specific intermediate bus voltage. This voltage will feed a multi-phase buck converter that powers the CPU. An unregulated LLC converter is used for the first-stage converter, with zero voltage switching (ZVS) operation for the primary side switches, and zero current switching (ZCS) along with ZVS operation, for the secondary side synchronous rectifiers (SRs). The LLC converter can operate at high frequency, in order to reduce the magnetic components size, while achieving high-efficiency. The high-efficiency first-stage, along with the scalability and high bandwidth control of the second-stage, allows this architecture to achieve high-efficiency and power density. This architecture is simpler to adopt by industry, by plugging the unregulated converter before the existing multi-phase buck converters on today's platforms. The first challenge for this architecture is the transformer design of the first-stage LLC converter. It must avoid all of the loss associated with high frequency operations, and still achieve high power density without scarifying efficiency. In this thesis, the integrated matrix transformer structure is optimized by SR integration with windings, interleaved primary side termination, and a better PCB winding arrangement to achieve high-efficiency and power density, and minimize the losses associated with high-frequency operations. The second challenge is the light load efficiency improvement. In this thesis a light load efficiency improvement is proposed by a dynamic change of the intermediate bus voltage, resulting in more than 8 % light load efficiency improvements. The third challenge is the selection of the optimal bus voltage for the two-stage architecture. The impact of different bus voltages was analyzed in order to maximize the overall conversion efficiency. Multiple 48V unregulated converters were designed with maximum efficiency >98 %, and power densities >1000 W/in3, with different output voltages, to select the optimal bus voltage for the two-stage VRM. Although the two-stage VRM is more scalable and simpler to design and adopt by current industry, the efficiency will reduce as full power flows in two cascaded DC/DC converters. Single-stage conversion can achieve higher-efficiency and power-density. In this thesis, a quasi-parallel Sigma converter is proposed for the 48V VRM application. In this structure, the power is shared between two converters, resulting in higher conversion efficiency. With the aid of an optimized integrated magnetic design, a Sigma converter suitable for narrow voltage range applications was designed with 420 W/in3 and a maximum efficiency of 94 %. Later, another Sigma converter suitable for wide voltage range applications was designed with 700W/in3 and a maximum efficiency of 95 %. Both designs can achieve higher efficiency than the two-stage VRM and all other state-of-art solutions. The challenges associated with the Sigma converter, such as startup and closed loop control were addressed, in order to make it a viable solution for the VRM application. The 48V rack architecture requires regulated 12V output converters for various loads. In this thesis, a regulated LLC is used to design a high-efficiency and power-density 48V bus converter. A novel integration method of the inductor and transformer helps the LLC achieve the required regulation capability with minimum losses, resulting in a converter that can provide 1KW of continuous power with efficiency of 97.8 % and 700 W/in3 power density. This dissertation discusses new power architectures with an optimized design for the 48V rack architectures. With the academic contributions in this dissertation, different conversion architectures can be utilized for 48V VRM solutions that solve all of the challenges associated with it, such as scalability, high-efficiency, high density, and high BW control. / Doctor of Philosophy / With the rapid increase of cloud computing and the high demand for digital content, it is estimated that the power consumption of the IT industry will reach 10 % of the total electric power in the USA by 2020. Multi-core processors (CPUs) and graphics processing units (GPUs) are the key elements in fulfilling all of the digital content requirements but come with a price of more power-hungry processors, driving the power per server rack to 20 KW levels. The need for more efficient power management solutions on the architecture level, down to the converter level, is inevitable. The data center manufacturers have recently adopted a more efficient architecture that supplies a 48V DC server rack distribution instead of a 12V DC distribution to the server motherboard. This helped reduce costs and losses, but as a consequence, raised a challenge in the design of the DC/DC voltage regulator modules (VRM) supplied by the 48V, in order to power the CPU and GPU. In this work, different architectures will be explored for the 48V VRM, and the trade-off between them will be evaluated. The main target is to design the VRM with very high-efficiency and high-power density to reduce the cost and size of the CPU/GPU motherboards. First, a two-stage power conversion structure will be used. The benefit of this structure is that it relies on existing technology using the 12V VRM for powering the CPU. The only modification required is the addition of another converter to step the 48V to the 12V level. This architecture can be easily adopted by industry, with only small modifications required on the system design level. Secondly, a single-stage power conversion structure is proposed that achieves higher efficiency and power density compared to the two-stage approach; however, the structure is very challenging to design and to meet all requirements by the CPU/GPU applications. All of these challenges will be addressed and solved in this work. The proposed architectures will be designed using an optimized magnetic structure. These structures achieve very high efficiency and power density in their designed architectures, compared to state-of-art solutions. In addition, they can be easily manufactured using automated manufacturing processes.

Due to the concerns regarding increasing fuel cost and air pollution, plug-in electric vehicles (PEVs) are drawing more and more attention. PEVs have a rechargeable battery that can be restored to full charge by plugging to an external electrical source. However, the commercialization of the PEV is impeded by the demands of a lightweight, compact, yet efficient on-board charger system. Since the state-of-the-art Level 2 on-board charger products are largely silicon (Si)-based, they operate at less than 100 kHz switching frequency, resulting in a low power density at 3-12 W/in3, as well as an efficiency no more than 92 - 94% Advanced power semiconductor devices have consistently proven to be a major force in pushing the progressive development of power conversion technology. The emerging wide bandgap (WBG) material based power semiconductor devices are considered as game changing devices which can exceed the limit of Si and be used to pursue groundbreaking high frequency, high efficiency, and high power density power conversion. Using wide bandgap devices, a novel two-stage on-board charger system architecture is proposed at first. The first stage, employing an interleaved bridgeless totem-pole AC/DC in critical conduction mode (CRM) to realize zero voltage switching (ZVS), is operated at over 300 kHz. A bi-directional CLLC resonant converter operating at 500 kHz is chosen for the second stage. Instead of using the conventional fixed 400 V DC-link voltage, a variable DC-link voltage concept is proposed to improve the efficiency within the entire battery voltage range. 1.2 kV SiC devices are adopted for the AC/DC stage and the primary side of DC/DC stage while 650 V GaN devices are used for the secondary side of the DC/DC stage. In addition, a two-stage combined control strategy is adopted to eliminate the double line frequency ripple generated by the AC/DC stage. The much higher operating frequency of wide bandgap devices also provides us the opportunity to use PCB winding based magnetics due to the reduced voltage-second. Compared with conventional litz-wire based transformer. The manufacture process is greatly simplified and the parasitic is much easier to control. In addition, the resonant inductors are integrated into the PCB transformer so that the total number of magnetic components is reduced. A transformer loss model based on finite element analysis is built and used to optimize the transformer loss and volume to get the best performance under high frequency operation. Due to the larger inter-winding capacitor of PCB winding transformer, common mode noise becomes a severe issue. A symmetrical resonant converter structure as well as a symmetrical transformer structure is proposed. By utilizing the two transformer cells, the common mode current is cancelled within the transformers and the total system common mode noise can be suppressed. In order to charge the battery faster, the single-phase on-board charger concept is extended to a higher power level. By using the three-phase interleaved CLLC resonant converter, the charging power is pushed to 12.5 kW. In addition, the integrated PCB winding transformer in single phase is also extended to the three phase. Due to the interleaving between each phase, further integration is achieved and the transformer size is further reduced. / PHD / Plug-in electric vehicles (PEVs) are drawing more and more attention due to the advantages of energy saving, low CO₂ emission and cost effective in the long run. The power source of PEVs is a high voltage DC rechargeable battery that can be restored to full charge by plugging to an external electrical source, during which the battery charger plays an essential role by converting the grid AC voltage to the required battery DC voltage. Silicon based power semiconductor devices have been dominating the market over the past several decades and achieved numerous outstanding performances. As they almost reach their theatrical limit, the progress to purse the high-efficiency, high-density and high-reliability power conversion also slows down. On this avenue, the emerging wide bandgap (WBG) material based power semiconductor devices are envisioned as the game changer: they can help increase the switching frequency by a factor of ten compared with their silicon counterparts while keeping the same efficiency, resulting in a small size, lightweight yet high efficiency power converter. With WBG devices, magnetics benefit the most from the high switching frequency. Higher switching speed means less energy to store during one switching cycle. Consequently, the size of the magnetic component can be greatly reduced. In addition, the reduced number of turns provides the opportunity to adopt print circuit board as windings. Compared with the conventional litz-wire based magnetics, planar magnetics not only can effectively reduce the converter size, but also offer improved reliability through automated manufacturing process with repeatable parasitics. This dissertation is dedicated to address the key high-frequency oriented challenges of adopting WBG devices (including both SiC and GaN) and integrated PCB winding magnetics in the battery charger applications. First, a novel two-stage on-board charger system architecture is proposed. The first stage employs an interleaved bridgeless totem-pole AC/DC with zero voltage switching, and a bi-directional CLLC resonant converter is chosen for the second stage. Second, a PCB winding based transformer with integrated resonant inductors is designed, so that the total number of magnetic components is reduced and the manufacturability is greatly improved. A transformer loss model based on finite element analysis is built and employed to optimize the transformer loss and volume to get the best performance under high frequency operations. In addition, a symmetrical resonant converter structure as well as a symmetrical transformer structure is proposed to solve the common noise issue brought by the large parasitic capacitance in PCB winding magnetics. By utilizing the two transformer cells, the common mode current is cancelled within the transformers, and the total system common mode noise can be suppressed. Finally, the single-phase on-board charger concept is extended to a higher power level to charge the battery faster. By utilizing the three-phase interleaved CLLC resonant converter as DC/DC stage, the charging power is pushed to 12.5 kW. In addition, the integrated PCB winding magnetic in single phase is also extended to the three phase. Due to the interleaving between the three phase, further integration is achieved and the transformer size is further reduced.

Silicon carbide (SiC) outperform Si chips in terms of high blocking voltage capability, low on-resistance, high-temperature operation, and high switching frequency. Several SiC MOSFETs are usually paralleled to increase current capability, considering cost effectiveness and manufacturability. For a SiC power module with current rating higher than 100 A, high did/dt and dvds/dt could possibly cause cross-turn-on (crosstalk-induced turn-on) through the gate-to-drain capacitance Cgd of the MOSFET dies and the package inductances. Mismatches in threshold voltage (Vth) up to 33% have been observed among paralleled SiC MOSFETs. This leads to unbalanced transient peak currents and switching energies. Both cross-turn-on and current unbalance degrade the reliability of a power module. Increasing the immunity to cross-turn-on while maintaining the similar switching energies and balancing the transient peak currents below 10% without sacrificing the voltage stress are the goals of this work. Development of a SPICE model free of non-convergence – A simulation model for a SiC power module is necessary for evaluations of cross-turn-on and current unbalance; however, most SiC power modules do not have models. No existing modeling methods discuss how to build an accurate SPICE model that is free of non-convergence when hundreds of parasitic inductances are present. A modeling process is introduced for paralleled MOSFETs encapsulated in a power module that gives access to both the internal channel current and voltage of each bare die inside the package. This model is free of non-convergence and accurate. Parasitic ac resistances, dc resistances, and ac inductances are extracted by Q3D Extractor. Non-convergence is avoided by including the ac resistance of the conduction trace in the model. Also, a series model which is set default in Q3D Extractor is converted to parallel model to accurately reflect how the current flows through the dc and ac resistances of the trace. A complete SPICE model of a commercial SiC power module was derived and validated by experiments. The error between predicted turn-on peak current of the developed model and that of the experimental data is 2%, significantly lower than the 28% difference between prediction result of commercial model and experimental data. Detection of internal cross-turn-on – Terminal current of a power module does not reflect the internal channel current due to the numerous parasitic inductances of the package. No existing method is able to detect the cross-turn-on in a power module since dies are usually encapsulated and the channel currents are hard to measure. A nonintrusive method to identify cross-turn-on based on the changing ringing current is developed. The detection method was analyzed theoretically and validated by experiments using a 1.2-kV SiC module. The negative drive voltage and gate resistance for safe operation can be determined by the detection method. Influence of layout symmetry on immunity to cross-turn-on – Gate resistance, gate-to-drain capacitance of the MOSFET, slew rate of drain-to-source voltage, and temperature have been recognized as the only elements impacting the immunity to cross-turn-on for a single chip and module. Layout symmetry is newly discovered to be another factor that contributes to the immunity. Asymmetrical and symmetrical modules following commercial layouts were tested by a double pulse tester. The peak cross-turn-on currents, high-side switching energy, and total switching energy at various input voltages, low-side gate resistances, and load currents are normalized for comparison. The peak cross-turn-on current of the symmetrical module is 84% lower than that of the asymmetrical module at nominal condition. Longer power-loop and gate-drive loop are required to achieve symmetrical layout for more than two dies in parallel. This increases the low-side switching energy of the symmetrical module. The total switching energies of the two modules are similar. In this case, a symmetrical layout is still recommended since current stress caused by cross-turn-on is much smaller in symmetrical module than in the asymmetrical module and chances to have shoot-through between the high side and the low side are reduced. Magnetic integration into a power module for current balancing – Existing power modules do not have balanced transient currents when threshold voltage mismatch exists. A module with integrated coupled inductors was designed, fabricated, and validated to be effective to balance the currents without sacrificing voltage stress and switching energy. The designed integrated coupled inductors achieve inverse coupling by utilizing the copper trace of the substrate and bond wires and have the following features: size comparable to the silicon carbide (SiC) die, coupling coefficient higher than 0.98, tens of nH operating at tens of MHz, and current rating of tens of Amperes. The coupled inductors with the magnetic material of low-temperature co-fired ceramics (LTCC) are compatible with existing packaging technology for module fabrication. The effectiveness of reducing transient-current mismatch at various input voltages, load currents, and gate resistances was verified by experiments. Compared with the baseline module following commercial practice, the module with integrated coupled inductors reduces current unbalance from 36% to 6.4% and turn-on-energy difference from 28% to 2.6% while maintaining the same total switching energy and a negligible change of voltage stress. / Ph. D. / A silicon carbide (SiC) power module with high di_d/dt and dv_ds/dt could possibly cause crossturn-on (crosstalk-induced turn-on) through the gate-to-drain capacitance C_gd of the MOSFET dies and package inductances. Mismatches in threshold voltage (V_th) up to 33% have been observed among paralleled SiC MOSFETs. This leads to unbalanced transient peak currents. Both crossturn-on and current unbalance degrade the reliability. Increasing the immunity to cross-turn-on while maintaining the similar switching energies and balancing the transient peak currents below 10% without sacrificing the voltage stress are the goals of this work. The development of a SPICE model for a SiC power module is necessary for evaluations of cross-turn-on and current unbalance; however, no existing modeling methods discuss how to build an accurate SPICE model of a power module free of non-convergence when hundreds of parasitic inductances are present. The modeling method to overcome these challenges is introduced. The error between predicted turn-on peak current of the developed model and that of the experimental data is 2%, significantly lower than the 28% difference between prediction result of commercial model and experimental data. No existing method is able to detect the cross-turn-on in a power module since the dies are usually vi encapsulated and the channel currents are hard to measure. A nonintrusive method to identify the cross-turn-on based on the changing ringing current is developed. The detection method was analyzed theoretically and validated by experiments using a 1.2-kV SiC module. Layout symmetry is newly discovered to be another factor that contributes to the immunity. The peak cross-turn-on current of the symmetrical module is 84% lower than that of the asymmetrical module at nominal condition. The symmetrical layout greatly decreases cross-turn-on currents without increasing total switching energy. Power modules in the market cannot have balanced transient currents when mismatches in threshold voltage V_th exist. A module with integrated coupled inductors was designed, fabricated, and validated to be effective to balance the currents with the presence of V_th mismatch. Compared with the baseline module following commercial practice, the module with integrated coupled inductors reduces current unbalance from 36% to 6.4% and turn-on-energy difference from 28% to 2.6% while maintaining the same total switching energy and negligible change of voltage stress.

The wide-bandgap (WBG) devices, like gallium nitride (GaN) and silicon carbide (SiC) devices have proven to be a driving force of the development of the power conversion technology. Thanks to their distinct advantages over silicon (Si) devices including the faster switching speed and lower switching losses, WBG-based power converter can adopt a higher switching frequency and pursue higher power density and higher efficiency. As a trade-off of the advantages, there also exist the high-frequency-oriented challenges in the adoption of the GaN HEMT under research, including narrow safe gate operating area, increased switching overshoot, increased electromagnetic interference (EMI) in the gate loop and the power stages, the lack of the modules of packages for high current application, high gate oscillation under parallel operation. The dissertation is developed to addressed the all the challenges above to fully explore the potential of the GaN HEMTs. Due to the increased EMI emission in the gate loop, a small isolated capacitor in the gate driver power supply is needed to build a high-impedance barrier in the loop to protect the gate driver from interference. A 2 W dual-output gate driver power supply with ultra-low isolation capacitor for 650 V GaN-based half bridge is presented, featuring a PCB-embedded transformer substrate, achieving 85% efficiency, 1.6 pF isolation capacitor with 72 W/in3 power density. The effectiveness of the EMI reduction using the proposed power supply is demonstrated. The design consideration to build a compact 650 V GaN switching cell is presented then to address the challenges in the PCB layout and the thermal management. With the switching cell, a compact 1 kW 400 Vdc three-phase inverter is built and can operate with 500 kHz switching frequency. With the inverter, the high switching frequency effects on the inverter efficiency, volume, EMI emission and filter design are assessed to demonstrate the tradeoff of the adoption of high switching frequency in the motor drive application. In order to reduce the inverter CM EMI emission above 10 MHz, an active gate driver for 650 V GaN HEMT is proposed to control the dv/dt during turn-on and turn-off independently. With the control strategy, the penalty from the switching loss can be reduced. To build a high current power converter, paralleling devices is a normal approach. The dissertation comes up with the switching cell design using paralleled two and four 650 V GaN HEMTs with minimized and symmetric gate and power loop. The commutation between the paralleled HEMTs is analyzed, based on which the effects from the passive components on the gate oscillation are quantified. With the switching cell using paralleled GaN HEMTs, a 10 kW LLC resonant converter with the integrated litz-wire transformer is designed, achieving 97.9 % efficiency and 131 W/in3 power density. The design consideration to build the novel litz-wire transformer operated at 400 kHz switching frequency is also presented. In all, this work focuses on providing effective solutions or guidelines to adopt the 650 V GaN HEMT in the high frequency, high power density, high efficiency power conversion and demonstrates the advance of the GaN HEMTs in the hard-switched and soft-switched power converters. / Ph. D. / Silicon (Si) -based power semiconductor has developed several decades and achieved numerous outstanding performances, contributing a fast development of the power electronics. While the theatrical limit of the silicon semiconductor is almost reached limiting the progress speed to purse the high-efficiency, high-density high-reliability power conversion, the new material, including gallium-nitride (GaN) and silicon-carbide (SiC), based semiconductor, becomes the driven force to retain the development. Compared with Si-based device, GaN and SiC device own a faster switching speed and a lower on-resistance, enabling the adoption of high switching frequency and the possibility to increase the efficiency, power density and dynamic response. The GaN-based semiconductor is explored to be an even promising game changer than SiC device thanks to a higher theoretical ceiling. However, to adopt GaN-based semiconductors and fully utilize its benefits with high switching frequency, there are numerous high-frequency-oriented challenges, including high frequency oscillation at device termination, increased electromagnetic interference (EMI), the lack of the modules of packages for high current application, high frequency oscillation under parallel operation. The dissertation is developed to address the key high-frequency-oriented challenges to adopt GaN-based semiconductors in the power conversion and come up with the novel design strategy and analysis for high-switching-frequency power conversion using GaN devices. To the reduce the increased EMI emission in the gate loop, a novel PCB-embedded transformer structure is proposed to maintain a low isolation capacitor in the gate driver power supply for the GaN phase leg. With the proposed technique, the dual-output gate driver power supply can achieve high efficiency (85%), ultra-low isolation capacitor (1.6 pF) with high power density (72 W/in³ ). To reduce the high frequency oscillation at the GaN device termination, the strategy to layout GaN devices and its gate driver is proposed with corresponding thermal management. A compact structure for three-phase inverter is then presented, operating with a very high switching frequency (500 kHz). Within the inverter, the high switching frequency effects on the inverter performances are assessed to demonstrate the tradeoff and bottle neck to adopt high switching frequency in the motor drive application. In order to reduce the inverter EMI emission at high frequency ( >10 MHz), an active gate driver for GaN device is proposed for the active dv/dt control strategy. To build a high current power converter, the strategy to parallel GaN devices is proposed in the dissertation with the analysis on the commutation between the paralleled GaN devices. A high-frequency high-current litz-wire transformer structure for LLC resonant converter is presented with modeling and optimization. With the technique, a 10 kW LLC resonant converter achieves high efficiency (97.9 %) and high power density (131 W/in³).

With the fast development of information technology (IT) industry, the demand and market volume for off-line power supplies keeps increasing, especially those for desktop, flat-panel TV, telecommunication, computer server and datacenter. An off-line power supply normally consists of electromagnetic interference (EMI) filter, power factor correction (PFC) circuit and isolated DC/DC converter. Isolated DC/DC converter occupies more than half of the volume in an off-line power supply and takes the most control responsibilities, so isolated DC/DC converter is the key aspect to improve the overall performance and reduce the total cost for off-line power supply. On the other hand, of all the power supplies for industrial applications, those for the data center servers are the most performance driven, energy and cost conscious due to the large electricity consumption. The total power consumption of today's data centers is becoming noticeable. Moreover, with the increase in cloud computing and big data, energy use of data centers is expected to continue rapidly increasing in the near future. It is very challenging to design isolated DC/DC converters for datacenters since they are required to provide low-voltage high-current output and fast transient response. The LLC resonant converters have been widely used as the DC-DC converter in off-line power supplies and datacenters due to its high efficiency and hold-up capability. Using LLC converters can minimize switching losses and reduce electromagnetic interference. Almost all the high-end offline power supplies employs LLC converters as the DC/DC converter. But there are three major challenges in LLC converters. Firstly, the control characteristics of the LLC resonant converters are very complex due to the dynamics of the resonant tank. This dissertation proposes to implement a special LLC control method, state-trajectory control, with a low-cost microcontroller (MCU). And further efforts have been made to integrate all the state-trajectory control function into one MCU for high-frequency LLC converters, including start-up and short-circuit protection, fast transient response, light load efficiency improvement and SR driving. Secondly, the transformer in power supplies for IT industry is very bulky and it is very challenging to design. By pushing switching frequency up to MHz with gallium nitride (GaN) devices, the magnetics can be integrated into printed circuit board (PCB) windings. This dissertation proposes a novel matrix transformer structure and its design methodology. On the other hand, shielding technique can be employed to suppress the CM noise for PCB winding transformer. This dissertation proposes a novel shielding technique, which not only suppresses CM noise, but also improves the efficiency. The proposed transformer design and shielding technique is applied to an 800W 400V/12V LLC converter design. Thirdly, the LLC converters have sinusoidal current shape due to the nature of resonance, which has larger root mean square (RMS) of current, as well as larger conduction loss, compared to pulse width modulation (PWM) converter. This dissertation employs three-phase interleaved LLC converters to reduce the circulating energy by inter-connecting the three phases in certain way, and proposed a novel magnetic structure to integrated three inductors and three transformers into one magnetic core. By pushing switching frequency up to 1MHz, all the magnetics can be implemented with 4-layer PCB winding. Additional 2-layer shielding can be integrated to reduce CM noise. The proposed magnetic structure is applied to a 3kW 400V/12V LLC converter. This dissertation solves the challenges in analysis, digital control, magnetic design and EMI in high-frequency DC/DC converters in off-line power supplies. With the academic contribution in this dissertation, GaN devices can be successfully applied to high-frequency DC/DC converters with MHz switching frequency to achieve high efficiency, high power density, simplified but high-performance digital control and automatic manufacturing. The cost will be reduced and the performance will be improved significantly. / Ph. D. / With the fast development of information technology (IT) industry, the demand and market volume for off-line power supplies keeps increasing, especially those for desktop, flat-panel TV, telecommunication, computer server and datacenter. The total power consumption of today’s data centers is becoming noticeable. Moreover, with the increase in cloud computing and big data, energy use of data centers is expected to continue rapidly increasing in the near future. The efficiency of off-line power supplies is very critical for the whole human society in order to reduce the total electricity consumption. And the cost is also a key driving force for the development of novel technology in off-line power supplies due to the large market volume. An off-line power supply normally consists of electromagnetic interference (EMI) filter, power factor correction (PFC) circuit and isolated DC/DC converter. Isolated DC/DC converter occupies more than half of the volume in an off-line power supply and takes the most control responsibilities, so isolated DC/DC converter is the key aspect to improve the overall performance and reduce the total cost for off-line power supply. Among all the DC/DC converter topologies, the LLC resonant converters have been most widely used as the DC/DC converter due to its high efficiency and hold-up capability. But there are three major challenges in LLC converters. Firstly, the control characteristics are very complex due to the dynamics of the resonant tank. To achieve good control performance, very complex and expensive digital controller has to be employed. Secondly, the magnetic components are very bulky, and it is expensive to manufacture them. Thirdly, there is circulating energy in LLC converters due to the nature of resonance, which increases the total loss. To solve these challenges, this dissertation proposes to implement a special control method, state-trajectory control, with a low-cost microcontroller (MCU). All the control functions can be integrated into one simple, low-cost MCU to replace the previous complex and expensive controller. By pushing switching frequency up to MHz with next generation power devices, this dissertation proposes a novel magnetics structure that can be integrated into printed circuit board (PCB) windings to achieve low-cost and automatic manufacturing. Furthermore, this dissertation employs three-phase interleaved LLC converters topology to reduce the circulating energy, and proposed a novel magnetic structure to integrated three inductors and three transformers into one magnetic core with simple 4-layer PCB winding. All the proposed technologies have been verified on hardware prototypes, and significant improvements over industrial state-of-art designs have been demonstrated. To sum up, this dissertation solves the challenges in analysis, digital control, magnetic design and EMI in DC/DC converters for off-line power supplies. With the academic contribution in this dissertation, the cost can be reduced due to the simplified control and automatic manufactured magnetics, and the efficiency can be improved with proper utilization of next generation power devices. This dissertation will improve future DC/DC converter for IT industrial in the three most important aspects of efficiency, power density and cost.