<p> Grid synchronization is a critical concern for proper control of energy transfer between the Distributed Power Generation Systems (DPGS) and the utility power grid. Nonlinear estimation techniques are proposed to track the voltage magnitude, phase angle, and frequency of the utility grid. Instead of directly analyzing in abc coordinate frame, the symmetrical component is employed to separate the positive, negative, and zero sequences in the transformed AlphaBeta stationary coordinate frame. By using the Fortescue's Transformations and Clarke's Transformation, the number of system state variables is reduced to five. The results show that our proposed nonlinear estimation technique is efficient in smart power system synchronization. The MATLAB simulation studies have been conducted to compare the performance of the Extended Kalman Filter (EKF), the Particle Filter (PF), and the Unscented Kalman Filter (UKF). Computer simulations have shown that the efficacy of our proposed nonlinear estimation methods. It also shows that the Unscented Kalman Filter, and the Particle Filter are better estimators, because voltage synchronization problem is nonlinear, and linearization process which the Extended Kalman Filter is based on is not very accurate. The number of particles in Particle Filter can be increased to improve the accuracy, but there exists a trade off between computational effort and estimation accuracy. In our research, considering the same amount of computational complexity, we calculate the Mean Square Error (MSE) to examine the performances of different nonlinear estimation approaches. By comparing the MSE of different estimators, we prove that the Unscented Kalman Filter shows the most accurate performance in voltage synchronization for three phase unbalanced voltage. Our results have shown the potential applications of the nonlinear estimation techniques in the future smart power grid synchronization. </p>

The two-stage AC to AC direct power converter is an alternative matrix converter topology, which offers the benefits of sinusoidal input currents and output voltages, bidirectional power flow and controllable input power factor. The absence of any energy storage devices, such as electrolytic capacitors, has increased the potential lifetime of the converter. In this research work, a new multi-motor drive system based on a two-stage direct power converter has been proposed, with two motors connected on the same shaft. A vector control scheme is proposed where each motor has an independent current control loop, but shares a single speed control loop. The two-motor on the same shaft solution has applications in aerospace to increase the availability of the system. The two-stage direct power converter therefore offers the possibility of a cost effective multi-motor drive system. The feasibility and performance of the proposed multi-motor drive system is demonstrated through simulation results and validated with experimental results from a laboratory prototype.

The basic requirements for insulation for overhead transmission lines also the problems of 'ageing' by 'weathering' and the effects of surface contamination are briefly surveyed. Correlation between the basic properties of polymeric insulating materials and their structure is considered. The causes of progressive degradation are discussed in some detail, with particular consideration of degradation by 'tracking' and 'erosion' and failure by flashover, in the presence of surface contamination. Test procedures which are used to assess the relative tracking resistance of insulating materials are C:escribed, with particular emphasis on the tests recommended by the International electrotechnical commission, which have been used by the candidate to assess a variety of resin bonded and elastomeric materials. The equipment used for these tests is described and the results of investigations to determine factors which affect the reproducibility of results are presented. Factors which should be specified in the test recommendations are summarized in Section 9.1. The current v voltage characteristics of short, current limited discharges in air have been investigated and used to estimate the rete of power dissipation by single discharge across dry bands. If the rate of heat dissipation were uniform along the length of the discharges, the temperature rise at the surface of the insulation would be insufficient to cause thermal degradation, unless discharges recur at the sane site for several seconds. However, the temperature rise would beg greater, if heating were concentrated at the 'roots of the discharge. This is indicated by a marked polarity effect found when inclined plane tests were made with half wave rectified voltage. A limited number of tests on polyester matt glass mouldings showed that doubling the electrode spacing increased the voltage to cause track initiation and failure by 1.55 times. This is consistent with failure by thermal degradation when account is taken of the greater flow of contaminant at the higher test voltage.

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This dissertation examines single-phase nonlinear power electronic loads. The transient response of power electronic loads is unlike traditional linear loads. Therefore, a composite power electronic transient load model is developed. The load model dynamics are validated with actual utility voltage sag response data, laboratory controlled load response testing, and power electronic load dynamic simulations. The power electronic load model is applied in the University of Texas at Austin power system. The system transient response is unique and considerably different from what it would be with traditional linear loads. The power electronic load can be friendly or unfriendly to the system depending on the fault and system configuration. / text

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A compatibility graph-based, general area router for integrated circuit (IC) designs is presented. The highly flexible constraint system allows a number of modern and mixed-signal routing requirements to be handled, even for a large number of nets. The IC router can efficiently construct near-minimal Steiner trees for multi-terminal nets in both classical rectilinear, or Manhattan, geometry as well as octilinear geometries. These Steiner trees can be constructed around blockages, and in the presence of obstacles such as other nets. A method for routing trees through weighted areas is also introduced. The routing system can predict congested routing areas before routing is performed, and appropriately weight congested areas in order to reduce net congestion. Finally, a fast crosstalk violation checker can run alongside the routing engine. Each portion of the router is bounded by O(n log(n)) runtime, or less, making the entire routing process bounded by the same runtime. The system thus scales well to handle a very large number of exact routes in a fully mixed-signal aware engine, in either rectilinear or newly-introduced octilinear geometries.

Recent expansion of the wireless infrastructure has led to a dramatic increase in the use of consumer wireless devices. This trend is driving the development of reconfigurable, high performance and inexpensive microwave components. One technology that promises to help meet some of these demands involves the use of periodic structures, also known as electromagnetic band gap (EBG) structures. The use of these EBG structures coupled with micromachining fabrication techniques provides the possibility of producing inexpensive, small and reconfigurable filters that can be used for many microwave applications. With this technology, an electronically reconfigurable EBG crystal has been developed that demonstrates contrast ratios of more than 30 dB between configuration states. This device has led to the development of a microstrip coupled EBG resonator, and then a reconfigurable microstrip coupled EBG resonator. Quality factors on the order of 400 have been demonstrated for these inexpensive and easy to integrate high performance microwave resonators. The first step towards the use of these EBG resonators in a microwave diplexer has been completed. A high performance single pole microwave diplexer has been designed, fabricated and tested using DuroidRTM circuit board material from Rogers Corporation. This diplexer exhibits channel bandwidths of less than 3%, and was used as a test structure for subsequent construction on silicon. Using silicon micromachining techniques the diplexer has been fabricated using silicon wafers. This silicon diplexer has shown improved performance over the Duroid® device in channel bandwidth (<1.6%), insertion loss (<1.5 dB), and channel-to-channel isolation (>26 dB). The development of each of these devices, including the simulated and measured results are be presented along with a discussion of the development path towards a reconfigurable EBG diplexer on silicon.

The effect of homogeneous contamination on the oxide integrity is studied by electrical measurements. The contamination is introduced in the Buffered Oxide Etchant (BOE) used for the pre-oxidation clean. The DC parametric test of forcing 1 nA and measuring voltage across the oxide is used to relate contamination to the leakage current and also to the number of failures. The factors affecting the measured voltage such as temperature, light and noise are eliminated so that contamination dominates the change in the measured voltage. The current-transport mechanism through the oxide was found to obey the Fowler-Nordheim equation at high fields. The barrier height at both interfaces was lowered in some devices. A technique for measuring the low-field breakdown which is caused by defects in the oxide is developed.

Laterally non-uniformly doped 0.1-μm pocket n-MOSFETs satisfying specifications of off-state current, on-state current, sensitivity of off-state current to channel length and 1V power-supply voltage have been designed for low-voltage low-power applications. To determine a viable range of the deep-submicron pocket n-MOSFET structural parameters---the dopant concentration at the center region (Nc), the dopant concentration at the pocket region (Np) and the length of the pocket region (Lp), a unique viable design space locating the deep-submicron devices meeting all the device specifications have been constructed, using computer algorithms developed and implemented in the programming language of the two-dimensional device simulator, Medici. For known Nc, vs. Lp, the pocket n-MOSFETs for low-power applications are located in an upper area of higher Np vs. Lp of the viable design space while the devices for high-performance applications are located in a lower area of lower Np vs. Lp of the viable design space. Well-designed deep-submicron pocket n-MOSFETs prove to be promising candidates to improve short-channel effects as well as switching performance in comparing the 0.1-μm pocket n-MOSFETs located within the viable design space to 0.1-μm conventional bulk n-MOSFETs selected to meet the same specifications. The 0.1-μm pocket n-MOSFETs located within the viable design space can be partitioned into two types of pocket devices based on gate controllability of channel- and depletion-layer charges. Analytical models for subthreshold and above-threshold currents in the deep-submicron pocket n-MOSFETs have been developed for the first time to generate the off-state and the on-state currents, and the design-space boundaries for the on- and the off-state currents. The models are based on solutions of the drift-diffusion current transport and the 1-D Poisson's equations, the charge sheet approximation, subthreshold surface potential models based on solutions of the quasi-two-dimensional Poisson's equation, a quasi-two-dimensional velocity saturation model, realistic mobility models, and analytical formulas for model parameters. The analytical models provide explicit relations between process, device and model parameters of the deep-submicron pocket n-MOSFETs, and reduce time and cost of the two-dimensional device simulation. Some algorithms developed for generating ID - V DS characteristics and constructing the design-space boundaries are described.