Design of filters used in grid-connected inverter applications involves multiple constraints. The filter requirements are driven by tight filtering tolerances of standards such as IEEE 519-1992–IEEE Recommended Practices and Requirements for Harmonic Control in Electrical Power Systems and IEEE 1547.2-2008–IEEE Application Guide for IEEE Std 1547, IEEE Standard for Interconnecting Distributed Resources with Electric Power Systems. Higher order LCL filters are essential to achieve these regulatory standard requirements at compact size and weight. This objective of this thesis report is to evaluate design procedures for such higher order LCL filters. The initial configuration of the third order LCL filter is decided by the frequency response of the filter. The design equations are developed in per-unit basis so results can be generalized for different applications and power levels. The frequency response is decided by IEEE specifications for high frequency current ripple at the point of common coupling. The appropriate values of L and C are then designed and constructed. Power loss in individual filter components is modeled by analytical equations and an iterative process is used to arrive at the most efficient design. Different combinations of magnetic materials (ferrite, amorphous, powder) and winding types (round wire, foil) are designed and tested to determine the most efficient design. The harmonic spectrum, power loss and temperature rise in individual filter components is predicted analytically and verified by actual tests using a 3 phase 10 kW grid connected converter setup. Experimental results of filtering characteristics show a good match with analysis in the frequency range of interconnected inverter applications. The design process is stream-lined for the above specified core and winding types. The output harmonic current spectrum is sampled and it is established that the harmonics are within the IEEE recommended limits. The analytical equations predicting the power loss and temperature rise are verified by experimental results. Based on the findings, new LCL filter combinations are formulated by varying the net Lpu to achieve the highest efficiency while still meeting the recommended IEEE specifications. Thus a design procedure which can enable an engineer to design the most efficient and compact filter that can also meet the recommended guidelines of harmonic filtering for grid-connected converter applications is established.

Switched mode power supplies (SMPS) are being extensively used in most power conversion processes. The analysis, design and modeling processes of hard-switched converters are mature, where the switching frequency was limited to a few 10's of kHz. The present direction of evolution m SMPS is towards higher efficiency and higher power density. These twin objectives demand high switching frequency and low overall losses. Soft switching results in practically zero switching losses and extends the switching frequency to 100's of kHz and beyond. This thesis presents novel variants of push-pull and half-bridge DC-DC converters with soft switching properties. The proposed topology uses two additional switches and two diodes. The additional switches introduce freewheeling intervals m the circuit and enable loss-less switching. Switch stress, control and small signal model are similar to hard-switched PWM converter. Synchronous rectifiers are used in the ZVS push-pull converter to achieve high efficiency. It is interesting to see that the drives for the synchronous rectifier device are practically the same as the additional switches. The contributions made in this thesis are 1) Idealized analysis and design methodology for the proposed converters. 2) Validation of the design through circuit simulation as well as prototypes - a 300kHz, 200W push-pull converter and a 300kHz, 640W half-bridge converter. 3) Closed loop control design for desired bandwidth and accuracy Verification of loop gain through network analyzer instrumental for the same The loop gain bandwidth achieved is about 30kHz for the push-pull converter and 20kHz for half-bridge converter. An appendix has been devoted to explain the use of network analyzer. Characterization of coil, transformer and capacitor are explained in detail. Measurement techniques for measuring the small signal parameters of power supply are also explained in the appendix.

Orientador: José Antenor Pomilio / Tese (doutorado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de Computação / Made available in DSpace on 2018-08-23T00:46:30Z (GMT). No. of bitstreams: 1 Alvarenga_MarcosBalduinode_D.pdf: 18917931 bytes, checksum: a0630621c255135a8bf5fd49974daea6 (MD5) Previous issue date: 2013 / Resumo: Esta tese apresenta contribuições para o emprego de inversor multinível em cascata simétrica como filtro ativo de potência. O balanceamento das tensões nos barramentos CC é feito a partir de informação de um único bit obtido em cada módulo do conversor. O balanceamento é realizado através da postergação ou da supressão dos pulsos e, também, pela organização da ordem de acionamento das chaves semicondutoras de potência. A estratégia de modulação desenvolvida permite também a equalização dos pulsos de chaveamento entre os diversos módulos do inversor e suprime um porcentual de comutações redundantes ou irrelevantes, minimizando as perdas do conversor. Toma-se como parâmetro de qualidade a distorção harmônica decorrente de tais procedimentos. A técnica desenvolvida viabiliza a inserção de células em redundância, o que aumenta a confiabilidade da operação, favorecendo sua aplicação em filtros ativos de potência e dispositivos de condicionamento aplicados em redes de energia elétrica. O controle da corrente do filtro ativo e o controle das tensões nos barramentos CC são executados por dois controladores independentes, cujos projetos são detalhados e equacionados. A estratégia foi avaliada em um protótipo experimental de baixa tensão, constituído de um conversor multinível composto por quatro células simétricas, sendo uma em redundância, comandadas por um microcontrolador. Foram realizadas, também, simulações, considerando um alimentador de distribuição com 22,5 MVA e 13,8 kV. Nas análises dos resultados, são considerados os valores estabelecidos por normas relativas ao limite de harmônicas de corrente / Abstract: The present thesis shows contributions to the use of symmetrical cascaded multilevel inverter as active power filter. The balancing of the voltages on the DC bus is made from a single bit of information obtained in each converter module. Balancing is performed by postponement or suppression pulses and also for organizing the order of activation of the power semiconductor switches. The modulation strategy developed also allows the equalization of switching pulses between different inverter modules and removes a percentage of redundant or irrelevant switching, minimizing the losses of the converter. Taken as the quality parameter was the harmonic distortion resulting from such procedures. The technique developed enables the insertion of cells in redundancy, which increases reliability of the operation, in favor of their use in active power filters and conditioning devices used in power grids. The current control of active filter and control voltages in DC buses are performed by two independent controllers, whose projects are detailed and calculated. The strategy was evaluated in an experimental prototype low-voltage, consisting of a multilevel converter composed of four symmetrical cells, one redundancy, controlled by a microcontroller. It was also performed simulations considering a distribution feeder with 22.5 MVA and 13.8 kV. In the analysis of the results it was taken into account established values by standards for harmonic current limit / Doutorado / Energia Eletrica / Doutor em Engenharia Elétrica