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Resonant forward-biased guard rings for suppression of substrate noise in mixed-mode CMOS circuitsFicq, Bernard L. 02 June 1994 (has links)
Previous work at Stanford University has demonstrated that inductance in the
substrate connection is the principal problem underlying the coupling of digital
switching noise into analog circuits. The low impedance substrate can be treated
as a single node over a local area. Switching in the digital circuits produces
current transients in the substrate. These transients are subsequently amplified in
the analog portions of the overall mixed-mode circuit. Various guard rings and
other techniques, including the use of new logic circuit families, have been
proposed to suppress this noise. This work demonstrates that by using the
capacitance of a forward biased guard ring(s), the substrate noise at a specific
frequency(ies) can be reduced by resonating the guard ring capacitance with the
substrate lead inductance to provide a very low substrate-to-ground impedance.
In this manner, noise at particular frequencies, which are problematic to the
analog circuit, can be suppressed. Tuning can be accomplished by varying the
current in the forward-biased guard ring diodes. / Graduation date: 1995
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Speed enhancement techniques for comparator-based switched-capacitor circuitsWong, Kim Fai January 2010 (has links)
University of Macau / Faculty of Science and Technology / Department of Electrical and Electronics Engineering
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Estimation of Jitter Effects in Oscillators and Frequency Synthesizers Due to Prototypical Perturbation SourcesJanczak, Teresa Krystyna January 2005 (has links)
The Phase Locked Loops (PLLs) are widely used in contemporary electronic systems for frequency synthesis, clock recovery, frequency multiplication and other purposes. Because of continuous increase in operating frequency of clocking systems the requirements on the clock spectral purity and low jitter became very demanding and are one of major designers' concerns.Frequency synthesizers used in microprocessors are integrated on the same substrate as the rest of the circuit and thus suffer from a substantial switching noise injected into global supply and ground busses. Usually when the reference signal comes from a crystal oscillator, VCO becomes a main source of phase noise. A designer of VCO needs to determine the best circuit structure by considering different prototypical perturbations scenarios and predicting the worst case and jitter response when the perturbation signals are switched on and off. Therefore the time efficient estimation of the jitter effects resulting from many shapes, frequencies and phases of perturbation is critical.The presented dissertation demonstrates simulation methodology for rapid estimation of jitter in oscillators, particularly in VCOs, caused by perturbation sources such as power supply and substrate couplings. The methodology is also extended to these types of PLLs in which the VCO instability is a main contributor to the output timing jitter.Simulation of oscillatory circuits is strongly effected by the round-off errors. Special technique was developed to eliminate these effects.The technique is applicable for predicting timing non-idealities for arbitrary perturbation shapes, frequencies and phases. Different jitter metrics can be easily extracted for all important perturbation scenarios.The methodology utilizes the new concept of the transient multi-cycle Voltage Impulse Sensitivity Function (VISF), which has been developed in the dissertation. It contains information about sensitivity of oscillator to noise injection and also allows for efficient prediction of the transient effects caused by switching on and off the perturbation sources. The methodology offers efficiency and great simplicity of use, which frees designers from complicated, time consuming analysis of data generated by a simulator. The very involved postprocessing of simulation data can be fully automated.
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Feedforward active noise reduction for aircraft headsetsSmith, Corne J. 12 1900 (has links)
Thesis (MScEng)--University of Stellenbosch, 2003. / ENGLISH ABSTRACT: Active noise reduction (ANR) is a method of cancelling acoustic noise in a defined enclosure.
Two methods exist to implement ANR, they are the analog feedback method and the digital
feedforward method. Commercial ANR systems employing feedback methods have been around
since the 1980's. Feedforward methods have however only become practically implemental with
the age of fast real time digital signal processing. In current systems, feedback ANR is used to
attenuate broadband noise whilst feedforward methods are used to attenuate narrow band or
tonal noise [2].
This thesis investigates feedforward ANR to cancel broadband acoustic noise in aircraft
headsets. Different adaptive filters, optimal configuration of adaptive filters and practical
limitations to broadband attenuation for headsets are addressed.
Results from this thesis show that at least 10dS noise energy attenuation is attainable over a
bandwidth of 2.5kHz. A number of areas for further research are also identified. / AFRIKAANSE OPSOMMING: Aktiewe geraas beheer (AGS) is 'n metode om akoestiese geraas te kanselleer in 'n
gedefinieerde omgewing. Twee metodes bestaan om AGS te implementeer. Hulle is die
analoog terugvoer en digitale vorentoevoer metode. Kommersiële AGS wat die terugvoer
metode gebruik is al in gebruik van die 1980's. Vorentoevoer metodes is egter eers sedert
vinnige intydse digitale sein prosessering moontlik. In huidige stelsels word terugvoer AGS
gebruik vir die attenuasie van wyeband geraas terwyl vorentoevoer metodes gebruik word om
nouband of enkel toon geraas te kanselleer [2].
Die tesis ondersoek vorentoevoer AGS om wyeband akoestiese geraas te kanselleer in vliegtuig
kopstukke. Verskillende aanpasbare filters, optimale opstelling van aanpasbare filters en
praktiese beperkings tot wyeband attenuasie vir kopstukke word ondersoek.
Resultate van die tesis wys dat ten minste 10dS geraas energie attenuasie behaal kan word oor
'n bandwydte van 2.5kHz. 'n Aantal areas vir verder navorsing is ook geïdentifiseer.
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LTCC low phase noise voltage controlled oscillator design using laminated stripline resonators.January 2002 (has links)
Cheng Sin-hang. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2002. / Includes bibliographical references (leaves 90-92). / Abstracts in English and Chinese. / Chapter Chapter 1 --- Introduction --- p.1 / Chapter Chapter 2 --- Theory of Oscillator Design --- p.4 / Chapter 2.1 --- Open-loop approach --- p.4 / Chapter 2.2 --- One-port approach --- p.6 / Chapter 2.3 --- Two-port approach --- p.9 / Chapter 2.4 --- Voltage controlled oscillator (VCO) design --- p.10 / Chapter 2.4.1 --- Active device selection and biasing --- p.11 / Chapter 2.4.2 --- Feedback circuit design --- p.15 / Chapter 2.4.3 --- Frequency tuning circuit --- p.20 / Chapter Chapter 3 --- Noise in Oscillators --- p.23 / Chapter 3.1 --- Origin of phase noise --- p.23 / Chapter 3.2 --- Impact of phase noise in communication system --- p.28 / Chapter 3.3 --- Phase noise consideration in VCO design --- p.30 / Chapter Chapter 4 --- Low Temperature Co-Fired Ceramic --- p.31 / Chapter 4.1 --- LTCC process --- p.31 / Chapter 4.1.1 --- LTCC fabrication process --- p.32 / Chapter 4.1.2 --- LTCC materials --- p.34 / Chapter 4.1.3 --- Advantages of LTCC technology --- p.35 / Chapter 4.2 --- Passive components realization in LTCC --- p.37 / Chapter 4.2.1 --- Capacitor --- p.37 / Chapter 4.2.2 --- Inductor --- p.42 / Chapter Chapter 5 --- High-Q LTCC Resonator Design --- p.47 / Chapter 5.1 --- Definition of Q-factor --- p.47 / Chapter 5.2 --- Stripline --- p.50 / Chapter 5.3 --- Power losses --- p.52 / Chapter 5.4 --- Laminated stripline resonator design --- p.53 / Chapter 5.4.1 --- λ/4 resonator structure --- p.57 / Chapter 5.4.2 --- Meander-line resonator structure --- p.60 / Chapter 5.4.3 --- Bi-metal-layer resonator structure --- p.63 / Chapter Chapter 6 --- LTCC Voltage Controlled Oscillator Design --- p.67 / Chapter 6.1 --- Circuit design --- p.67 / Chapter 6.2 --- Output filter --- p.68 / Chapter 6.3 --- Embedded capacitor --- p.71 / Chapter 6.4 --- VCO layout and simulation --- p.72 / Chapter Chapter 7 --- Experimental Setup and Results --- p.77 / Chapter 7.1 --- Measured Result: LTCC resonators --- p.77 / Chapter 7.1.1 --- Experimental results --- p.79 / Chapter 7.2 --- Measured results: LTCC voltage controlled oscillators --- p.83 / Chapter Chapter 8 --- Conclusion and Future Work --- p.88 / Reference List --- p.90 / Appendix A: TRL calibration method --- p.93 / Appendix B: Q measurement --- p.103 / Appendix C: Q-factor extraction program listing --- p.109 / Chapter 1. --- Function used to calculate Q from s-parameter --- p.109 / Chapter 2. --- Function used to calculate Q from z-parameter --- p.111
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Design and implementation of fully integrated low-voltage low-noise CMOS VCO.January 2002 (has links)
Yip Kim-fung. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2002. / Includes bibliographical references (leaves 95-100). / Abstracts in English and Chinese. / Abstract --- p.I / Acknowledgement --- p.III / Table of Contents --- p.IV / Chapter Chapter 1 --- Introduction --- p.1 / Chapter 1.1 --- Motivation --- p.1 / Chapter 1.2 --- Objective --- p.6 / Chapter Chapter 2 --- Theory of Oscillators --- p.7 / Chapter 2.1 --- Oscillator Design --- p.7 / Chapter 2.1.1 --- Loop-Gain Method --- p.7 / Chapter 2.1.2 --- Negative Resistance-Conductance Method --- p.8 / Chapter 2.1.3 --- Crossed-Coupled Oscillator --- p.10 / Chapter Chapter 3 --- Noise Analysis --- p.15 / Chapter 3.1 --- Origin of Noise Sources --- p.16 / Chapter 3.1.1 --- Flicker Noise --- p.16 / Chapter 3.1.2 --- Thermal Noise --- p.17 / Chapter 3.1.3 --- Noise Model of Varactor --- p.18 / Chapter 3.1.4 --- Noise Model of Spiral Inductor --- p.19 / Chapter 3.2 --- Derivation of Resonator --- p.19 / Chapter 3.3 --- Phase Noise Model --- p.22 / Chapter 3.3.1 --- Leeson's Model --- p.23 / Chapter 3.3.2 --- Phase Noise Model defined by J. Cranincks and M Steyaert --- p.24 / Chapter 3.3.3 --- Non-linear Analysis of Phase Noise --- p.26 / Chapter 3.3.4 --- Flicker-Noise Upconversion Mechanism --- p.31 / Chapter 3.4 --- Phase Noise Reduction Techniques --- p.33 / Chapter 3.4.1 --- Conventional Tank Circuit Structure --- p.33 / Chapter 3.4.2 --- Enhanced Q tank circuit Structure --- p.35 / Chapter 3.4.3 --- Tank Circuit with parasitics --- p.37 / Chapter 3.4.4 --- Reduction of Up-converted Noise --- p.39 / Chapter Chapter 4 --- CMOS Technology and Device Modeling --- p.42 / Chapter 4.1 --- Device Modeling --- p.42 / Chapter 4.1.1 --- FET model --- p.42 / Chapter 4.1.2 --- Layout of Interdigitated FET --- p.46 / Chapter 4.1.3 --- Planar Inductor --- p.48 / Chapter 4.1.4 --- Circuit Model of Planar Inductor --- p.50 / Chapter 4.1.5 --- Inductor Layout Consideration --- p.54 / Chapter 4.1.6 --- CMOS RF Varactor --- p.55 / Chapter 4.1.7 --- Parasitics of PMOS-type varactor --- p.57 / Chapter Chapter 5 --- Design of Integrated CMOS VCOs --- p.59 / Chapter 5.1 --- 1.5GHz CMOS VCO Design --- p.59 / Chapter 5.1.1 --- Equivalent circuit model of differential LC VCO --- p.59 / Chapter 5.1.2 --- Reference Oscillator Circuit --- p.61 / Chapter 5.1.3 --- Proposed Oscillator Circuit --- p.62 / Chapter 5.1.4 --- Output buffer --- p.63 / Chapter 5.1.5 --- Biasing Circuitry --- p.64 / Chapter 5.2 --- Spiral Inductor Design --- p.65 / Chapter 5.3 --- Determination of W/L ratio of FET --- p.67 / Chapter 5.4 --- Varactor Design --- p.68 / Chapter 5.5 --- Layout (Cadence) --- p.69 / Chapter 5.6 --- Circuit Simulation (SpectreRF) --- p.74 / Chapter Chapter 6 --- Experimental Results and Discussion --- p.76 / Chapter 6.1 --- Measurement Setup --- p.76 / Chapter 6.2 --- Measurement results: Reference Oscillator Circuit --- p.81 / Chapter 6.2.1 --- Output Spectrum --- p.81 / Chapter 6.2.2 --- Phase Noise Performance --- p.82 / Chapter 6.2.3 --- Tuning Characteristic --- p.83 / Chapter 6.2.4 --- Microphotograph --- p.84 / Chapter 6.3 --- Measurement results: Proposed Oscillator Circuit --- p.85 / Chapter 6.3.1 --- Output Spectrum --- p.85 / Chapter 6.3.2 --- Phase Noise Performance --- p.86 / Chapter 6.3.3 --- Tuning Characteristic --- p.87 / Chapter 6.3.4 --- Microphotograph --- p.88 / Chapter 6.4 --- Comparison of Measured Results --- p.89 / Chapter 6.4.1 --- Phase Noise Performance --- p.89 / Chapter 6.4.2 --- Tuning Characteristic --- p.90 / Chapter Chapter 7 --- Conclusion and Future Work --- p.93 / Chapter 7.1 --- Conclusion --- p.93 / Chapter 7.2 --- Future Work --- p.94 / References --- p.95 / Author's Publication --- p.100 / Appendix A --- p.101 / Appendix B --- p.104 / Appendix C --- p.106
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Filtro digital híbrido para sistemas embarcados de alta potênciaMartini, Guilherme Henrique Kaehler 14 June 2013 (has links)
Esta dissertação trata sobre o projeto, implementação e avaliação de um filtro híbrido para supressão de ruído em sistemas de alta potência. Seu desempenho será otimizado para reduzir a magnitude de ruídos impulsivos, que são comuns em dispositivos de alta potência, como inversores de frequência que controlam motores trifásicos. O filtro híbrido proposto é avaliado empiricamente em um inversor de frequência que é controlado por um sistema embarcado. A abordagem proposta é comparada com abordagens clássicas de filtragem digital como média móvel, filtro de resposta finita ao impulso (FIR) e filtro de resposta infinita ao impulso (IIR). / This work presents the project, implementation and evaluation of a hybrid filter used for noise supressing in high power switching converters. It is optimized to reduce impulsive noise that is commonly present in high power devices like frequency inverters that control three-phase motors. The hybrid filter is evaluated empirically in a frequency inverter that is controlled by an embedded system. This approach is compared to classical ones, like the moving average, the finite impulse response (FIR) and the infinite impulse response (IIR) filters.
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Filtro digital híbrido para sistemas embarcados de alta potênciaMartini, Guilherme Henrique Kaehler 14 June 2013 (has links)
Esta dissertação trata sobre o projeto, implementação e avaliação de um filtro híbrido para supressão de ruído em sistemas de alta potência. Seu desempenho será otimizado para reduzir a magnitude de ruídos impulsivos, que são comuns em dispositivos de alta potência, como inversores de frequência que controlam motores trifásicos. O filtro híbrido proposto é avaliado empiricamente em um inversor de frequência que é controlado por um sistema embarcado. A abordagem proposta é comparada com abordagens clássicas de filtragem digital como média móvel, filtro de resposta finita ao impulso (FIR) e filtro de resposta infinita ao impulso (IIR). / This work presents the project, implementation and evaluation of a hybrid filter used for noise supressing in high power switching converters. It is optimized to reduce impulsive noise that is commonly present in high power devices like frequency inverters that control three-phase motors. The hybrid filter is evaluated empirically in a frequency inverter that is controlled by an embedded system. This approach is compared to classical ones, like the moving average, the finite impulse response (FIR) and the infinite impulse response (IIR) filters.
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