- About
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The Global ETD Search service is a free service for researchers
to find electronic theses and dissertations. This service is
provided by the
Networked Digital Library of Theses and Dissertations.
Our metadata is collected from universities around the world. If you manage a university/consortium/country archive and want to be added, details can be found on the NDLTD website.
Search results
Showing 131 to 140 of 183 (0.07 seconds)Spelling suggestions: "subject:"electronic digital computers."" "subject:"eelectronic digital computers.""
| 131 |
A probabilistic analysis of a class of random trees/Mahmoud, Hosam M. January 1983 (has links)
No description available.
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| 132 |
A meta system for generating software engineering environments /McKnight, Walter Lee January 1985 (has links)
No description available.
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| 133 |
A methodology for specifying and analyzing communication protocols and services /Liu, Nien-chen January 1986 (has links)
No description available.
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| 134 |
Modular verification of concurrent systems /Sobel, Ann E. Kelley January 1986 (has links)
No description available.
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| 135 |
A survey to determine the knowledges and skills needed by clerical workers in first-level entry occupations in digital computer installations /Jones, Adaline Dorothy Seitz January 1964 (has links)
No description available.
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| 136 |
An associatively controlled functional multiprocessor for real-time applications /Ebner, George Chester January 1972 (has links)
No description available.
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| 137 |
A methodology for identifying information system design requirements based on the assessment of multiple user performance criteria /Chandler, John Steven January 1977 (has links)
No description available.
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| 138 |
Design of a digital logic trainerAllen, James Dillino January 1965 (has links)
In this thesis a binary digital system, capable of performing arithmetic operations, was developed from a simple two-state (binary digital) device. This binary digital system or digital computer could be programmed to add, subtract or multiply and perform many other logic functions. The above operations are performed serially in seven bit shift registers. The system is manually programmed using an Instruction Select Switch.
During each phase of the development of the system, an example of the procedure used to reach a conclusion during that phase was explained at length. It is hoped that following and continually reapplying the basic procedures outlined in this thesis, particularly in the development of the Full Adder, would allow for the design of any moderately complex digital system. / Master of Science
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| 139 |
A design aid program for implementation of digital networks on wirewrap circuit boardsMacKay, Donald McAlpin January 1979 (has links)
M. S.
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| 140 |
A design aid program for implementation of digital networks on wirewrap circuit boardsJanuary 1979 (has links)
M. S.
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