Orientador: José Raimundo de Oliveira / Dissertação (mestrado) - Universidade Estadual de Campinas, Faculdade de Engenharia Elétrica e de Computação / Made available in DSpace on 2018-08-23T02:36:38Z (GMT). No. of bitstreams: 1 Santos_MiltonFelipeSouza_M.pdf: 3219713 bytes, checksum: c54c1e303b8b3f5087f884140423e2a6 (MD5) Previous issue date: 2013 / Resumo: Este trabalho analisa as possibilidades de arquiteturas de hardware buscando encontrar uma plataforma de desenvolvimento escalável e possível de se adaptar a diferentes estruturas mecânicas de veículos móveis. Esta plataforma deve ainda ter sensores suficientes para permitir comportamentos autônomos ao veículo. Para isto, de forma a entender melhor o conceito de autonomia, primeiramente foram analisadas as capacidades mentais humanas. Das capacidades estudadas foram escolhidas as capacidades de sensação, percepção, orientação e cognição como capacidades relacionadas ao hardware quando implantadas em veículos móveis artificialmente. Em seguida cada uma destas quatro capacidades mentais foi analisada a fundo buscando métodos e sistemas para solucionar estes problemas. Foram analisadas também as possibilidades de topologias em rede de forma a conectar os módulos individuais e propostos critérios de escolha dos módulos e topologias do sistema. Após todas estas análises exaustivas, onde somente as partes mais importantes foram incluídas neste trabalho, foi escolhida a topologia de barramento serial com arbitração em hardware para permitir modularidade, escalabilidade e confiabilidade. Como barramento elétrico foi escolhido o barramento CAN (Controller Area Network) que juntamente com diversos módulos especificados neste trabalho resultam na plataforma que foi chamada "Sistema Autônomo Completo". Com base neste sistema, foram propostos como resultados duas simplificações: uma baseada em veículos que operam no solo (bidimensional) e outra para veículos que operam em ambientes tridimensionais como o ar ou a água. Buscando um enfoque educacional foi proposta uma sequência de implantação do sistema autônomo completo e alguns estudos de casos estão apresentados. Com este trabalho foi possível estruturar e criar uma sequência de desenvolvimento de um veículo móvel robótico em fases que podem ser facilmente seguidas por escolas ou empresas / Abstract: This work analyzes hardware architectures of embedded systems, searching for a development platform of mobile robots. This platform must be scalable and easily adaptable to several types of mechanical designs of mobile vehicles. And it must have enough sensors in order to reach autonomous performance. For better understanding concepts of autonomy, the human brain capacities were studied. From the studied capacities, sensation, perception, representation and orientation were chosen. These four capacities were chosen as related with hardware implementations if artificially designed for mobile vehicles. Network topologies for connecting modules of independent methods for the artificial brain capabilities mentioned were also analyzed. For choosing the best proposal, some criteria were defined for the modules and system topologies. After this analysis, where only the most important parts were included, a topology was chosen. The chosen topology is the serial bus with hardware arbitration. The chosen electrical bus was the CANbus, which together with the other modules specified in this work resulted in the platform called "Full Autonomous Vehicle". Based on this system platform, simplifications were proposed: one focused on vehicles with two-dimensional movements, and other focused on vehicles with three-dimensional movements. Searching for an educational point-of-view, an implementation sequence was proposed for the full autonomous vehicle and some cases were studied. With this work was possible to organize and create a development sequence of a robotic mobile vehicle divided by phases. These phases can be easily followed by schools and companies / Mestrado / Automação / Mestre em Engenharia Elétrica

The use of embedded Internet systems is growing rapidly in the manufacturing sector. These systems allow the monitoring and controlling of plant machinery and manufactured items from a remote location via a standard Web interface. In a manufacturing environment, it is inevitable that long running processes will require support for dynamic reconfiguration because, for example, machines may fail, services may be moved or withdrawn and user requirements may change. In such an environment it is essential that the operation and architecture of such processes can be modified to reflect such changes. This research project will present methods and ideas for establishing a reconfigurable remote system by using standard 8-bit microcontrollers and reconfigurable hardware. It will allow a manufacturing process to be modified and changed within minutes without even having to be physically present at the location where the process is running.

The evolutionary nature of humans requires agent systems to be continuously replaced due to their inability to meet or adapt to our changing needs. Therefore, to eliminate the need for a human to continuously adapt an agent, evolutionary agents are required [Chu04, Ore99, Rak02, Syc96]. This dissertation develops a feasible option to ensuring that agents continuously develop desirable behaviour. The solution is a specialized architecture that embeds self-evolvement into a target agent. The specialized architecture ensures that desirable behaviour emerges from any agent, as it is embedded between the target agent and the target agent’s environment and therefore is able to obtain domain- and hardwarespecific information from the target agent. The specialized architecture is a comprehensive methodology that incorporates all agents with the ability to embed the required self-evolvement enhancements as domain- and hardwarespecific information is obtained from the target agent. The specialized architecture responsible for embedding self-evolvement into an agent is the generic self-evolvement effecting evolutionary agent (GSEEA). The GSEEA is developed with a single goal, which is to ensure that the target agent meets the requirements of a changing environment. Changing environmental conditions can include different network conditions and different platforms. The GSEEA’s goal is accomplished by embedding the required self-evolvement enhancements into the target agent to produce a self-evolvement enhanced agent. In this dissertation the GSEEA is implemented to demonstrate its feasibility and problem-solving accuracy. In the GSEEA implementation the target agent is a puzzle-solving agent and the self-evolvement enhanced agent is the selfevolvement enhanced puzzle-solving agent. The GSEEA’s deliberative component consists of two algorithms, namely a genetic algorithm and a learning algorithm. The GSEEA’s genetic algorithm develops knowledge base rules (selfContents III evolvement enhancements) that modify actuator information. The GSEEA’s learning algorithm updates developed knowledge base rules by modifying sensor information. The GSEEA tests the developed self-evolvement enhancements by embedding them into the target agent through the target agent’s knowledge base manager, evaluating the developed self-evolvement enhancements and deleting those which do not enhance the target agent. The target agent achieves selfevolvement as additional enhancements required by the self-evolvement enhanced agent can be achieved by applying the same process followed to enhance the target agent which was discussed previously. The evaluation of the GSEEA implementation demonstrated that the GSEEA was implemented successfully based on feasibility and problem-solving accuracy as the self-evolvement enhanced puzzle-solver agent outperformed the puzzlesolver agent. / Prof. E.M. Ehlers

Ehlers, E.M., Prof.

M. Tech. (Electrical & Electronic Engineering) / In this research we compare conventional data acquisition system (DAS) with the embedded data acquisition systems. The performance specifications of 4 different types of DAQ cards are drawn up with special emphasis made on the following parameters: Slew rate, settling time, relative accuracy and system noise. These parameters are taken from 2 conventional DAS and then compared to those taken from 2 embedded data acquisition systems under the same electrical conditions. The embedded DAQ system’s hardware was built using the PIC Microcontroller interfaced to the Digital to Analog Convertors (DAC). MPLAB C18 is used to create a program which communicates with the embedded DAQ system, to transmit generated signals. National Instrument's LabView is used to create a program which communicates with the conventional DAQ system, to acquire external generated signals and retransmit the signals. In most cases the performance of conventional and embedded are close, but one of the embedded DAS seem to be unstable at high frequencies.

The objective of this thesis was to develop an 8051 microcontroller soft core in the Verilog hardware description language (HDL). Each functional unit of the 8051 microcontroller was developed as a separate module, and tested for functionality using the open-source VHDL Dalton model as benchmark. These modules were then integrated to operate as concurrent processes in the 8051 soft core. The Verilog 8051 soft core was then synthesized in Quartus® II simulation and synthesis environment (Altera Corp., San Jose, CA, www.altera.com) and yielded the expected behavioral response to test programs written in 8051 assembler residing in the v8051 ROM. The design can operate at speeds up to 41 MHz and used only 16% of the FPGA fabric, thus allowing complex systems to be designed on a single chip. Further research and development can be performed on v8051 to enhance performance and functionality.

Orientadores: Rodolfo Jardim de Azevedo, Sandro Rigo / Dissertação (mestrado) - Universidade Estadual de Campinas, Instituto de Computação / Made available in DSpace on 2018-08-27T12:16:48Z (GMT). No. of bitstreams: 1 Cardoso_RogerioAlves_M.pdf: 7699903 bytes, checksum: be514fda4ed9849ea41a1899010841c7 (MD5) Previous issue date: 2015 / Resumo: Com o aumento da complexidade dos sistemas eletrônicos, novos desafios foram surgindo na fase de projeto desses sistemas; assim, os requisitos de projeto estão cada vez mais complexos, implicando diretamente no time-to-market que torna-se cada vez mais difícil de ser cumprido. As abordagens tradicionais como o projeto RTL tornaram-se impraticáveis visto que é cada vez mais evidente a necessidade da criação de software paralelamente ao projeto de hardware. Nesse contexto, metodologias modernas como ESL têm sido utilizadas com sucesso, para que os projetistas possam solucionar esses problemas. Com o crescente numero de funcionalidades que os novos dispositivos implementam e o aumento da complexidade das aplica coes, muitas vezes exigem que esses dispositivos rodem um sistema operacional embarcado. Isso dificulta ainda mais o desenvolvimento homogêneo hardware/software, pois demanda a criação de plataformas virtuais completas capazes de executarem um sistema operacional e suas aplicações, e o desenvolvimento dessas plataformas não é uma tarefa trivial. Este trabalho apresenta a implementação de uma plataforma, em nível de sistema, completa da arquitetura LEON, utilizando a ferramenta ArchC. A plataforma apresentada permite executar um sistema operacional Linux e suas aplica coes, com suporte a gerenciamento de memoria virtual. Além de demonstrar as dificuldades e as limitações da ferramenta ArchC na geração desse tipo plataformas / Abstract: Design challenges in electronic systems increase with their size and the design require- ments, leading to even more pressure in time-to-market issues. Traditional approaches like RTL become unaffordable, due to the need for parallel development of hardware and software necessity. In this context, modern methodologies like ESL have been success- fully used to tackle this kind of problem. With the increasing number of features and the complexity of the applications to that new devices, these devices, in major, may need an embedded operating system. This poses a challenge in the homogeneous development of hardware and software, demanding a complex virtual platform development, capable of running an operating system and its applications. But, developing this kind of platform is not a simple task. This work presents an ArchC System Level Platform implementation, based on LEON architecture. This platform can execute a Linux operating system and user applications with virtual memory support. It besides demonstrates the challenges and limitations of the ArchC tools on development of this type of platform / Mestrado / Ciência da Computação / Mestre em Ciência da Computação

Pour concevoir des systèmes de vision embarquée, deux axes peuvent être considérés. Le premier se focalise sur la conception de nouveaux dispositifs numériques plus puissants capables de mettre en œuvre de manière efficace des algorithmes complexes. Le second se concentre sur l'élaboration de nouveaux algorithmes de vision, moins gourmands en ressources et qui peuvent efficacement être mis en œuvre sur des systèmes numériques embarqués. Nous privilégions dans ces travaux le second axe avec comme approche l'utilisation de modèles connexionnistes. Parmi les différents modèles existants, nous nous intéressons à deux modèles de réseaux de neurones artificiels, les réseaux à clusters et les réseaux convolutifs. Le premier modèle que nous utilisons, appelé réseau à clusters, n'avait jamais été utilisé pour réaliser des tâches de vision par ordinateur. Cependant, il paraissait être un bon candidat pour être utilisé sur des systèmes embarqués, notamment par des mises en œuvre sur des architectures matérielles dédiées. L'objectif a été tout d'abord de trouver les types de tâches pouvant être réalisées à l'aide de ce modèle de réseau. Ce modèle a été conçu pour réaliser des mémoires associatives. En vision par ordinateur, cela peut se rapprocher de problèmes tels que la recherche d'images par le contenu. Ce type d'application utilise massivement des algorithmes de recherche de plus proches voisins approchée et c'est donc sur ce type de tâches que nous nous sommes concentrés. Le second type de réseau étudié appelé réseau convolutif, est lui très populaire pour concevoir des systèmes de vision par ordinateur. Notre objectif a été ici de trouver des manières de simplifier ces réseaux tout en conservant des performances élevées. Nous proposons notamment une technique qui consiste à ré-entrainer des réseaux quantifiés. / To design embedded computer vision systems, two axes can be considered. The first focuses on designing new, more powerful, digital devices that can efficiently implement complex algorithms. The second targets the development of new, lightweight computer vision algorithms that can be effectively implemented on digital embedded systems. In this work, we favor the second axis by using connectionist models. In this context, we focus on two models of artificial neural networks: cluster-based networks and convolutional networks. The first model we use, i.e. cluster-based network, was never been used to perform computer vision tasks before. However, it seemed to be a good candidate to design embedded systems, especially through dedicated hardware architectures implementation. The goal was first to find out the kinds of tasks that could be performed using this network model. This model has been designed to implement associative memories which can come close to problems such as content- based image retrieval in computer vision domain. This type of application massively uses approximated nearest neighbor search algorithms which makes it a good candidate to focus on. The second type of network studied in this work, called convolutional network, is very popular to design computer vision systems. Our goal here was to find different ways to simplify their complexity while maintaining high performance. In particular, we proposed a technique that involves re-training quantified networks.

Network embedding or representation learning is important for analyzing many real-world applications and systems, i.e., social networks, citation networks and communication networks. It targets at learning low-dimensional vector representations of nodes with preserved graph structure (e.g., link relations) and content (e.g., texts) information. The derived node representations can be directly applied in many downstream applications, including node classification, clustering and visualization. In addition to the complex network structures, nodes may have rich non structure information such as labels and contents. Therefore, structure, label and content constitute different aspects of the entire network system that reflect node similarities from multiple complementary facets. This thesis focuses on multifaceted network embedding learning, which aims to efficiently incorporate distinct aspects of information such as node labels and node contents for cooperative low-dimensional representation learning together with node topology. / Includes bibliography. / Dissertation (Ph.D.)--Florida Atlantic University, 2020. / FAU Electronic Theses and Dissertations Collection

Thesis (MSc)--University of Stellenbosch, 2001. / ENGLISH ABSTRACT: Computer-aided verification techniques, such as model checking, are often considered essential to produce highly reliable software systems. Modern model checkers generally require models to be written in eSP-like notations. Unfortunately, such systems are usually implemented using conventional imperative programming languages. Translating the one paradigm into the other is a difficult and error prone process. If one were to program in a process-oriented language from the outset, the chasm between implementation and model could be bridged more readily. This would lead to more accurate models and ultimately more reliable software. This thesis covers the definition of a process-oriented language targeted specifically towards embedded systems and the implementation of a suitable compiler and run-time system. The language, LF, is for the most part an extension of the language Joyce, which was defined by Brinch Hansen. Both LF and Joyce have features which I believe make them easier to use than other esp based languages such as occam. An example of this is a selective communication primitive which allows for both input and output guards which is not supported in occam. The efficiency of the implementation is important. The language was therefore designed to be expressive, but constructs which are expensive to implement were avoided. Security, however, was the overriding consideration in the design of the language and runtime system. The compiler produces native code. Most other esp derived languages are either interpreted or execute as tasks on host operating systems. Arguably this is because most implementations of esp and derivations thereof are for academic purposes only. LF is intended to be an implementation language. The performance of the implementation is evaluated in terms of practical metries such as the time needed to complete communication operations and the average time needed to service an interrupt. / AFRIKAANSE OPSOMMING: Rekenaar ondersteunde verifikasietegnieke soos programmodellering, is onontbeerlik in die ontwikkeling van hoogs betroubare programmatuur. In die algemeen, aanvaar programme wat modelle toets eSP-agtige notasie as toevoer. Die meeste programme word egter in meer konvensionele imperatiewe programmeertale ontwikkel. Die vertaling vanuit die een paradigma na die ander is 'n moelike proses, wat baie ruimte laat vir foute. Indien daar uit die staanspoor in 'n proses gebaseerde taal geprogrammeer word, sou die verwydering tussen model en program makliker oorbrug kon word. Dit lei tot akkurater modelle en uiteindelik tot betroubaarder programmatuur. Die tesis ondersoek die definisie van 'n proses gebaseerde taal, wat gemik is op ingebedde programmatuur. Verder word die implementasie van 'n toepaslike vertaler en looptyd omgewing ook bespreek. Die taal, LF, is grotendeels gebaseer op Joyce, wat deur Brinch Hansen ontwikkel is. Joyce en op sy beurt LF, is verbeterings op ander esp verwante tale soos occam. 'n Voorbeeld hiervan is 'n selektiewe kommunikasieprimitief wat die gebruik van beide toevoer- en afvoerwagte ondersteun. Omdat 'n effektiewe implementasie nagestreef word, is die taalontwerp om so nadruklik moontlik te wees, sonder om strukture in te sluit wat oneffektief is om te implementeer. Sekuriteit was egter die oorheersende oorweging in die ontwerp van die taal en looptyd omgewing. Die vertaler lewer masjienkode, terwyl die meeste ander implementasies van eSP-agtige tale geinterpreteer word of ondersteun word as prosesse op 'n geskikte bedryfstelsel- die meeste eSP-agtige tale word slegs vir akademiese doeleindes aangewend. LF is by uitstek ontwerp as implementasie taal. Die evaluasie van die stelsel se werkverrigting is gedoen aan die hand van praktiese maatstawwe soos die tyd wat benodig word vir kommunikasie, sowel as die gemiddelde tyd benodig vir die hantering van onderbrekings.