Agile practices have become norm, also in large scale organizations. Applying agile methods includes introducing continuous practices, including continuous architecture. For web scale applications microservices is a rising star. This thesis investigates if microservices could be an answer also for embedded systems to tackle the synchronizing problem of many parallel teams.

Cyber-physical systems (CPS) integrate sensing, computing, communication and actuation capabilities to monitor and control operations in the physical environment. A key requirement of such systems is the need to provide predictable real-time performance: the timing correctness of the system should be analyzable at design time with a quantitative metric and guaranteed at runtime with high assurance. This requirement of predictability is particularly important for safety-critical domains such as automobiles, aerospace, defense, manufacturing and medical devices. The work in this dissertation focuses on the challenges arising from the use of modern multi-core platforms in CPS. Even as of today, multi-core platforms are rarely used in safety-critical applications primarily due to the temporal interference caused by contention on various resources shared among processor cores, such as caches, memory buses, and I/O devices. Such interference is hard to predict and can significantly increase task execution time, e.g., up to 12 commodity quad-core platforms. To address the problem of ensuring timing predictability on multi-core platforms, we develop novel analytical and systems techniques in this dissertation. Our proposed techniques theoretically bound temporal interference that tasks may suffer from when accessing shared resources. Our techniques also involve software primitives and algorithms for real-time operating systems and hypervisors, which significantly reduce the degree of the temporal interference. Specifically, we tackle the issues of cache and memory contention, locking and synchronization, interrupt handling, and access control for computational accelerators such as general-purpose graphics processing units (GPGPUs), all of which are crucial to achieving predictable real-time performance on a modern multi-core platform. Our solutions are readily applicable to commodity multi-core platforms, and can be used not only for developing new systems but also migrating existing applications from single-core to multi-core platforms.

The Orbital Systems Company faces the really important issues such a lack of water, sewerage and even public health infrastructure. Its proposition of the Shower of the Future, which is a high-tech purification system that recycles water was inspired by the NASA, spaceship technology with limited sources of water and can be the solution of these problems. Due to the patented technology, which bases on the special filters, it is possible to reuse water. This idea, which is used in the shower, allows on more than 90% savings in water usage and 80% savings in energy, while producing water that is cleaner than average tap water. The company aims to provide this special technology not only to the hotels or hospitals, but also to the regular house to maintain the sustainability issue and even achieve the economic profit. The Shower of the Future is a new technology still in the developing phase. To achieve the goals of the company, in the software part of the system, two important problems have to be solved. First of them is the management issue. At this moment, three different versions of the showers, which differ in hardware and in software are in used. Much more versions adjusted to the place of destination such as hotel or hospital are planned. To manage the codes and integrate all of the possible version of the shower, the company desires to create one compatible software to control all of them. The mechanisms to integrate the codes by managing the configurable parameters of the system and to auto detect the version of the shower are proposed in the work. The second company’s issue is the improvement of the control system. As performed research and tests show, the temperature control in the Shower of the Future is too slow and inaccurate. To solve this problem, the identification process of the model was conducted and the PID controllers for the heater were designed. Due to specific structure of the shower, which introduce delays and disturbances, a single PID controller is not sufficient to maintain the control system. As a final controller, the switching PID controller created from previously designed PID controllers is proposed. Thanks to it, the temperature rising time is reduced 2 times, the overshoot, which was equal to 5 °C does not appear and the steady state error is diminished. Thanks to improvement of the temperature control system, much less water is wasted and much more energy is saved. The Shower of the Future of the Orbital System, which nevertheless needs improvements and more work, is only the first step in creating a new paradigm for daily water usage. The company and its product seriously consider the sustainability and environment aspect.

Ten years after the Internet revolution are we standing on the brink of another revolution: networked embedded systems that connect the physical world with the computers, enabling new applications ranging from environmental monitoring and wildlife tracking to improvements in health care and medicine. 98% of all microprocessors sold today are used in embedded systems. Those systems have much smaller amounts of memory than PC computers. An embedded system may have as little has a few hundred bytes of memory, which makes programming them a challenge. This thesis focus on three topics regarding programming memory-constrained networked embedded systems: the TCP/IP for memory-constrained networked embedded systems, simplifying event-driven programming of memory-constrained systems, and dynamic loading of program modules in my Contiki operating system for memory-constrained systems. I show that the TCP/IP protocol stack can, contrary to previous belief, be used in memory-constrained embedded systems by implementing two small TCP/IP protocol stacks, lwIP and uIP. I present a novel programming mechanism called protothreads that I show significantly reduce the complexity of event-driven programming for memory-constrained systems. Protothreads provide a conditional blocked wait mechanism on top of event-driven systems with a much smaller memory overhead than full multithreading; each protothread requires only two bytes of memory. I show that dynamic linking of native code in standard ELF object code format is doable and feasible for wireless sensor networks by implementing a dynamic linker in the Contiki operating system. The results show that the energy overhead of dynamic linking of ELF files mainly is due to the ELF file format and not due to the dynamic linking mechanism as such. The impact of the research in this thesis has been and continues to be large. The software I have developed as part of this thesis is currently used by hundreds of companies in embedded devices in such diverse systems as car engines and satellites. The papers in this thesis are included as required reading in advanced courses on networked embedded systems and wireless sensor networks. / Contiki / uIP / Protothreads

Off-highway vehicles are on the verge of switching from analog to digital video camera technology (VCT), which offers better video quality and new features but adds complexity to the system. This thesis project aims to implement the digital VCT to the display computer CCpilot VA intended for off-highway vehicles. In this project the differences between analog and digital VCTs were reviewed and then a demo displaying a live digital camera video feed on the embedded Linux based display computer CCpilot VA was implemented with Qt and QML. More specifically, different GStreamer pipelines were tested, as Qt uses GStreamer to play video, and camera settings were changed using the ISO 17215 standard.  The demo displayed a live digital camera video feed with high quality, low latency and high frame rate on the VA by using a GStreamer pipeline utilizing hardware decoding. The results have shown that digital video cameras perform better than analog cameras, primarily because digital cameras have better video quality. The attempts to simultaneously display a video feed and a Graphical User Interface created by Qt have been made. However, they were only successful with poor video performance. A zero-copy link between the GStreamer pipeline’s decoder and sink element must be used to obtain good video performance.

Modern embedded systems development poses new challenges to a designer due to the global reachability of the contemporary market. One product shipped to different countries or customers should satisfy varying conditions, standards and constraints. Variability of a developed system should be taken into account by a designer. In a case of the embedded heterogeneous systems, this problem becomes challenging. Along with the variability heterogeneity of a system introduces new tasks, which should be addressed during design process. In this work, we propose a technology independent design flow. The proposed solution is supported by state-of-the-art tools and takes into account variability, partitioning, interfacing and dependency resolving processes. This thesis is conducted as a case study. We explored a design process of an industrial project, identified existing challenges and drawbacks in the existing solutions. We propose a new approach to a design flow of heterogeneous embedded systems. Also, a tool, supporting the presented solution, is implemented, which would allow a developer to include this approach into everyday design flow in order to increase a development speed and enable a task automation.

No description available.

Today’s embedded systems require more and more performance but they are still required to meet power constraints. Single processor systems can deliver high performance but this leads to high power consumption. One solution to this problem is to use a multiprocessor system instead which is able to provide high performance and at the same time meet the power constraints. The reason that such a system can meet the power constraints is that it can have a lower clock frequency than a similar single processor system. The focus of the project is to explore possibilities when developing new multiprocessor systems. The project makes a comparison of asymmetric multiprocessing (AMP) systems and symmetric multiprocessing (SMP) systems in terms of task management and communication between the processors. A comparison is made between the Advanced High-performance Bus (AHB) interface and the Advanced eXtensible Interface (AXI). The fixed priority and round-robin arbitration algorithms is also compared. The project also contains a practical part where a demo is developed to show that an inter-processor communication using exclusive access is possible to implement. The theoretical part of the project containing the comparisons result in good comparisons that can be used to get an overview of what to use when developing new Multiprocessor System on Chip (MPSoC) designs. The demo developed in this project failed to meet the requirement of having a fully functional spinlock. This problem can be solved in the future if new hardware is developed. / Dagens inbyggda system kräver mer och mer prestanda men de måste fortfarande klara av kraven kring strömförbrukning. System med en processor kan leverera hög prestanda men detta leder till hög strömförbrukning. En lösning till detta problem är att använda ett multiprocessorsystem istället som klarar av att leverera hög prestanda och samtidigt klara av kraven kring strömförbrukning. Anledningen till att denna typ av system klarar av kraven kring strömförbrukning är att de kan använda en lägre klockfrekvens än ett system med en processor. Fokuset på detta projektet ligger på att utforska möjligheterna som finns när nya multiprocessorsystem ska utvecklas. Projektet gör en jämförelse mellan asymmetriska och symmetriska multiprocessorsystem i termer av uppgiftshantering och kommunikation mellan processorerna. En jämförelse har gjorts mellan Advanced High-Performance Bus (AHB) gränssnittet och Advanced eXtensible Interface (AXI) gränssnittet. Fixed priority och round-robin algoritmerna för hantering av krockar mellan processorerna har också jämförts. Det finns även en praktisk del i projektet där en demo har utvecklats för att visa en fungerande kommunikation mellan processorer som använder funktionaliteten för exklusiv åtkomst till den gemensamma bussen. Den teoretiska delen av projektet som innehåller jämförelserna resulterar i bra jämförelser som kan användas när nya multiprocessorsystem utvecklas. Demon som har utvecklats i detta projekt misslyckades med att klara av kravet kring att ha ett fullt fungerande lås. Detta problemet kan lösas i framtiden ifall ny hårdvara utvecklas.

A área de pesquisa e prototipagem de soluções para Sistemas de Potência compartilha, com outras áreas da engenharia, vários problemas relacionados a software, principalmente, os seus custos e o seu tempo de desenvolvimento. Mais especificamente, nas aplicações com sistemas embarcados e dispositivos computacionais em tempo real, a presença de fatores como a complexidade dos algoritmos, os requisitos críticos de desempenho e as restrições impostas pelo hardware da aplicação, fazem com que o desenvolvimento do software evolua de forma muito lenta. Finalmente, quando um projeto está terminado, seu software já é obsoleto ou completamente incompatível para uso em novos projetos, com um hardware novo. Esse trabalho apresenta uma possível solução a esses problemas, por meio de um arcabouço de software para aplicações em tempo real. Através de uma metalinguagem de descrição de fluxos de dados baseada em blocos, e de ferramentas de compilação e interpretação, esse arcabouço permite abstrair o projeto, a implementação e os testes da aplicação, do desenvolvimento das demais partes do dispositivo, favorecendo um projeto sistemático em módulos, o futuro reuso de códigos, a fácil manutenção de algoritmos e a execução de testes cruzados, entre plataformas, com previsibilidade de resultados. O arcabouço foi elaborado e testado em um cenário de Sistemas de Potência, com a criação de um relé digital de proteção contra sobrecorrentes, com aquisição de dados via barramento de processo da norma IEC 61850. Entretanto, toda a metodologia desse trabalho pode ser aplicada a qualquer outra área correlata, mediante a extensão de sua metalinguagem. / The research and prototype area for Power System solutions share, among other engineering disciplines, several problems concerning software, mainly their developing time and costs. More specifically, in embedded system and real time computing devices applications, the presence of factors, such as the algorithm complexity, the critical performance requirements and other restrictions imposed by the application hardware, makes the software development to slowly evolve. Finally, when a project is over, its software is already obsolete or completely incompatible for use in other projects, with a new hardware. This work presents a possible solution to these problems, through a software framework for real time applications in Power Systems. Through a block based data stream description metalanguage, and compiling and interpreting tools, this framework allows the application design, implementation and testing procedures to be abstracted from the development of other device parts, permitting a systematic and modular project, the code reuse in the future, easy algorithm maintenance and the execution of cross-platforms tests with predictable results. The framework was created and tested in Power System scenarios, especially in the construction of a digital protection overcurrent relay, with data acquisition through the IEC 61850 process bus. However, the entire methodology of this study could be applied to any other related area, by extending its metalanguage with the appropriate building blocks.

Este trabalho apresenta uma implementação de VPN utilizando-se dos circuitos reprogramáveis do tipo FPGA (Field Programmable Gate Array) que são a base da computação reconfigurável. VPNs utilizam criptografia para permitir que a comunicação seja privada entre as partes. Assim, todo o custo computacional decorrente desta prática é executado em nível de hardware, procurando-se atingir um alto desempenho e voltado para as aplicações de sistemas embutidos. O uso desta solução, VPN por hardware, será na interligação de um robô (em desenvolvimento no Laboratório de Computação Reconfigurável - LCR do Instituto de Ciências Matemáticas e de Computação da Universidade de São Paulo) ao seu servidor de configuração e tarefas, através de linhas privadas. O emprego de uma VPN em robótica permitirá a utilização de um sistema de comunicação, com ou sem fio, e toda a infra-estrutura da Internet para a comunicação com o robô (e no futuro entre os robôs) a qualquer distância de forma segura e confiável. O hardware reconfigurável utilizado para a VPN deste trabalho proporciona flexibilidade no modo de implementação, possibilitando que o sistema seja adequado para satisfazer situações que exijam alto desempenho. Além disso, a arquitetura proposta possibilita que parte das operações sejam executadas em software (no caso, foi utilizado o sistema operacional ?Clinux e ferramentas para se estabelecer a VPN) e parte das operações executadas em hardware (um coprocessador criptográfico AES). As principais ferramentas de software são o conjunto ipsec-tools que foram desenvolvidas para serem executadas com o IPSec nativo do Kernel e devidamente portadas para o ?Clinux / This work designs a system that implements a VPN using FPGA (Field Programmable Gate Array) reprogrammable circuits, which are the basis of reconfigurable computing. VPNs use cryptography to allow private communication between parts. In this manner, the computational cost of the cryptography is handled by the hardware, achieving great performance and allowing its usage on embedded systems applications. The system proposed in this thesis has been used to establish secure communication between a PC and a mobile robot (that is in development at Reconfigurable Computing Laboratory - LCR of Institute of Mathematics and Computer Science of Univesity of São Paulo). The use of VPN in robotics will allow a communication, either wired or wireless, using Internet?s infrastructure with the robot (and in the future among robots), in a secure and trustable manner. The reconfigurable hardware used in this work allows flexibility in the implementation, making possible its usage in situations that requires high performance. Furthermore, the proposed architecture allows part of applications executing in software (using ?Clinux operating system and tools to establish the VPN) and other parts in hardware (a cryptographic coprocessor AES). The main software tools are the ipsec-tools that were developed to execute with native Kernel IPSec?s implementation and were properly ported to ?Clinux