<p>Embedded systems are microprocessor-based systems that cover a large range of computer systems from ultra small computer-based devices to large systems monitoring and controlling complex processes. The particular constraints that must be met by embedded systems, such as timeliness, resource-use efficiency, short time-to-market and low cost, coupled with the increasing complexity of embedded system software, demand technologies and processes that will tackle these issues. An attractive approach to manage the software complexity, increase productivity, reduce time to market and decrease development costs, lies in the adoption of the component based software engineering (CBSE) paradigm. The specific characteristics of embedded systems lead to important design issues that need to be addressed by a component model. Consequently, a component model for development of embedded systems needs to systematically address extra-functional system properties. The component model should support predictable system development and as such guarantee absence or presence of certain properties. Formal methods can be a suitable solution to guarantee the correctness and reliability of software systems.</p><p> </p><p>Following the CBSE spirit, in this thesis we introduce the ProCom component model for development of distributed embedded systems. ProCom is structured in two layers, in order to support both a high-level view of loosely coupled subsystems encapsulating complex functionality, and a low-level view of control loops with restricted functionality. These layers differ from each other in terms of execution model, communication style, synchronization etc., but also in kind of analysis which are suitable. To describe the internal behavior of a component, in a structured way, in this thesis we propose REsource Model for Embedded Systems (REMES) that describes both functional and extra-functional behavior of interacting embedded components. We also formalize the resource-wise properties of interest and show how to analyze such behavioral models against them.</p> / PROGRESS

<p>In a system like a Scania heavy duty truck, faultcodes (DTCs) are generated and stored locally in the ECUs when components, e.g. sensors or actuators, malfunction. Tests are run periodically to detect failure in the system. The test results are processed by the diagnostic system that tries to isolate the faulty components and set local faultcodes.</p><p>Currently, in a Scania truck, local diagnoses are only based on local diagnostic information, which the DTCs are based upon. The diagnosis statement can, however, be more complete if diagnoses from other ECUs are considered. Thus a system that extends the local diagnoses by exchanging diagnostic information between the ECUs is desired. The diagnostic information to share and how it should be done is elaborated in this thesis. Further, a model of distributed diagnosis is given and a few distributed diagnostic algorithms for transmitting and receiving diagnostic information are presented.</p><p>A basic idea that has influenced the project is to make the diagnostic system scalable with respect to hardware and thereby making it easy to add and remove ECUs. When implementing a distributed diagnostic system in networked real-time embedded systems, technical problems arise such as memory handling, process synchronization and transmission of diagnostic data and these will be discussed in detail. Implementation of a distributed diagnostic system is further complicated due to the fact that the isolation process is a non deterministic job and requires a non deterministic amount of memory.</p>

<p>Systems controlled by embedded computers become indispensable in our lives and can be found in avionics, automotive industry, home appliances, medicine, telecommunication industry, mecatronics, space industry, etc. Fast, accurate and flexible performance estimation tools giving feedback to the designer in every design phase are a vital part of a design process capable to produce high quality designs of such embedded systems.</p><p>In the past decade, the limitations of models considering fixed task execution times have been acknowledged for large application classes within soft real-time systems. A more realistic model considers the tasks having varying execution times with given probability distributions. No restriction has been imposed in this thesis on the particular type of these functions. Considering such a model, with specified task execution time probability distribution functions, an important performance indicator of the system is the expected deadline miss ratio of tasks or task graphs.</p><p>This thesis proposes two approaches for obtaining this indicator in an analytic way. The first is an exact one while the second approach provides an approximate solution trading accuracy for analysis speed. While the first approach can efficiently be applied to monoprocessor systems, it can handle only very small multi-processor applications because of complexity reasons. The second approach, however, can successfully handle realistic multiprocessor applications. Experiments show the efficiency of the proposed techniques.</p> / Report code: LiU-Tek-Lic-2002:58.

<p>Embedded systems are used in a wide spectrum of applications ranging from home appliances and mobile devices to medical equipment and vehicle controllers. They are typically characterized by their real-time behavior and many of them must fulfill strict requirements on reliability and correctness.</p><p>In this thesis, we concentrate on aspects related to modeling and formal verification of realtime embedded systems.</p><p>First, we define a formal model of computation for real-time embedded systems based on Petri nets. Our model can capture important features of such systems and allows their representations at different levels of granularity. Our modeling formalism has a welldefined semantics so that it supports a precise representation of the system, the use of formal methods to verify its correctness, and the automation of different tasks along the design process.</p><p>Second, we propose an approach to the problem of formal verification of real-time embedded systems represented in our modeling formalism. We make use of model checking to prove whether certain properties, expressed as temporal logic formulas, hold with respect to the system model. We introduce a systematic procedure to translate our model into timed automata so that it is possible to use available model checking ools. Various examples, including a realistic industrial case, demonstrate the feasibility of our approach on practical applications.</p>

<p>Web servers are increasingly being used in embedded devices as a communication medium. As more systems connect to the Internet, the need for security is increasing. The Transport Layer Protocol (TLS) is the successor of Secure Socket Layer (SSL) and provides security in almost all secure Internet transactions. This thesis aims to investigate if TLS can be adapted to embedded systems without sacrificing much of the system resources available.</p><p>A literature study and an implementation of TLS have been performed. The literature study determined resource intense parts of TLS, hardware support as well as export laws applicable to TLS. The different parts of the implementation are evaluated on an ARM7-core to determine the execution times. The results for the symmetric ciphers AES and 3DES are compared when measuring execution times using both software and hardware solutions. The size of the implementation is also measured.</p><p>TLS was shown to be able to integrate on embedded systems. Practical issues such as certificates and keys can be solved in different ways to suite the target environment. The largest remaining issue is the execution time for asymmetric algorithms. The results that are provided clearly illustrates that the RSA used for key exchange is very time consuming. Alternative solutions to gain better performance are discussed.</p>

<p>Embedded systems are used in many technical products of today. The tendency also points to the fact that they are in many ways becoming more and more complex as technology advances. Systems like advanced avionics, air bags, ABS brakes or any real-time embedded system requires reliability, correctness and timeliness. This puts hard pressure on designers, analyzers and developers. The need for high performance and non failing systems has therefore led to a growing interest in modeling and verification of component-based embedded systems in order to reduce costs and simplify design and development. The solution proposed by the Embedded Systems Lab at Linköping University is the modeling language PRES+, Petri Net based Representation for Embedded Systems.</p><p>PRES+ models are then translated into timed automata, TA, which is used by the UPPAAL verification tool. To be able to verify timing properties the translated TA model must be instrumented with certain timers, called clocks. These clocks must be reset in a manner reflected by the property to be verified.</p><p>This thesis will provide a solution to the problem and also give the reader necessary information in order to understand the theoretical background needed. The thesis will also show the reader the importance of modeling and time verification in the development of embedded systems. A simple example is used to describe and visualize the benefit regarding real-time embedded systems as well as the importance of the ability to verify these systems.</p><p>The conclusion drawn stresses the fact that high development costs, possible gain of human lives and the problems in developing complex systems only emphasize the need for easy to handle and intuitive verification methods.</p>

<p>DUE TO COPYRIGHT-RESTRICTIONS THIS PAPER IS NOT AVAILABLE FOR DOWNLOAD!</p><p>The thesis describes a system which communicates in real time with data loggers. The system has been streamlined and integrated with existing application so that each user can get a graphical presentation in real time on what has been sent to and from the units. The user interface and communication has been designed to be robust, user friendly, secure and offer functionality that yields the users of the system added value. The system is flexible from the design perspective and is low maintenance.</p>

La conception des systèmes sur puce s'appuie souvent sur SystemC/C++ qui permet des descriptions architecturales et comportementales à différents niveaux d'abstraction. D'autres approches se tournent vers l'automatisation de l'assemblage de plates-formes dites virtuelles (format IP-Xact). L'utilisation des techniques de l'ingénierie des modèles est une voie plus récente avec des profils UML tels que MARTE. Dans cette thèse, nous étudions les possibilités de modélisation de ces différentes approches et les passerelles disponibles entre elles. Motivés par la disponibilité de modèles SystemC et opar les facilités offertes par MARTE, nous traitons de l'export des modèles SystemC. Au-delà de la simple conversion entre formats, nous décrivons la mise en œuvre d'une passerelle entre l'implémentation SystemC d'un design et sa version modèle dans le format IP-Xact. La représentation IP-Xact peut ensuite être de nouveau transformée en modèles MARTE par des outils déjà existants. Nous présentons les travaux connexes avant d'exposer notre vision et sa réalisation au travers de l'outil SCiPX (SystemC to IP-Xact). Dans un second temps, nous présentons plus en détail les possibilités permises par le profil UML-MARTE, son modèle de temps et le langage de spécifications de contraintes temporelles CCSL. Nous abordons les problèmes liés à la modélisation de protocoles à différents niveaux d'abstraction et plus spécialement ceux posés par le raffinement entre les niveaux TLM et RTL. Cette étude met en évidence des insuffisances de CCSL concernant la spécification des priorités. Nous proposons un enrichissement de CCSL pour lui permettre de manipuler ce concept de priorité.

To improve safety, reliability, and efficiency of automotive vehicles and other technical applications, embedded systems commonly use fault diagnosis consisting of fault detection and isolation. Since many systems are constructed as distributed embedded systems including multiple control units, it is necessary to perform global fault isolation using for example a central unit. However, the drawbacks with such a centralized method are the need of a powerful diagnostic unit and the sensitivity against disconnections of this unit. Two alternative methods to centralized fault isolation are presented in this thesis. The first method performs global fault isolation by a istributed sequential computation. For a set of studied systems, themethod gives, compared to a centralizedmethod, amean reduction inmaximumprocessor load on any unitwith 40 and 70%for systems consisting of four and eight units respectively. The second method instead extends the result of the local fault isolation performed in each unit such that the results are globally correct. By only considering the components affecting each specific unit, the extended result in each agent is kept small. For a studied automotive vehicle, the second method gives, compared to a centralized method, a mean reduction in the sizes of the results and the maximum processor load on any unit with 85 and 90% respectively. To perform fault diagnosis, diagnostic tests are commonly used. If the additional evaluation of tests can not improve the fault isolation of a component then the component is ready. Since the evaluation of a test comes with a cost in for example computational resources, it is valuable to minimize the number of tests that have to be evaluated before readiness is achieved for all components. A strategy is presented that decides in which order to evaluate tests such that readiness is achieved with as few evaluations of tests as possible. Besides knowing how fault diagnosis is performed, it is also interesting to assess the effect that fault diagnosis has on for example safety. Since fault tree analysis often is used to evaluate safety, this thesis contributes with a systematic method that includes the effect of fault diagnosis in fault trees. The safety enhancement due to the use of fault diagnosis can thereby be analyzed and quantified.

This thesis addresses the issues of data management in embedded systems' software. The complexity of developing and maintaining software has increased over the years due to increased availability of resources, e.g., more powerful CPUs and larger memories, as more functionality can be accommodated using these resources. In this thesis, it is proposed that part of the increasing complexity can be addressed by using a real-time database since data management is one constituent of software in embedded systems. This thesis investigates which functionality a real-time database should have in order to be suitable for embedded software that control an external environment. We use an engine control software as a case study of an embedded system. The findings are that a real-time database should have support for keeping data items up-todate, providing snapshots of values, i.e., the values are derived from the same system state, and overload handling. Algorithms are developed for each one of these functionalities and implemented in a real-time database for embedded systems. Performance evaluations are conducted using the database implementation. The evaluations show that the real-time performance is improved by utilizing the added functionality. Moreover, two algorithms for examining whether the system may become overloaded are also outlined; one algorithm for off-line use and the second algorithm for on-line use. Evaluations show the algorithms are accurate and fast and can be used for embedded systems.