Debugging is an important phase in the embedded software development cycle because of its high proportion in the overall cost in the product development. Debugging is difficult for real-time applications as such programs are time-sensitive and must meet deadlines in often a resource constrained environment. A common approach for real-time systems is to monitor the execution instead of stepping through the program, because stepping will usually violate all deadline constraints. We consider a time-triggered approach for program monitoring at runtime, resulting in bounded and predictable overhead. In time-triggered execution monitoring, a monitor runs as a separate process in parallel with an application program and samples the program's state periodically to evaluate a set of properties. Applying this technique in computing systems, results in bounded and predictable overhead. However, the time-triggered approach can have high overhead depending on the granularity of the monitoring effort. To reduce this overhead, we instrument the program with markers that will require to sample less frequently and thus reduce the overhead. This leads to interesting problems of (a) where to place the markers in the code and (b) how to manipulate the markers. While related work investigates the first part, in this work, we investigate the second part. We investigate different instrumentation schemes and propose two new schemes based on bitvectors that significantly reduce the overhead for time-triggered execution monitoring. Time-triggered execution monitoring suffers from several drawbacks such as; the time-triggered monitor requires certain synchronization features at the operating system level and may suffer from various concurrency and synchronization dependencies in a real-time setting. Furthermore, the time-triggered execution monitoring scheme requires the embedded environment to provide multi-tasking features. To address the aforementioned problems, we propose a new method called time-triggered self-monitoring, where the program under inspection is instrumented, so that it self-samples its state in a periodic fashion without requiring assistance from an external monitor or an internal timer. The experimental results show that a time-triggered self-monitored program performs significantly better in terms of execution time, binary code size, and context switches when compared to the same program monitored by an external time-triggered monitor.

Cette thèse expose nos travaux de certification d'une partie d'un programme C/C++ nommé SimSoC (Simulation of System on Chip), qui simule le comportement d'archi- tectures basées sur des processeurs tels que ARM, PowerPC, MIPS ou SH4. Un simulateur de System on Chip peut être utilisé pour developper le logiciel d'un système embarqué spécifique, afin de raccourcir les phases des développement et de test, en particulier quand la vitesse de simulation est réaliste (environ 100 millions d'instructions par seconde par cœur dans le cas de SimSoC). Les réductions de temps et de coût de développement obtenues se traduisent par des cycles de conception interactifs et rapides, en évitant la lourdeur d'un système de développement matériel. SimSoC est un logiciel complexe, comprenant environ 60 000 de C++, intégrant des parties écrites en SystemC et des optimisations non triviales pour atteindre une grande vitesse de simulation. La partie de SimSoC dédiée au processeur ARM, l'un des plus répandus dans le domaine des SoC, transcrit les informations contenues dans un manuel épais de plus de 1000 pages. Les erreurs sont inévitables à ce niveau de complexité, et certaines sont passées au travers des tests intensifs effectués sur la version précédente de SimSoC pour l'ARMv5, qui réussissait tout de même à simuler l'amorçage complet de linux. Un problème critique se pose alors : le simulateur simule-t-il effectivement le matériel réel ? Pour apporter des éléments de réponse positifs à cette question, notre travail vise à prouver la correction d'une partie significative de SimSoC, de sorte à augmenter la confiance de l'utilisateur en ce similateur notamment pour des systèmes critiques. Nous avons concentré nos efforts sur un composant particulièrement sensible de SimSoC : le simulateur du jeu d'instructions de l'ARMv6, faisant partie de la version actuelle de SimSoC. Les approches basées sur une sémantique axiomatique (logique de Hoare par exemple) sont les plus répandues en preuve de programmes impératifs. Cependant, nous avons préféré essayer une approche moins classique mais plus directe, basée sur la sémantique opérationnelle de C : cela était rendu possible en théorie depuis la formalisation en Coq d'une telle sémantique au sein du projet CompCert et mettait à notre disposition toute la puissance de Coq pour gérer la complexitité de la spécification. À notre connaissance, au delà de la certification d'un simulateur, il s'agit de la première expérience de preuve de correction de programmes C à cette échelle basée sur la sémantique opérationnelle. Nous définissons une représentation du jeu d'instruction ARM et de ses modes d'adressage formalisée en Coq, grâce à un générateur automatique prenant en entrée le pseudo-code des instructions issu du manuel de référence ARM. Nous générons égale- ment l'arbre syntaxique abstrait CompCert du code C simulant les mêmes instructions au sein de Simlight, une version allégée de SimSoC. À partir de ces deux représentations Coq, nous pouvons énoncer et démontrer la correction de Simlight, en nous appuyant sur la sémantique opérationnelle définie dans CompCert. Cette méthodologie a été appliquée à au moins une instruction de chaque catégorie du jeu d'instruction de l'ARM. Au passage, nous avons amélioré la technologie disponible en Coq pour effectuer des inversions, une forme de raisonnement utilisée intensivement dans ce type de situation.

This thesis explores the execution of object-oriented code on an embedded Java platform. It presents established and derives new approaches for the implementation of high-level object-oriented functionality and commonly expected system services. The goal of the developed techniques is the provision of the architectural base for an efficient and predictable code execution. The research vehicle of this thesis is the Java-programmed SHAP platform. It consists of its platform tool chain and the highly-customizable SHAP bytecode processor. SHAP offers a fully operational embedded CLDC environment, in which the proposed techniques have been implemented, verified, and evaluated. Two strands are followed to achieve the goal of this thesis. First of all, the sequential execution of bytecode is optimized through a joint effort of an optimizing offline linker and an on-chip application loader. Additionally, SHAP pioneers a reference coloring mechanism, which enables a constant-time interface method dispatch that need not be backed a large sparse dispatch table. Secondly, this thesis explores the implementation of essential system services within designated concurrent hardware modules. This effort is necessary to decouple the computational progress of the user application from the interference induced by time-sharing software implementations of these services. The concrete contributions comprise a spill-free, on-chip stack; a predictable method cache; and a concurrent garbage collection. Each approached means is described and evaluated after the relevant state of the art has been reviewed. This review is not limited to preceding small embedded approaches but also includes techniques that have proven successful on larger-scale platforms. The other way around, the chances that these platforms may benefit from the techniques developed for SHAP are discussed.

Apart from recognition accuracy, decoding speed and vocabulary size, another point of consideration when developing a practical ASR application is the adaptability of the system. An ASR system is more useful if it can cope with changes that are introduced by users, for example, new words and new grammar rules. In addition, the system can also automatically update the underlying knowledge sources, such as language model probabilities, for better recognition accuracy. Since the knowledge sources need to be adaptable, it is in°exible to statically combine them. It is because on-line modi¯cation becomes di±cult once all the knowledge sources have been combined into one static search space. The second objective of the thesis is to develop an algorithm which allows dynamic integration of knowledge sources during decoding. In this approach, each knowledge source is represented by a weighted ¯nite state transducer (WFST). The knowledge source that is subject to adaptation is factorized from the entire search space. The adapted knowledge source is then combined with the others during decoding. In this thesis, we propose a generalized dynamic WFST composition algorithm, which avoids the creation of non- coaccessible paths, performs weight look-ahead and does not impose any constraints to the topology of the WFSTs. Experimental results on Wall Street Journal (WSJ1) 20k- word trigram task show that our proposed approach has a better word accuracy versus real-time factor characteristics than other dynamic composition approaches.

Apart from recognition accuracy, decoding speed and vocabulary size, another point of consideration when developing a practical ASR application is the adaptability of the system. An ASR system is more useful if it can cope with changes that are introduced by users, for example, new words and new grammar rules. In addition, the system can also automatically update the underlying knowledge sources, such as language model probabilities, for better recognition accuracy. Since the knowledge sources need to be adaptable, it is in°exible to statically combine them. It is because on-line modi¯cation becomes di±cult once all the knowledge sources have been combined into one static search space. The second objective of the thesis is to develop an algorithm which allows dynamic integration of knowledge sources during decoding. In this approach, each knowledge source is represented by a weighted ¯nite state transducer (WFST). The knowledge source that is subject to adaptation is factorized from the entire search space. The adapted knowledge source is then combined with the others during decoding. In this thesis, we propose a generalized dynamic WFST composition algorithm, which avoids the creation of non- coaccessible paths, performs weight look-ahead and does not impose any constraints to the topology of the WFSTs. Experimental results on Wall Street Journal (WSJ1) 20k- word trigram task show that our proposed approach has a better word accuracy versus real-time factor characteristics than other dynamic composition approaches.

Apart from recognition accuracy, decoding speed and vocabulary size, another point of consideration when developing a practical ASR application is the adaptability of the system. An ASR system is more useful if it can cope with changes that are introduced by users, for example, new words and new grammar rules. In addition, the system can also automatically update the underlying knowledge sources, such as language model probabilities, for better recognition accuracy. Since the knowledge sources need to be adaptable, it is in°exible to statically combine them. It is because on-line modi¯cation becomes di±cult once all the knowledge sources have been combined into one static search space. The second objective of the thesis is to develop an algorithm which allows dynamic integration of knowledge sources during decoding. In this approach, each knowledge source is represented by a weighted ¯nite state transducer (WFST). The knowledge source that is subject to adaptation is factorized from the entire search space. The adapted knowledge source is then combined with the others during decoding. In this thesis, we propose a generalized dynamic WFST composition algorithm, which avoids the creation of non- coaccessible paths, performs weight look-ahead and does not impose any constraints to the topology of the WFSTs. Experimental results on Wall Street Journal (WSJ1) 20k- word trigram task show that our proposed approach has a better word accuracy versus real-time factor characteristics than other dynamic composition approaches.

Apart from recognition accuracy, decoding speed and vocabulary size, another point of consideration when developing a practical ASR application is the adaptability of the system. An ASR system is more useful if it can cope with changes that are introduced by users, for example, new words and new grammar rules. In addition, the system can also automatically update the underlying knowledge sources, such as language model probabilities, for better recognition accuracy. Since the knowledge sources need to be adaptable, it is in°exible to statically combine them. It is because on-line modi¯cation becomes di±cult once all the knowledge sources have been combined into one static search space. The second objective of the thesis is to develop an algorithm which allows dynamic integration of knowledge sources during decoding. In this approach, each knowledge source is represented by a weighted ¯nite state transducer (WFST). The knowledge source that is subject to adaptation is factorized from the entire search space. The adapted knowledge source is then combined with the others during decoding. In this thesis, we propose a generalized dynamic WFST composition algorithm, which avoids the creation of non- coaccessible paths, performs weight look-ahead and does not impose any constraints to the topology of the WFSTs. Experimental results on Wall Street Journal (WSJ1) 20k- word trigram task show that our proposed approach has a better word accuracy versus real-time factor characteristics than other dynamic composition approaches.

Ο σκοπός της παρούσας διπλωματικής εργασίας είναι να μελετηθεί με ποιον τρόπο μια εφαρμογή μπορεί να αξιοποιήσει την παρουσία πολλών επεξεργαστών σε ένα σύστημα. Το σύστημα προς μελέτη είναι το Festo MPS, το οποίο είναι ένα κατανεμημένο ενσωματωμένο σύστημα πραγματικού χρόνου, αποτελούμενο από τρεις υπομονάδες. Το σύστημα έχει υλοποιηθεί σε Real Time Java, μια επέκταση της Java, η οποία ανταποκρίνεται σε απαιτήσεις πραγματικού χρόνου. Η εφαρμογή εκτελείται σε μια Java Virtual Machine πραγματικού χρόνου, η οποία με τη σειρά της εκτελείται σε ένα λειτουργικό σύστημα τύπου Linux. Το κάθε επίπεδο έχει διάφορους μηχανισμούς έτσι ώστε να αξιοποιεί τους διαθέσιμους επεξεργαστές. Ερευνούνται τρόποι με τους οποίους ο προγραμματιστής μπορεί να διευκολυνθεί στο έργο του, γράφοντας αποδοτικότερο, μικρότερο και καθαρότερο παράλληλο κώδικα, καθώς και οι επιλογές, ώστε να καθορίζει ο ίδιος επακριβώς τον τρόπο εκτέλεσης, όταν αυτό απαιτείται. Τελικός στόχος είναι να εκτελεστεί μια προσομοίωση του συστήματος, όπου κάθε υπομονάδα θα εκτελείται σε διαφορετικό επεξεργαστή. Αυτό επιτυγχάνεται με τη βοήθεια των κλήσεων του λειτουργικού συστήματος μέσω Java Native Interface. / The purpose of this thesis is to study how an application can exploit many processors available in a system. The case study system is the Festo MPS, which is a distributed embedded real time system consisting of three subunits. The system has been implemented in Real Time Java, an extension of Java, which responds to real-time requirements. The application runs on a Real Time Java Virtual Machine, which in turn runs on a Linux type operating system. Each level has several mechanisms to utilize the available processors. There are explored ways in which the programmer can be facilitated in his work by writing more efficient, smaller and cleaner parallel code and also the options to set himself how the code will be executed when required. The ultimate goal is to run a simulation of the system where each subunit will run on its own processor. This is achieved through calls to the operating system through Java Native Interface.

Η ανάγκη για την έγκαιρη αντιμετώπιση καταστροφών στις μέρες μας αυξάνεται συνεχώς. Ο λόγος είναι ότι η συχνότητα των ηθελημένων καταστροφών (εμπρησμοί, τρομοκρατικές ενέργειες) έχει αυξηθεί. Ο σχεδιασμός και η παραγωγή συστημάτων ασφαλείας που θα εποπτεύουν ένα χώρο χωρίς να παραβιάζουν τα προσωπικά δεδομένα είναι ένα νέο πεδίο έρευνας. Ένα σημαντικό κομμάτι ενός τέτοιου συστήματος είναι η αναγνώριση φωτιάς μόνο με τη χρήση οπτικών αισθητήρων. Στη παρούσα διπλωματική εργασία μελετάμε διάφορες προηγούμενες τεχνικές αναγνώρισης φωτιάς και περιγράφουμε ένα επιθυμητό σύστημα. Στη συνέχεια παρουσιάζουμε τα κομμάτια του συστήματος που αναπτύξαμε και τα εργαλεία που χρησιμοποιήθηκαν, όπως το ασύρματο δίκτυο και τη βιβλιοθήκη ανοικτού λογισμικού OpenCv. Το σύστημά μας έχει στόχο να ειδοποιήσει ένα κέντρο ελέγχου για μία πιθανή εκδήλωση φωτιάς. Αυτό το πετυχαίνει επεξεργάζοντας τα δεδομένα που λαμβάνει από μία δικτυακή κάμερα και δημιουργώντας στιγμιότυπα που θα επιτρέψουν στους χειριστές του κέντρου να επαληθεύσουν την ύπαρξη της φωτιάς. Το σύστημα έχει τη δυνατότητα εκτός από την ασύρματη αποστολή των δεδομένων, να τα αποθηκεύσει τοπικά στη περίπτωση που δεν καταστεί δυνατή ή αποστολή, ώστε να ανακτηθούν αργότερα από το συνεργείο διάσωσης. / The need of prompt disaster relief actions is increasing rapidly today. The main reason is that the frequency of the intentional disasters (fires, terror acts) has increased. The design and production of unattended surveillance/alarm systems that respect the privacy and civil liberties of people is a new field of research. Fire detection using only video sensors is an integral component of such a system. In the present diploma thesis we study the various different approaches of video fire detection and we describe our systems' goals. Then we describe the main components of our system and the various tools that were used, such as the wireless network architecture and the open-source library OpenCv. The system suggested triggers an alarm and notifies a central station in the event of a fire break-out. This is carried through by processing data from an ip-camera and by creating a video with the frames that will allow the personnel at the station to verify the fire. The system also has the use of a "black box". If for any reason the communication is not possible, data is preserved until it is physically recuperated by the rescue team.

Σχεδίαση και ανάπτυξη ολοκληρωμένου συστήματος Τηλεχειρισμού και Τηλεελέγχου. Η σχεδίαση του συστήματος βασίζεται στον ισχυρό μικροεπεξεργαστή ATMega644PA της Atmel και όλος ο προγραμματισμός έγινε σε γλώσσα προγραμματισμού Assembly. Το σύστημα διαθέτει 8 ψηφιακές εξόδους (ON/OFF) και 8 ψηφιακές εισόδους (0-12 Volts). Το μικροϋπολογιστικό σύστημα διαθέτει επίσης module κινητής Τηλεφωνίας, μέσω του οποίου λαμβάνονται και αποστέλλονται, προκαθορισμένα μηνύματα, που αφορούν τον χειρισμό και τον έλεγχο των εξόδων και των εισόδων του. Στο σύστημα είναι διασυνδεδεμένο mini “embedded PC” με ειδικά σχεδιασμένο λειτουργικό σύστημα, βασισμένο στο Linux (Διανομή Debian). Στο υποσύστημα αυτό αναπτύχθηκε ιστοσελίδα σε γλώσσα προγραμματισμού ιστοσελίδων PHP. Ο διαπιστευμένος επισκέπτης της ιστοσελίδας αυτής έχει την δυνατότητα να χειριστεί-ελέγξει τις εξόδους-εισόδους του συστήματος. / Design and development of an integrated remote control and remote monitoring system. The system design is based into a powerful microprocessor Atmel's ATMega644PA and all the programming is written in the programming language, Assembly. The system provides 8 digital outputs (ON / OFF) and 8 digital inputs (0-12 Volts). The microcontroller has also a module system for mobile telephony through which, predefined messages are received and sent, related to the handling/ operation and control of its outputs and inputs. The system is interconnected with a mini "embedded PC" with specially designed operating system based on Linux (distribution Debian). A website was developed into this subsystem in the programming language for websites, PHP. The accredited visitor of this website is able to handle and control the inputs and the outputs of the system.