Spelling suggestions: "subject:"embedded systems"" "subject:"imbedded systems""
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Development and Experimental Evaluation of a CAN-to-TSN Gateway PrototypeKraljusic, Benjamin, Zahirovic, Nejla January 2024 (has links)
This thesis details the development and experimental evaluation of a Controller Area Network (CAN) to Time-Sensitive Networking (TSN) gateway. As modern vehicles incorporate increasingly complex functionalities, the traditional CAN system falls short in terms of data handling capacities and transmission speeds. This study explores the integration of CAN with TSN. Experimental setups evaluate various gateway forwarding strategies, which are different in the number of CAN frames encapsulated into a single TSN frame and the methods of this mapping, to assess their impact on system performance, including response times and bandwidth utilization. Through a series of controlled experiments, the gateway's performance is analyzed across different TSN switch configurations and additional network traffic scenarios to understand their effects on data transmission. The experimental evaluation, conducted within an unsynchronized network environment, proved that encapsulation and transmission of a single CAN frame over the TSN network most effectively minimizes end-to-end delays. However, this strategy results in poor network bandwidth utilization due to significant TSN frame overhead, and it should be carefully considered when dealing with CAN domains that handle a large number of messages, especially with larger payloads that are introduced with CAN Flexible Data-Rate (FD). Additionally, we investigated the use of Time-Aware Shaper (TAS) and Weighted Round Robin (WRR) scheduling under unsynchronized conditions in TSN. Our findings highlight the advantages of employing WRR as a traffic scheduler, offering enhanced performance in scenarios lacking synchronization between network devices. Challenges were identified with TAS, which may arise from its dependence on precise time synchronization.
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Distributed Functionality Allocation to Multi-core Computational NodesHrustic, Enesa, Kreho, Dzenan January 2024 (has links)
In previous years, there has been an increase in demand for new functionalities in the automotive and machinery domains. To meet these requirements, deploying more powerful single-core Electronic Control Units (ECUs) became necessary. However, single-cores may soon reach their limit in satisfying current performance and functionality needs. A promising solution lies in the use of multi-core ECUs. Although multi-cores are widely used in consumer electronics, their application in real-time systems has not yet been fully realized. This challenge stems from the fact that real-time systems impose strict timing requirements, making the transition to using multi-cores in real-time applications more challenging. This thesis investigates and analyzes methodologies to ensure that multi-core systems meet their real-time requirements. An extensive review of the state of the art is performed to determine different analysis approaches. Moreover, the thesis revises existing analyses, proposing refinements to enhance their correctness. Furthermore, the analyses are expanded to preemptive scheduling, as the majority of related work considers non-preemptive scheduling for multi-cores. Another scope of this thesis considers core interconnects. With that said, this thesis investigates two types of interconnects: bus and crossbar. An extensive analysis with evaluation is provided to compare the two. Furthermore, in order to investigate arbitration among cores for shared resources, two interconnect arbitration policies are used: First Come First Served and Round Robin. Theoretical considerations are laid out, and the evaluation of proposed approaches is presented. The proposed theories are tested against a typical automotive benchmarks and an industrial use case provided by Volvo Construction Equipment. The work culminates in assembling the analyses in a software tool developed in the C programming language. The tool is capable of running the aforementioned analyses and providing output based on the feasibility of the task set provided as input. Finally, the thesis discusses possibilities for refining the performed work and provides directions for future work.
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MINIMIZING INTER-CORE DATA-PROPAGATION DELAYS IN PARTITIONED MULTI-CORE REAL-TIME SYSTEMS USING SCHEDULING HEURISTICSÅberg, Emil January 2021 (has links)
In the field of embedded systems, computers embedded into machines ranging from microwaveovensto assembly lines impact the physical world. They do so under tight real-time constraintswith ever-increasing demand for computing power and performance. Development of higher speedprocessors have been hampered by diminishing returns on power consumption as clock frequency isfurther increased. For this reason, today, embedded processor development is instead moving towardfurther concurrency with multi-core processors being considered more and more every day. Withparallelism comes challenges, such as interference caused by shared resources. Contention betweenprocessor cores, such as shared memory, result in inter-core interference which is potentially unpredictableand unbounded. The focus of this thesis is placed on minimizing inter-core interferencewhile meeting local task timing requirements by utilizing scheduling heuristics. A scheduling heuristicis designed and a prototype scheduler which implements this algorithm is developed. Thescheduler is evaluated on randomly generated test cases, where its ability to keep inter-core datapropagationdelays low across different core counts and utilization values was evaluated. The algorithmis also compared with constraint programming in a real world industrial test case. Theobtained results show that the algorithm can produce schedules with low inter-core delays in a veryshort time, although not being able to optimize them fully compared to constraint programming.
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Hi-Fi audio and machine learning implementation in MIDI-controller prototype developmentRyttermalm, Linus January 2021 (has links)
Musical Instrument Digital Interface(MIDI) is a technical standard that specifies acommunication protocol for digital instrument data and is mainly used by computers,synthesizers and electronic keyboards. A MIDI controller is any hardware or software that cangenerate and transfer MIDI data to a MIDI device, usually to play a sound or change controlparameters within a music software. An important property of a MIDI controller is to intuitively go from idea to execution withminimal effort. In this respect machine learning has really opened up for new musicalexpressions within musical devices. During this project a prototype with an implementedmachine learning algorithm which could deliver a wider array of functionality with a simplerinterface. The device developed should also be able to play Hi-Fi audio with at least 96 kHzsampling frequency and 24-bit bit-resolution. Without professional measurement equipment audio quality could not be completelymeasured. However, the development of the completed prototype as a whole was successful. Drawn symbols could be classified with a 70% accuracy, Hi-Fi audio could be played and MIDI-messages could be sent over USB to a music software.
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Embedded GUI Library DevelopmentDreborg, Sofia January 2022 (has links)
This project aimed to create a simple open-source embedded graphical user interface library that could be used on more or less any microcontroller platform. The programming language was intended to be C++ for the GUI but as the project evolved C was chosen above C++. This was a decision based primarily on the fact that STM's development environment, STMCubeIDE, is less compatible with C++. The IDE offers great hardware support which in the end was more important than the advantages given by C++. The hardware used in this project was an STM32F469 microcontroller. It has an ARM CortexM4 processor core and 2 Mbyte of flash memory and 384 Kbytes of RAM. Wrapper functions for the Board Support Package, BSP, were written as a part of the library to allow easy access tothe BSP needed for the hardware configuration. The first part of the project goal was achieved, a simple GUI library was created. The resulting GUI library supports user interaction through buttons, it can display the current time andvisualizes given data in graphs. The graph function can display the data live, as a scatter plot, a bar plot and a line plot. The library also supports an alarm function that allows the user to decide what will happen after the alarm time is up. However, even though the GUI library was written to be device-independent, the product has not been tested on other platforms. For further development, this GUI library could be tested on another microcontroller. This would provide answers to how much software changes are needed to make the product as hardwareindependent as possible. To make the library lighter and faster, there is a possibility of optimizing the GUI core.
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Hardware software partitioning : a reconfigurable and evolutionary computing approachHarkin, James January 2001 (has links)
No description available.
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Embedded warning systems in C language compare with JavaAbbass Nagim, Kem January 2003 (has links)
No description available.
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Embedded warning systems in C language compare with JavaAbbass Nagim, Kem January 2003 (has links)
No description available.
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Security and Control System for fluid in a tankKvist, Johan January 2007 (has links)
<p>This rapport describes how a security and control system has been developed for moveable diesel tanks. Enormous amounts of diesel in Sweden are stolen every year and the tank that is most vulnerable is the moveable tank in other words tanks that can be moved around with diesel inside.</p><p>The report proposes methods how to measure fluid amount in a tank and how to measure if diesel is disappearing from the tank.</p><p>The report also describes a tank monitoring system prototype.</p>
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The Design of a Fully Autonomous RC RacecarBlack, Richard A. 10 1900 (has links)
This paper discusses the design of an autonomous remote-controlled racecar to play a one-on-one match of capture the flag. A competition was held, and the results are presented and conclusions are made.
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