This thesis presents the design, implementation, and fabrication of a pattern-guided equalizer in a 65nm CMOS process. By counting the occurrence of 6 out of 16 4-bit patterns in the received data and utilizing their spectral content, the signal is equalized separately at fN and fN/2, where fN is half the bit rate. The design was packaged using a 64 pin Quad Flat No leads (QFN) package. Two different channels were used and the equalizer was able to open the eye for both 13dB and 17dB of attenuation at the Nyquist frequency. The adaptation performance was determined by measuring the vertical and horizontal eye openings for all possible equalizer coefficients. Measured results at 6Gb/s confirm that the adaptation engine opens a closed eye to within 2.6% of optimal vertical opening and 7% of optimal horizontal eye opening while consuming 16.8mW from a 1.2V supply.

A 4-PAM/2-PAM receiver analog front-end (AFE) targeting 20GSymbol/s for use with coaxial cable channels is presented. Behavioral simulations incorporate a transmitter, scalable coaxial cable model, and the proposed receiver architecture, targeting cable loss of 32dB at 10GHz. To accommodate links of varying lengths, the AFE includes a variable-gain amplifier (VGA) and analog peaking equalizer. The input preamplifier is important for achieving the required input sensitivity. A DC bias current is introduced through the feedback resistor in a conventional shunt-shunt feedback nMOS transimpedance amplifier (TIA) to level-shift the output, obviating a following level-shifting stage. The fabricated AFE occupies 0.89mm2 in a 90-nm CMOS process and dissipates 138mW from a 1.3V supply. The AFE amplifies and opens the eye pattern of a 20-Gb/s 2-PAM data stream transmitted over coaxial cable with 7.5dB loss at 10GHz.

The objective of this research is to investigate low-complexity, efficient electronic equalizers to increase the data rate and possibly extend the reach of multi-mode fiber (MMF) links. Specifically, we begin by baselining the performance limits of conventional receivers. A robust, in-house mode solver was developed as part of this research and is currently being used by one of the largest fiber manufacturers in their internal R &D work. A detailed performance assessment of the impact of decision feedback equalizers has been conducted using an extensive model of the installed fiber base. The finite-length DFE results were instrumental in influencing the IEEE 802.3aq standardization effort. In particular, we were able to achieve a reach of 220m but the original goal of 300m was unattainable on 99% of the installed fiber base using DFEs of moderate complexity. A low-cost equalizer that has excellent performance, the bi-directional DFE, was applied to the MMF channel for the first time. The performance of the infinite-length BiDFE was characterized without any constraints on the signal-to-noise ratio and on the receiver front-end, as has been previously done in the literature. A new joint optimization technique that helps the finite-length BiDFE perform significantly better than the infinite-length DFE was developed. It was shown that given a finite number of filter coefficients, the BiDFE utilizes them better than the conventional DFE. Furthermore, a reach of 350-400m at a data rate of 10 Gbps was shown to be feasible with equalizers of complexity similar to that currently available. A multiple-input, multiple-output (MIMO) characterization of the MMF channel was developed through the simultaneous use of both center and offset launch together with the two-segment photo-detector. The potential benefit of MIMO processing for MMF links was demonstrated by computing Shannon capacity bounds. It was established that the 2x2 MIMO channel performs about 1.4 dBo better than the conventional 1x1 link at 10 Gbps with practical joint launch. The MIMO scheme still has a performance improvement of 1dBo at 20 Gbps thereby indicating that 20 Gbps transmission is feasible. Performance evaluation of multi-km MMF links was conducted using a comprehensive model that accounts for mode coupling effects. It was determined that ignoring mode coupling can result in under-estimation of the optimum DFE penalty by as much as 1~dBo for 1km links.

The charge equalization for the battery power source with battery power modules (BPMs) in series is presented in the thesis. The bidirectional power converters in BPMs are able to serve as chargers with buck conversion during the charging stage. Even though connected in series, all modules can substantially be operated individually, retaining the advantages of independent operation, such as flexible control, easy protection, simple maintenance, and favorable battery power management. Investigation results indicate that automatic charge equalization is possible for the discontinuous conduction mode (DCM) operation. On the other hand, charge equalization can be achieved much faster by individually regulating the charging currents at the continuous conduction mode (CCM). According to the analyzed results, an equalization strategy is proposed to solve the charge imbalance problem by scheduling the individual battery current. Experiments are carried out to demonstrate the effectiveness of charge equalization.

Charge equalization is a major issue in the service of batteries since they are frequently connected in series to obtain higher output voltage levels for most applications. With series connection, imbalance may happen to the operating batteries during either charging or discharging periods. The imbalance among batteries concerns the operating efficiency and the battery lifetime. The main object of this dissertation is to solve the problem of charge inequality. The importance of charge equalization is first addressed. The problem is demonstrated by experiments of charging/discharging processes. Then, the techniques of battery charging and charge equalization are reviewed. To improve charge equalization, a dynamic balance charging scheme is developed on the basis of buck-boost conversion. The balance charging scheme can be realized by two configurations, that is, ¡§forward allotting¡¨ or ¡§backward allotting¡¨ configurations. The circuits are composed of several duplicated subcircuits and operated by digital control kernel, therefore, they are easy to be applied on battery sets with different numbers of batteries. By dynamically re-allocating the energy drawing from satiated batteries and allotted to hungry ones, the series-connected batteries can reach balance state more efficiently. The balance charging circuits can be employed during off-line or even discharging. However, on observing that the output voltage will vary in a big range when the battery set is discharged, the charge equalization can be integrated with voltage regulation on the output. Evolve from this idea, a balance discharging circuit¡@topology based on multi-winding transformer is proposed. The experiments in this dissertation are carried out on lead-acid batteries, therefore, the reactions and characteristics of lead-acid batteries are discussed. However, the proposed circuits are not restricted to be applied on lead-acid batteries only. Experimental results confirm the theoretical analyses and manifest the effectiveness of the designed circuits.

Thesis (Ph.D.)--University of Texas at Austin, 2001. / Vita. Includes bibliographical references (leaves 369-384). Available also in a digital version from Dissertation Abstracts.

Thesis (Ph. D.)--UCLA, 2009. / Vita. Description based on print version record. Includes bibliographical references (leaves 419-443).

Thesis (Ph. D.)--University of Missouri-Columbia, 2001. / Typescript. Includes bibliographical references (leaves 135-148). Also available on the Internet.

Thesis (Ed. D.)--University of Massachusetts Amherst, 2009. / Open access. Includes bibliographical references (p. 311-324). Print copy also available.

Thesis (Ph. D.)--University of Missouri-Columbia, 2001. / Typescript. Includes bibliographical references (leaves 135-148). Also available on the Internet.