published_or_final_version / abstract / Electrical and Electronic Engineering / Doctoral / Doctor of Philosophy

published_or_final_version / Electrical and Electronic Engineering / Master / Master of Philosophy

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M.Ing. / Application Layer Forward Error Correction (AL-FEC) is a relatively new concept which uses erasure codes to add reliability insurance to particular application streams on a network. This concept has become particularly popular for media streaming services. Fountain codes have shown promise as the erasure code of choice for these implementations. The Fountain code concept is a principle that has two popular instantiations, the Luby Transform (LT) code and the Raptor code. While the Raptor code is the more efficient of the two, the LT code is the focal point of our dissertation. Our main objective in this dissertation was broken up into two different primary objectives which we had to satisfy in its completion. The first of these primary objectives entailed the finding of sets of input parameters which would yield an optimal implementation of the LT code for a given set of input block sizes. The simulation work performed in this investigation was done on a wide range of input parameters for each input block size concerned. While there have been a number of other studies which have performed such parameter optimisation we have not found any that present such comprehensive results as we do. The second of the primary objectives related to the analysis of the code when applied as an AL-FEC reliability mechanism for streaming media. This simulation work was performed on simulated IP network environments using the NS2 network simulator. The codes which were applied to the network were based on the optimal parameter sets found in the first objective. We analysed the effective throughput achievable by the code in the face of various packet loss rates. With the data obtained from the simulations we then derived a constraint on the allowable bit-rate of media which uses the LT code as an AL-FEC reliability mechanism. In performing the work in this dissertation it was identified that it was required to develop the LT code related simulation tools for performing the respective investigations. This involved development of a stand-alone LT code simulator as well as an LT code AL-FEC reliability mechanism for NS2.

M.Ing. / In practical transmission or storage systems, the convolutional encoding and Viterbi decoding scheme is widely used to protect the data from substitution errors. Two independent insertion/deletion/substitution (IDS) error correcting designs, working on the convolutional encoder and the Viterbi decoder respectively, are shown in this thesis. The Levenshtein distance has previously been postulated to be a suitable branch comparison metric for the Viterbi algorithm on channels with not only substitution errors, but also insertion/deletion errors. However, to a large extent, this hypothesis has still to be investigated. In the first coding scheme, a modified Viterbi algorithm based on the Levenshtein distance metric is used as the decoding algorithm. Our experiments give evidence that the modified Viterbi algorithm with the Levenshtein distance metric is suitable as an applicable decoding algorithm for IDS channels. In the second coding scheme, a new type of convolutional code called the path-pruned convolutional code is introduced on the encoder side. By periodically deleting branches in a high rate convolutional code trellis diagram to create a specific insertion/deletion error correcting block codeword structure in the encoded sequence, we can obtain an encoding system to protect against insertion, deletion and substitution errors at the same time. Moreover, the path-pruned convolutional code is an ideal code to use for unequal error protection. Therefore, we also present an application of the rate-compatible path-pruned convolutional codes over IDS channels.

Wai-shing Lee. / Thesis (M.Phil.)--Chinese University of Hong Kong, 2001. / Includes bibliographical references (leaves 114). / Abstracts in English and Chinese. / Contents --- p.i / List of Figures --- p.iv / List of Tables --- p.v / Abstract --- p.vi / Acknowledgement --- p.vii / Chapter Chapter 1. --- Layout of the thesis --- p.1 / Chapter Chapter 2. --- Introduction --- p.3 / Chapter 2.1 --- What is the reasoning problem? --- p.3 / Chapter 2.2 --- Fundamental nature of Knowledge --- p.4 / Chapter 2.3 --- Fundamental methodology of Reasoning --- p.7 / Chapter 2.4 --- Our intended approach --- p.9 / Chapter Chapter 3. --- Probabilistic reasoning networks --- p.11 / Chapter 3.1 --- Overview --- p.11 / Chapter 3.2 --- Causality and influence diagrams --- p.11 / Chapter 3.3 --- Bayesian networks - influence diagrams endowed with a probability interpretation --- p.13 / Chapter 3.3.1 --- A detour to the interpretations of probability --- p.13 / Chapter 3.3.2 --- Bayesian networks --- p.15 / Chapter 3.3.3 --- Acyclicity and global probability --- p.17 / Chapter 3.4 --- Reasoning on probabilistic reasoning networks I - local updating formulae --- p.17 / Chapter 3.4.1 --- Rationale of the intended reasoning strategy --- p.18 / Chapter 3.4.2 --- Construction of the local updating formula --- p.19 / Chapter 3.5 --- Cluster graphs - another perspective to reasoning problems --- p.23 / Chapter 3.6 --- Semi-lattices - another representation of Cluster graphs --- p.26 / Chapter 3.6.1 --- Construction of semi-lattices --- p.26 / Chapter 3.7 --- Bayesian networks and semi-lattices --- p.28 / Chapter 3.7.1 --- Bayesian networks to acyclic semi-lattices --- p.29 / Chapter 3.8 --- Reasoning on (acyclic) probabilistic reasoning networks II - global updating schedules --- p.29 / Chapter 3.9 --- Conclusion --- p.30 / Chapter Chapter 4. --- Cyclic reasoning networks - a possibility? --- p.32 / Chapter 4.1 --- Overview --- p.32 / Chapter 4.2 --- A meaningful cyclic structure - derivation of the ideal gas law --- p.32 / Chapter 4.3 --- "What's ""wrong"" to be in a cyclic world" --- p.35 / Chapter 4.4 --- Communication - Dynamics - Complexity --- p.39 / Chapter 4.4.1 --- Communication as dynamics; dynamics to complexity --- p.42 / Chapter 4.5 --- Conclusion --- p.42 / Chapter Chapter 5. --- Cyclic reasoning networks ´ؤ error-control application --- p.43 / Chapter 5.1 --- Overview --- p.43 / Chapter 5.2 --- Communication schemes on cyclic reasoning networks directed to error-control applications --- p.43 / Chapter 5.2.1 --- Part I ´ؤ Local updating formulae --- p.44 / Chapter 5.2.2 --- Part II - Global updating schedules across the network --- p.46 / Chapter 5.3 --- Probabilistic reasoning based error-control schemes --- p.47 / Chapter 5.3.1 --- Local sub-universes and global universe underlying the error- control structure --- p.47 / Chapter 5.4 --- Error-control structure I --- p.48 / Chapter 5.4.1 --- Decoding algorithm - Communication between local sub- universes in compliance with the global topology --- p.51 / Chapter 5.4.2 --- Decoding rationales --- p.55 / Chapter 5.4.3 --- Computational results --- p.55 / Chapter 5.5 --- Error-control structure II --- p.57 / Chapter 5.5.1 --- Structure of the code and the corresponding decoding algorithm --- p.57 / Chapter 5.5.2 --- Computational results --- p.63 / Chapter 5.6 --- Error-control structure III --- p.66 / Chapter 5.6.1 --- Computational results --- p.70 / Chapter 5.7 --- Error-control structure IV --- p.71 / Chapter 5.7.1 --- Computational results --- p.73 / Chapter 5.8 --- Conclusion --- p.74 / Chapter Chapter 6. --- Dynamics on cyclic probabilistic reasoning networks --- p.75 / Chapter 6.1 --- Overview --- p.75 / Chapter 6.2 --- Decoding rationales --- p.76 / Chapter 6.3 --- Error-control structure I - exact solutions --- p.77 / Chapter 6.3.1 --- Dynamical invariant - a key to tackle many dynamical problems --- p.77 / Chapter 6.3.2 --- Dynamical invariant for error-control structure I --- p.78 / Chapter 6.3.3 --- Iteration dynamics --- p.79 / Chapter 6.3.4 --- Structure preserving property and the maximum a posteriori solutions --- p.86 / Chapter 6.4 --- Error-control structures III & IV - exact solutions --- p.92 / Chapter 6.4.1 --- Error-control structure III --- p.92 / Chapter 6.4.1.1 --- Dynamical invariants for error-control structure III --- p.92 / Chapter 6.4.1.2 --- Iteration dynamics --- p.93 / Chapter 6.4.2 --- Error-control structure IV --- p.96 / Chapter 6.4.3 --- Structure preserving property and the maximum a posteriori solutions --- p.98 / Chapter 6.5 --- Error-control structure II - exact solutions --- p.101 / Chapter 6.5.1 --- Iteration dynamics --- p.102 / Chapter 6.5.2 --- Structure preserving property and the maximum a posteriori solutions --- p.105 / Chapter 6.6 --- A comparison on the four error-control structures --- p.106 / Chapter 6.7 --- Conclusion --- p.108 / Chapter Chapter 7. --- Conclusion --- p.109 / Chapter 7.1 --- Our thesis --- p.109 / Chapter 7.2 --- Hind-sights and foresights --- p.110 / Chapter 7.3 --- Concluding remark --- p.111 / Appendix A. An alternative derivation of the local updating formula --- p.112 / Bibliography --- p.114

Thesis (Ph. D.)--University of Hong Kong, 2006. / Title proper from title frame. Also available in printed format.

Thesis (Ph. D.)--Washington State University, December 2007. / Includes bibliographical references (p. 74-80).

<p>Wireless communication is always struggling with errors in the transmission. The digital data received from the radio channel is often erroneous due to thermal noise and fading. The error rate can be lowered by using higher transmission power or by using an effective error correcting code. Power consumption and limits for electromagnetic radiation are two of the main problems with handheld devices today and an efficient error correcting code will lower the transmission power and therefore also the power consumption of the device. </p><p>Duo-binary CTC is an improvement of the innovative turbo codes presented in 1996 by Berrou and Glavieux and is in use in many of today's standards for radio communication i.e. IEEE 802.16 (WiMAX) and DVB-RSC. This report describes the development of a duo-binary CTC decoder and the different problems that were encountered during the process. These problems include different design issues and algorithm choices during the design.</p><p>An implementation in VHDL has been written for Alteras Stratix II S90 FPGA and a reference-model has been made in Matlab. The model has been used to simulate bit error rates for different implementation alternatives and as bit-true reference for the hardware verification.</p><p>The final result is a duo-binary CTC decoder compatible with Alteras Stratix II designs and a reference model that can be used when simulating the decoder alone or the whole signal processing chain. Some of the features of the hardware are that block sizes, puncture rates and number of iterations are dynamically configured between each block Before synthesis it is possible to choose how many decoders that will work in parallel and how many bits the soft input will be represented in. The circuit has been run in 100 MHz in the lab and that gives a throughput around 50Mbit with four decoders working in parallel. This report describes the implementation, including its development, background and future possibilities.</p>

Exception handling is a programming language feature that can help increase the reliability of programs. However, not much work has been done on exception handling in visual programming languages. We present an approach for improving the exception handling mechanism in Forms/3, a declarative visual programming language based on the spreadsheet paradigm. We show how this approach can be added without sacrificing referential transparency and lazy evaluation in Forms/3. We then present a comparison of the Forms/3 exception handling mechanism with the mechanisms available in Java, C++, Prograph, Haskell and Microsoft Excel, based on their expressive powers. / Graduation date: 1998