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Ethernet controller design for an embedded system using FPGA technologyGroom, Eddie L. January 2008 (has links) (PDF)
Thesis (M.S.)--University of Alabama at Birmingham, 2008. / Description based on contents viewed Oct. 7, 2008; title from PDF t.p. Includes bibliographical references (p. 80-81).
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Ανάπτυξη ενσωματωμένου συστήματος για χαρακτηρισμό τηλεπικοινωνιακών διατάξεωνΣακελλαρίου, Παναγιώτης 15 March 2012 (has links)
Στην παρούσα διπλωματική αναπτύσσεται ένα ενσωματωμένο σύστημα αποτελούμενο από υλικό και λογισμικό, για τον χαρακτηρισμό τηλεπικοινωνιακών διατάξεων. Ειδικότερα μελετάται ο έλεγχος εξειδικευμένης ενσωματωμένης τηλεπικοινωνιακής διάταξης, η αυτοματοποίηση της συλλογής δεδομένων ενδιαφέροντος κατά τη λειτουργία της τηλεπικοινωνιακής διάταξης, καθώς και ο τρόπος επικοινωνίας με το χρήστη αναπτυξιακών συστημάτων που βασίζονται σε FPGA και χρησιμοποιούνται για την κατασκευή προτύπων τηλεπικοινωνιακών διατάξεων. Συγκεκριμένα μελετώνται διαφορετικές τεχνικές εισαγωγής και εξαγωγής δεδομένων από τα FPGAs και αποθήκευσής τους σε σύστημα host. O τρόπος εισαγωγής δεδομένων και παραμέτρων στα υπάρχοντα συστήματα παρουσιάζει συγκεκριμένους περιορισμούς.
Εδώ μελετάται ο τρόπος που μπορούν τα δεδομένα και παράμετροι να εισάγονται δυναμικά μέσω ενός φιλικού προς τον χρήστη περιβάλλοντος. Επίσης μελετάται ο τρόπος αυτόματης συλλογής όγκου δεδομένων ενδιαφέροντος και εξαγωγής δεδομένων με ασφαλή και αυτοματοποιημένο τρόπο. Για να επιτευχθεί αυτό αναπτύσσεται ένα ενσωματωμένο σύστημα που η διεπαφή χρήστη γίνεται μέσω web server.
Η ανάπτυξη περιλαμβάνει τη χρήση ενσωματωμένου επεξεργαστή διαθέσιμου ως IP block σε FPGA, τη δόμηση ενός συστήματος βασισμένου σε κανάλια επικοινωνίας με χρήση εικονικής διευθυνσιοδότησης, καθώς και τον έλεγχο και σύνδεση της μονάδας προτυποποίησης τηλεπικοινωνιακών διατάξεων με το κανάλι επικοινωνίας του επεξεργαστή. Το σύστημα που προκύπτει είναι ένα ενσωματωμένο σύστημα στο οποίο το λειτουργικό σύστημα βασίζεται σε διακοπές ενώ η διεπαφή χρήστη γίνεται με την ανάπτυξη ενσωματωμένου web server. Με αυτόν τον τρόπο παρέχεται ένα διαδραστικό περιβάλλον που είναι ευρέως διαδεδομένο και με το οποίο ο χρήστης μπορεί να έχει άμεση επαφή με το hardware, ενώ ταυτόχρονα αυτοματοποιεί τη διαδικασία εξαγωγής δεδομένων προσφέροντας αξιοπιστία και υψηλές ταχύτητες. / This thesis presents the development of an embedded system composed of both hardware and software components, for the characterization of a telecommunication prototype. Specifically, we study the control of an advanced telecommunication IP, the automation of collecting interesting data during the operation of the telecommunication device, and ways in available for the engineer to interact with FPGA-based system prototypes. Different techniques of importing and exporting data from the FPGA and storing them to a host system are investigated. The way of importing data and parameters in existing systems presents certain restrictions.
In this thesis we study techniques of dynamically importing the data and parameters through a user-friendly environment. We automated the process of collecting data of interest and data retrieval in a secure and reliable manner. To achieve this, an embedded system interface is implemented developing an embedded, on-board web server.
The development process includes the use of an embedded processor available as IP block on an FPGA, building a system based on bus channels using virtual addressing, and the connection and the control of telecommunication IP blocks through the bus channel to the processor. The developed system is an embedded system utilizes an interrupt-based operating system offering a user interface based a developed embedded web server. This system provides an interactive environment which is widely used, where the developer can directly access the hardware, and at the same time automates data retrieval and offers reliability and high speed.
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Towards a distributed real-time system for future satellite applicationsRozendaal, A. (Abraham) 12 1900 (has links)
Thesis (MScEng)--University of Stellenbosch, 2003. / ENGLISH ABSTRACT: The Linux operating system and shared Ethernet are alternative technologies with the potential to
reduce both the development time and costs of satellites as well as the supporting infrastructure.
Modular satellites, ground stations and rapid proto typing testbeds also have a common
requirement for distributed real-time computation. The identified technologies were investigated
to determine whether this requirement could also be met.
Various real-time extensions and modifications are currently available for the Linux operating
system. A suitable open source real-time extension called Real-Time Application Interface
(RTAI) was selected for the implementation of an experimental distributed real-time system.
Experimental results showed that the RTAI operating system could deliver deterministic realtime
performance, but only in the absence of non-real-time load.
Shared Ethernet is currently the most popular and widely used commercial networking
technology. However, Ethernet wasn't developed to provide real-time performance. Several
methods have been proposed in literature to modify Ethernet for real-time communications. A
token passing protocol was found to be an effective and least intrusive solution. The Real-Time
Token (RTToken) protocol was designed to guarantee predictable network access to
communicating real-time tasks. The protocol passes a token between nodes in a predetermined
order and nodes are assigned fixed token holding times. Experimental results proved that the
protocol offered predictable network access with bounded jitter.
An experimental distributed real-time system was implemented, which included the extension of
the RTAI operating system with the RTToken protocol, as a loadable kernel module. Real-time
tasks communicated using connectionless Internet protocols. The Real-Time networking (RTnet)
subsystem of RTAI supported these protocols. Under collision-free conditions consistent
transmission delays with bounded jitter was measured. The integrated RTToken protocol
provided guaranteed and bounded network access to communicating real-time tasks, with limit
overheads. Tests exhibited errors in some of the RTAI functionality. Overall the investigated
technologies showed promise in being able to meet the distributed real-time requirements of
various applications, including those found in the satellite environment. / AFRIKAANSE OPSOMMING: Die Linux bedryfstelsel en gedeelde Ethernet is geïdentifiseer as potensiële tegnologieë vir
satelliet bedryf wat besparings in koste en vinniger ontwikkeling te weeg kan bring. Modulêr
ontwerpte satelliete, grondstasies en ontwikkeling platforms het 'n gemeenskaplike behoefte vir
verspreide intydse verwerking. Verskillende tegnologieë is ondersoek om te bepaal of aan die
vereiste ook voldoen kan word.
Verskeie intydse uitbreidings en modifikasies is huidiglik beskikbaar vir die Linux bedryfstelsel.
Die "Real-Time Application Interface" (RTAI) bedryfstelsel is geïdentifiseer as 'n geskikte
intydse uitbreiding vir die implementering van 'n eksperimentele verspreide intydse stelsel.
Eksperimentele resultate het getoon dat die RTAI bedryfstelsel deterministies en intyds kan
opereer, maar dan moet dit geskied in die afwesigheid van 'n nie-intydse verwerkingslas.
Gedeelde Ethernet is 'n kommersiële network tegnologie wat tans algemeen beskikbaar is. Die
tegnologie is egter nie ontwerp vir intydse uitvoering nie. Verskeie metodes is in die literatuur
voorgestelom Ethernet te modifiseer vir intydse kommunikasie. Hierdie ondersoek het getoon
dat 'n teken-aangee protokol die mees effektiewe oplossing is en waarvan die implementering
min inbreuk maak. Die "Real-Time Token" (RTToken) protokol is ontwerp om voorspelbare
netwerk toegang tot kommunikerende intydse take te verseker. Die protokol stuur 'n teken tussen
nodusse in 'n voorafbepaalde volgorde. Nodusse word ook vaste teken hou-tye geallokeer.
Eksperimentele resultate het aangedui dat die protokol deterministiese netwerk toegang kan
verseker met begrensde variasies.
'n Eksperimentele verspreide intydse stelsel is geïmplementeer. Dit het ingesluit die uitbreiding
van die RTAI bedryfstelsel met die RTToken protokol; verpak as 'n laaibare bedryfstelsel
module. Intydse take kan kommunikeer met verbindinglose protokolle wat deur die "Real-Time
networking" (RTnet) substelsel van RTAI ondersteun word. Onder ideale toestande is konstante
transmissie vertragings met begrensde variasies gemeet. Die integrasie van die RTToken
protokol het botsinglose netwerk toegang aan kommunikerende take verseker, met beperkte
oorhoofse koste as teenprestasie. Eksperimente het enkele foute in die funksionaliteit van RTAI
uitgewys. In die algemeen het die voorgestelde tegnologieë getoon dat dit potensiaal het vir
verskeie verspreide intydse toepassings in toekomstige satelliet en ook ander omgewings.
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Conception et validation d'AeroRing - un réseau de communication Ethernet en double anneau pour les systèmes avioniques de nouvelle génération / Specification and Analysis of AeroRing - A Full Duplex Ethernet Ring Network for New Generation Avionics SystemsAmari, Ahmed 21 September 2017 (has links)
La complexité et le besoin en bande passante des architectures de communication avioniquene cessent de croitre avec le nombre des calculateurs et l’expansion des données échangées. Latechnologie AFDX a été introduite pour offrir des communications haut débit (100Mbps) pourles avions de nouvelle génération. Cependant, ce réseau commuté est déployé de manièreentièrement redondante, ce qui conduit à des quantités importantes de câbles, augmentant lepoids et les coûts d’intégration. Pour faire face à ces problèmes, on propose dans cette thèsel’intégration d’un réseau Ethernet en anneau comme une solution principale pour diminuerle poids et la complexité liés au câblage. Dans ce contexte, notre objectif est de concevoir etvalider un nouveau réseau de communication avionique, AeroRing, basé sur de l’EthernetGigabit avec une topologie anneau. / The inherent complexity and bandwidth requirement of avionics communication architecturesare increasing due to the growing number of interconnected end-systems and theexpansion of exchanged data. The Avionics Full Duplex Switched Ethernet (AFDX) has beenintroduced to provide high-speed communication (100Mbps) for new generation aircraft.However, this switched network is deployed in a fully redundant way, which leads to significantquantities of wires, and thus increases weight and integration costs. To cope with thesearising issues, integrating ring-based Ethernet network in avionics context is proposed in thisthesis as a main solution to decrease the wiring-related weight and complexity. In this context,our main objective is to design and validate a new avionic communication network, calledAeroRing, based on a Gigabit Ethernet technology and supporting a Full Duplex ring topology.To achieve this aim, first, a benchmarking of the most relevant Real-Time Ethernet (RTE)solutions supporting ring topologies vs avionics requirements has been conducted, and weparticularly assess the main Performance Indicators (PIs), specified in IEC 61784-2. Thisbenchmarking reveals that each existing RTE solution satisfies some requirements better thanothers, but there is no best solution in terms of all the requirements.
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Mixed criticality management into real-time and embedded network architectures : application to switched ethernet networks / Gestion de la criticité mixte dans les réseaux temps-réel embarqués et application à ethernet commutéCros, Olivier 08 December 2016 (has links)
La CM (Criticité Mixte) est une solution pour intégrer différents niveaux de criticité dans le même système au sein des mécanismes industriels intégrant des infrastructures réseau différentes. Notre objectif est de proposer des solutions pour intégrer la criticité mixte dans des domaines industriels hautements contraints afin de mélanger des flux de différentes criticité au sein de la même infrastructure. Cette intégration implique des contraintes d'isolation : l'impact du traffic non critique sur le traffic critique doit être borné, et le plus faible possible. C'est une condition indispensable pour assurer le respect des contraintes de temps de transmission. Afin d'analyser ces délais de transmission et de centrer notre travail sur le déterminisme de ces transmissions, nous avons recours à une méthode de calcul de délai de bout en bout appelé l'approche par trajectoires. Dans ce travail, nous utilisons une version corrigée de l'approche par trajectoires, prenant en compte la serialisation des messages.Afin d'assurer les contraintes de délais dans les réseaux à criticité mixte, nous présentons tout d'abord un modèle théorique d'intégration de la criticité mixte. Ce modèles est issu de l'ordonnancement temps-réel en contexte processeur. Ce modèle présente une modélisation des flux considérant que chaque flux peut être de plusieurs niveaux de criticité.Pour intégrer la criticité mixte dans les réseaux temps-réel, nous proposons deux protocoles différents. Le premier est le protocole centralisé. Il est organisé autour de la désignation d'un noeud central dans le réseau, responsable de la synchronisation des niveaux de criticité de chaque noeud via a un mécanisme d'émission multiple fiable. Ce mécanisme est chargé de faire changer les niveaux de criticité de tous les noeuds au même instant. Le second protocole est basé sur une approche distribuée. Il propose une gestion locale à chaque noeud de la criticité. Chaque noeud gère individuellement son propre niveau de criticité interne. Ce protocol permet de préserver les transmissions d'une part du traffic non critique au sein du réseau, même en parallèle de transmissions de flux critiques.Afin de proposer une implémentation de ces protocoles dans Ethernet, nous détaillons comment réutiliser la marque de l'en-tête de Ethernet 802.1Q pour spécifier le niveau criticité d'un message directement au sein de la trame. Grâce à cette solution, chaque flux du réseau est marqué de son niveau de criticité et cette information peut être décodée par les noeuds du réseau afin d'opérer un ordonnancement en conséquence. De plus, en gestion centralisée, nous proposons une solution permettant d'intégrer les informations de gestion de la criticité directement dans les trames du protocole de synchronization d'horloge gls{PTP}.Durant notre travail, nous avons conçu un outil de simulation dénommé gls{ARTEMIS}. Cet outil est utilisé pour l'analyse de délais de transmission dans des réseaux temps-réel et pour l'analyse de scénarios d'ordonnancement à criticité mixte. Les résultats de simulation obtenus nous permettent de formuler différentes hypothèses sur les garanties de qualité de service offertes par les protocoles centralisé et décentralisé. En termes de transmission de trafic non critique, le protocole décentralisé permet d'assurer la transmission d'une certaine quantité de messages grâce au fait que certains noeuds du réseau soient resté en mode non-critique.Pour conclure, nous proposons des solutions d'intégration de la criticité mixte à la fois dans des contextes industriels lourds et dans des architectures Ethernet grand public. Les solutions proposées peuvent être à la fois adaptées à des réseaux synchronisés ou non synchronisés. Selon le protocole, la configuration individuelle à appliquer à chaque noeud peut être réduite afin de proposer des solutions implémentables sur du matériel moins coûteux / MC (Mixed-Criticality) is an answer for industrial systems requiring different network infrastructures to manage informations of different criticality levels inside the same system. Our purpose in this work is to find solutions to integrate gls{MC} inside highly constrained industrial domains in order to mix flows of various criticality levels inside the same infrastructure. This integration induces isolation constraints : the impact of non-critical traffic on critical traffic must be characterized and bounded. This a condition to respect timing constraints. To analyze transmission delays and focus on the determinism of transmissions, we use an end-to-end delay computation method called the trajectory approach. In our work, we use a corrected version of the trajectory approach taking into account the serialization of messages.To assure the respect of timing constraints in mixed critical networks, we first present a theoretical model of gls{MC} representation. This model is issued from gls{MC} tasks scheduling on processors. This model proposes a flow modelization which considers that each flow can be of one (low critical flows) or several criticality levels.To integrate gls{MC} inside gls{RT} networks, we propose two network protocols. The first is the centralized protocol. It is structured around the definition of a central node in the network, which is responsible for synchronizing the criticality level switch of each node through a reliable multicast protocol in charge of switching the network criticality level. This centralized protocol proposes solutions to detect the needs to change the criticality levels of all nodes and to transmit this information to the central node. The second protocol is based on a distributed approach. It proposes a local gls{MC} management on each node of a network. Each node individually manages its own internal criticality level. This protocol offers solutions to preserve when possible non-critical network flows even while transmitting critical flows in the network through weak isolation.In order to propose an implementation of these protocols inside Ethernet, we describe how to use Ethernet 802.1Q header tag to specify the criticality level of a message directly inside the frame. With this solution, each flow in the network is tagged with its criticality level and this information can be analyzed by the nodes of the network to transmit the messages from the flow or not. Additionnally, for the centralized approach, we propose a solution integrating gls{MC} configuration messages into gls{PTP} clock-synchronization messages to manage criticality configuration information in a network.In this work, we designed a simulation tool denoted as gls{ARTEMIS} (Another Real-Time Engine for Message-Issued Simulation). This tool is dedicated to gls{RT} networks analysis and gls{MC} integration scheduling scenarios. This tool, based on open and modular development guidelines, has been used all along our work to validate the theoretical models we presented through simulation. We integrated both centralized and decentralized protocols inside gls{ARTEMIS} core. The obtained simulations results allowed us to provide information about the gls{QOS} guarantees offered by both protocols. Concerning non-critical traffic : the decentralized protocol, by permitting specific nodes to stay in non-critical nodes, assures a highest success ratio of non-critical traffic correct transmission.As a conclusion, we propose solutions to integrate gls{MC} inside both industrial and gls{COTS} Ethernet architectures. The solutions can be either adapted to clock-synchronized or non clock-synchronized protocols. Depending on the protocol, the individual configuration required by each switch can be reduced to adapt these solutions to less costly network devices
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Systém pro přesná dynamická měření můstkových senzorů / System for precise dynamic measurement of bridge sensorsČech, Jonáš January 2018 (has links)
This master’s thesis deals with design of measurement system for dynamic measurement of bridge sensors. After a short theoretical part, the own concept is introduced. System can provide sampling rate up to 250 kSa/s with 24-bit resolution. The maximum number of samples is about one and a half milion. At first, the design of analog part was made, in this phase of design the digital part is based on evaluation board with ARM Cortex-M7 and external memory. After final choice of appropriate ICs, the analog and digital part will be integrated into one PCB.
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Akviziční systém na platformě STEMLab / STEMLab based data acquisition systemPavlík, Radim January 2019 (has links)
Thesis deals with design of acquisition system, working on developing platform STEMLab (Red Pitaya). Goal is possibility of monitoring analog signals with adjustable sampling frequency and length of acquisition. Software was created for both controlling part (Python application) and for platform itself (embedded C, Python) using the appropriate FPGA-HW design (HDL). Thesis describe how to work with platform ecosystem, control and behaviour of aplications created during the proces of getting acquainted with the platform and options how aplications could be created.
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Vývojový kit pro komunikaci mikrokontrolérů s počítačem / Development kit for microcontrollers communication with computerFranek, Miroslav January 2019 (has links)
Master’s thesis deals with the design of development kit for communication between a microcontroller and a computer using USB, Bluetooth, WiFi and Ethernet interfaces. In the theoretical introduction is the analysis of theese interfaces and the interfaces used for communication by the microcontroller. In the next part, components for the development kit are selected. Then a wiring diagram and the printed circuit board is designed. Next, the firmware design is described. The last chapter deals with the implementation and testing of the development kit. The appendix contains a proposal for a laboratory task to introduce the development kit to students.
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Laboratorní úlohy pro výuku síťových technologií / Laboratory exercises for network technologies educationKapusta, Martin January 2019 (has links)
The aim of the diploma thesis is to choose network simulator suitable for network technologies laboratory tasks for educational use. Theoretical part of thesis describes basics of network communication, addressing, reference models. Thesis also describes standards Wi Fi, Ethernet and routing protocol OSPF - technologies which are discussed in laboratory tasks. The practical part of diploma thesis describes a few available network simulators suitable for creating two laboratory tasks. Finally, the NS-3 simulator was chosen. Both laboratory tasks include theoretical introduction, detailed description of source code, individual tasks, expected outputs and control questions which senses understanding of discussed technologies.
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Simulace průmyslového protokolu CIP / CIP industrial protocol simulationMolent, Michal January 2020 (has links)
The thesis is about industrial automatic CIP protocol, which belongs to SCADA systems. The first part is focused on basic principles of CIP protocol and on analysis of two protocols (EtherNET/IP and DeviceNet), which are based on CIP protocol. The second part deals with designing scenarios for a simulation. The simulation of one-way communication, two-way communication with help of reads from the console and two-way real time communication between Raspberries PI 3B+. The third part deals with a realization of the simulation, a start-up and a function of predefined scenarios and graphic interface. The fourth part deals with analysis network communication in situations, which occur during a protocol EtherNet/IP simulation.
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