Indiana University-Purdue University Indianapolis (IUPUI) / Testing and verification are essential to safe and consistent products. Simulation is a widely accepted method used for verification and testing of distributed components. Generally, one of the major hurdles in using simulation is the development of detailed and accurate models. Since there are time constraints on projects, fast and effective methods of simulation model creation emerge as essential for testing. This thesis proposes to solve these issues by presenting a method to automatically generate a simulation model and run a random walk simulation using that model. The method is automated so that a modeler spends as little time as possible creating a simulation model and the errors normally associated with manual modeling are eliminated. The simulation is automated to allow a human to focus attention on the device that should be tested. The communications transactions between two nodes on a network are recorded as a trace file. This trace file is used to automatically generate a finite state machine model. The model can be adjusted by a designer to add missing information and then simulated in real-time using a software-in-the-loop approach. The innovations in this thesis include adaptation of a synthesis method for use in simulation, introduction of a random simulation method, and introduction of a practical evaluation method for two finite state machines. Test results indicate that nodes can be adequately replaced by models generated automatically by these methods. In addition, model construction time is reduced when comparing to the from scratch model creation method.

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This thesis describes extensions to state machines in the Umple model-oriented programming language to offer queued state machines (QSM), pooled state machines (PSM) and handing of the arrival of unexpected events. These features allow for modeling the behavior of a system or protocol in a more accurate way in Umple because they enable detecting and fixing common design errors such as unspecified receptions. In addition, they simplify the communication between communicating state machines by allowing for asynchronous calls of events and passing of messages between state machines. Also, a pooled state machine (PSM) has been developed to provide a different policy of handling events that avoid unspecified receptions. This mechanism has similar semantics as a queued state machine, but it differs in the way of detecting unspecified receptions because it helps handling these errors. Another mechanism has been designed to use the keyword ‘unspecified’ in whatever state of a state machine the user wants to detect these errors. In this thesis, the test-driven development (TDD) process has been followed to first modify the Umple syntax to add ‘queued,’ ‘pooled,’ and ‘unspecified’ keywords to Umple state machine’s grammar; and second, to make a change to the Umple semantics in order to implement these extensions in Umple. Then, additional modifications have been made to allow for Java code generation from those types of state machines. Finally, more test cases have been written to ensure that these models are syntactically and semantically correct. In order to show the usefulness and usability of these new features, an example is shown as a case study that is modeled using the queued state machine (QSM) besides other small tests cases.

Over the past two decades, autonomous driving technology has made tremendous breakthroughs. With this technology, human drivers have been able to take their hands off the wheel in many scenarios and let the vehicle drive itself. Highway scenarios are less disturbed than urban scenarios, so autonomous driving is much simpler to implement and can be accomplished very well with a rule-based approach. However, a significant drawback of the rule-based approach compared to human drivers is that it is difficult to predict the intent of the vehicles in the surrounding environment by designing the algorithm’s logic. In contrast, human drivers can easily implement the intent analysis. Therefore, in this research work, we introduce the prediction module as the upstream of the autonomous driving decision-making module, so that the autonomous driving decision-maker has richer input information to better optimize the decision output by getting the intent of the surrounding vehicles. The evaluation of the final results confirms that our proposed approach is helpful for optimizing Rule-based autonomous driving decisions. / Under de senaste två decennierna har tekniken för autonom körning gjort enorma genombrott. Med denna teknik har mänskliga förare kunnat ta bort händerna från ratten i många situationer och låta fordonet köra sig självt. Scenarier på motorvägar är mindre störda än scenarier i städer, så autonom körning är mycket enklare att genomföra och kan åstadkommas mycket bra med en regelbaserad metod. En betydande nackdel med det regelbaserade tillvägagångssättet jämfört med mänskliga förare är dock att det är svårt att förutsäga avsikten hos fordonen i den omgivande miljön genom att utforma algoritmens logik. Däremot kan mänskliga förare lätt genomföra avsiktsanalysen. I det här forskningsarbetet inför vi därför förutsägelsemodulen som en uppströmsmodul för beslutsfattandet vid autonom körning, så att beslutsfattaren vid autonom körning har mer omfattande information för att bättre optimera beslutsutfallet genom att få reda på de omgivande fordonens intentioner. Utvärderingen av slutresultaten bekräftar att vårt föreslagna tillvägagångssätt är till hjälp för att optimera regelbaserade beslut om autonom körning.

Made available in DSpace on 2015-03-05T13:53:45Z (GMT). No. of bitstreams: 0 Previous issue date: 11 / Coordenação de Aperfeiçoamento de Pessoal de Nível Superior / Neste trabalho é proposto um método de extração de conhecimento a partir de Redes Neurais Recorrentes. Expressar formalmente o conhecimento armazenado dentro de uma Rede Neural Artificial representa um grande desafio, já que tal conhecimento precisa ser reformulado e apresentado de uma maneira simples e inteligível. Três formalismos simbólicos são abordados para a representação deste conhecimento: Autômatos Finitos Difusos, Cadeias de Markov e Autômatos Finitos Determinísticos. Para as extrações de conhecimento utilizadas no trabalho, atribui-se significado às regiões do espaço de atividade dos neurônios. O método proposto utiliza a clusterização do espaço neural para obtenção dos estados do autômato, sendo utilizados para isso, o algoritmo K-means e a clusterização difusa. A obtenção do conhecimento é feita utilizando-se Redes Neurais Recorrentes para aprender o comportamento de dois sistemas dinâmicos não lineares e, a partir das redes treinadas, extrair os estados e possíveis transições do autômato. Os sis / ln this work a method ofknowledge extraction from Recurrent Neural Network is proposed. Express formally the knowledge stored inside an Artificial Neural Network is a great challenge, because such knowledge has to be reformulated and presented by simple and understandable means. Three symbolic formats are presented for the representation of this knowledge: Fuzzy Finite Automata, Markov Chains and Deterministic Finite Automata. For the knowledge extraction used in this work, each space region of the neuron activity is associated to a meaning. The considered method uses clusterization of the neural space in order to obtain the automata states, using the K-means algorithm and the fuzzy clustering. The knowledge acquisition is made using Recurrent Neural Networks to learn the behavior of the two non linear dynamic systems and, from the trained nets, to extract the states and possible automata transitions. The dynamic systems are the lnverse Pendulum system and the Lorenz system. The presented extraction method wa

In formal language theory, studying shortest strings in languages, and variations thereof, can be useful since these strings can serve as small witnesses for properties of the languages, and can also provide bounds for other problems involving languages. For example, the length of the shortest string accepted by a regular language provides a lower bound on the state complexity of the language. In Chapter 1, we introduce some relevant concepts and notation used in automata and language theory, and we show some basic results concerning the connection between the length of the shortest string and the nondeterministic state complexity of a regular language. Chapter 2 examines the effect of the intersection operation on the length of the shortest string in regular languages. A tight worst-case bound is given for the length of the shortest string in the intersection of two regular languages, and loose bounds are given for two variations on the problem. Chapter 3 discusses languages that are defined over a free group instead of a free monoid. We study the length of the shortest string in a regular language that becomes the empty string in the free group, and a variety of bounds are given for different cases. Chapter 4 mentions open problems and some interesting observations that were made while studying two of the problems: finding good bounds on the length of the shortest squarefree string accepted by a deterministic finite automaton, and finding an efficient way to check if a finite set of finite words generates the free monoid. Some of the results in this thesis have appeared in work that the author has participated in \cite{AngPigRamSha,AngShallit}.

In formal language theory, studying shortest strings in languages, and variations thereof, can be useful since these strings can serve as small witnesses for properties of the languages, and can also provide bounds for other problems involving languages. For example, the length of the shortest string accepted by a regular language provides a lower bound on the state complexity of the language. In Chapter 1, we introduce some relevant concepts and notation used in automata and language theory, and we show some basic results concerning the connection between the length of the shortest string and the nondeterministic state complexity of a regular language. Chapter 2 examines the effect of the intersection operation on the length of the shortest string in regular languages. A tight worst-case bound is given for the length of the shortest string in the intersection of two regular languages, and loose bounds are given for two variations on the problem. Chapter 3 discusses languages that are defined over a free group instead of a free monoid. We study the length of the shortest string in a regular language that becomes the empty string in the free group, and a variety of bounds are given for different cases. Chapter 4 mentions open problems and some interesting observations that were made while studying two of the problems: finding good bounds on the length of the shortest squarefree string accepted by a deterministic finite automaton, and finding an efficient way to check if a finite set of finite words generates the free monoid. Some of the results in this thesis have appeared in work that the author has participated in \cite{AngPigRamSha,AngShallit}.

Made available in DSpace on 2014-06-11T19:22:31Z (GMT). No. of bitstreams: 0 Previous issue date: 2009-10-30Bitstream added on 2014-06-13T20:09:43Z : No. of bitstreams: 1 almeida_ts_me_ilha.pdf: 5032122 bytes, checksum: ba20bdd1ce902754e7b772b2be3cc785 (MD5) / Coordenação de Aperfeiçoamento de Pessoal de Nível Superior (CAPES) / Neste trabalho, apresenta-se o desenvolvimento e a avaliação de duas ferramentas que auxiliam projetos de circuitos eletrônicos, sejam eles projetos de sistemas digitais ou de sistemas mistos (sinais digitais e sinais analógicos). A partir de um diagrama de transição de estados, modelado em ambiente Stateflow®, a primeira ferramenta, denominada SF2HDL, realiza a extração de linguagens de descrição de hardware, podendo ser VHDL ou Verilog HDL. Sendo ainda capaz de extrair uma tabela de transição de estados padronizada, que, posteriormente, foi utilizada como entrada pelo programa TABELA, o qual realiza a minimização do sistema digital. A máquina de estados finitos, alvo da tradução, pode ser descrita tanto pelo modelo de Mealy como pelo modelo de Moore. Como estudos de caso, foram utilizados quatro códigos de linhas empregados em sistemas de telecomunicações. A segunda ferramenta é um aperfeiçoamento de uma ferramenta já existente, denominada MS2SV, empregada na síntese de sistemas mistos. O MS2SV é capaz de gerar uma descrição em VHDL-AMS estrutural, a partir de um modelo descrito em alto nível de abstração no ambiente Simulink®. Toda a estrutura de projeto necessária para a simulação e análise do sistema no ambiente SystemVision™, também é gerado pelo MS2SV. Foram utilizados quatro modelos de conversor de dados do tipo DAC (Digital to Analog Conversor), para avaliar o desempenho da ferramenta. Nesse contexto, as duas ferramentas permitem maior flexibilidade ao projetista, traduzindo descrições em níveis de abstração diferentes, o que permite uma análise mais detalhada do funcionamento do sistema e facilitando a sua implementação física / In this work, it’s shown the development and evaluation of two tools to aid in electronic circuits projects, be them digital systems projects or for mixed systems (digital and analogical signs). From a states transition diagram modeled in Stateflow® environment, the first tool, named SF2HDL, performs the extraction of hardware description languages, which could be VHDL or Verilog HDL. It is also capable of extracting states transition table standardized, which later was used as a TABELA program, which accomplishes the minimization of the digital system. The target finite state machine of the translated can be described by the Mealy model as much as the Moore model. As case studies were used four code lines employed in telecommunications systems. The second tool is an improvement of an already existent tool, known as MS2SV, used in the synthesis of mixed systems. The MS2SV is able to generate a description in structural VHDL-AMS, from a model described in high level of abstraction in the Simulink® environment. The whole project structure necessary for the simulation and analysis of the system by the SystemVision™ environment is also generated by MS2SV. Four DAC (Digital to Analog Converter) were used to evaluate the tool is performance. In that context, both tools allow a greater flexibility to the planner, translating descriptions in different abstraction levels, which allows a more detailed analysis of the systems behavior and making its physical implementation easier

This thesis is about semiautomatic network protocol diagnostics and creating protocol description from eavesdropped communication. Several network eavesdropping techniques  and some common programs for network analysis are introduced. Well-known network protocols are described, with focus on their communication messages. Some already existing methods for creating models from examples are mentioned and their characteristics defined. Next we design architecture of developed tool and some methods, that create protocol description. After that we explain implementation of this tool and finally the tool is tested and experimented with.