Wireless communication systems utilize the wireless medium to perform over-the-air (OTA) data transfer. There are many factors that can impact the quality of wireless communications, such as medium imperfection, interfering environment, mismatch of transceivers, etc. To mitigate these problems and improve the quality of service (QoS), this research study is conducted on three important topics including synchronization techniques, impairment estimation theory and techniques, and interference alignment techniques. In this thesis, it firstly present a dual link algorithm to align and manage the interference of multiple-input and multiple-output (MIMO) networks. A field-programmable gate array (FPGA) prototype is designed for software defined radio (SDR) platforms. As one of the key components, a hardware efficient architecture is proposed for the implementation of singular value decomposition (SVD). Secondly, it proposes a maximum-likelihood (ML) based synchronization approach for carrier frequency synchronization for MIMO systems. The algorithm is also implemented on FPGA for real-time performance evaluation. Finally, as an exemplary study of machine learning techniques for wireless communications, a neural network (NN) based estimator is proposed to perform coarse frequency offset estimations for MIMO systems. The proposed NN based estimator can accommodate various channel models and the results show promising performance in terms of accuracy and estimation range. In summary, this thesis provides a comprehensive study on interference alignment, carrier synchronization, and impairment estimation using different approaches. Efficient hardware implementations for the key algorithms are also presented.

Wireless communication systems utilize the wireless medium to perform over-the-air (OTA) data transfer. There are many factors that can impact the quality of wireless communications, such as medium imperfection, interfering environment, mismatch of transceivers, etc. To mitigate these problems and improve the quality of service (QoS), this research study is conducted on three important topics including synchronization techniques, impairment estimation theory and techniques, and interference alignment techniques. In this thesis, it firstly present a dual link algorithm to align and manage the interference of multiple-input and multiple-output (MIMO) networks. A field-programmable gate array (FPGA) prototype is designed for software defined radio (SDR) platforms. As one of the key components, a hardware efficient architecture is proposed for the implementation of singular value decomposition (SVD). Secondly, it proposes a maximum-likelihood (ML) based synchronization approach for carrier frequency synchronization for MIMO systems. The algorithm is also implemented on FPGA for real-time performance evaluation. Finally, as an exemplary study of machine learning techniques for wireless communications, a neural network (NN) based estimator is proposed to perform coarse frequency offset estimations for MIMO systems. The proposed NN based estimator can accommodate various channel models and the results show promising performance in terms of accuracy and estimation range. In summary, this thesis provides a comprehensive study on interference alignment, carrier synchronization, and impairment estimation using different approaches. Efficient hardware implementations for the key algorithms are also presented.

We describe a set of fundamental contributions to the design, analysis and implementation of distributed MIMO techniques in wireless networks. The main idea behind distributed MIMO is to organize groups of wireless transmitters and receivers into distributed antenna arrays to cooperatively achieve beamforming and spatial multiplexing gains in ad-hoc wireless networks. This technique promises orders-of-magnitude increases in wireless data rates, however it presupposes very stringent timing, carrier frequency and phase synchronization of the RF signals between the cooperating nodes in the array. Specifically in this dissertation, we consider a sub-class of distributed MIMO systems called distributed MISO systems. In other words, we focus on distributed transmit arrays, wherein a group of N transmitters organize themselves into a virtual antenna array (VAA) to talk to a single-antenna receiver. While distributed MIMO involves virtual arrays on both transmit and receive ends, transmit arrays require real-time coordination, and therefore present unique challenges as compared to receive arrays. We explore two specific MISO techniques: i) distributed beamforming and ii) distributed nullforming in this work. Beamforming involves focusing transmitted energy selectively in the direction of an intended receiver, and nullforming involves forming a "null" i.e. having the transmissions of the different array nodes cancel each other completely at a desired location. Beamforming has the potential of substantially increasing the energy efficiency of wireless communications, while nullforming allows multiple nodes to communicate simultaneously over the same frequency band by carefully canceling the resulting interference. Beamforming and nullforming can also be thought of as basic building blocks for more sophisticated MIMO techniques. In this work, we present a set of frequency synchronization and phase control algorithms to establish and maintain a VAA for distributed beamforming and nullforming. For frequency-locking, we propose a novel distributed consensus-based algorithm. For a VAA with two nodes, we show that our algorithm achieves frequency lock globally and exponentially with a residual phase disparity that is either 0 or pi. This is in contrast to PLL-like algorithms that only achieve lock locally. Next, we describe in detail the key ideas behind an implementation of distributed beamforming on a GNU-radio/USRP based software-defined radio (SDR) platform. We introduce a novel DSP-centric Master-Slave (MS) architecture that enables the use of low-rate DSP algorithms for synchronization of high frequency RF signals. We describe the evolution of our implementation from initially using analog signaling with Costas loops/PLLs for frequency offset estimation and compensation, to a digital signaling scheme that uses extended Kalman filters (EKF) to track and compensate for frequency offsets. The EKF-based frequency locking scheme is well-suited for packet wireless networks, e.g., WiFi, ZigBee. We next consider phase control algorithms for forming beams and nulls with a VAA. In our experimental implementation, we have used several variants of classical 1-bit feedback control algorithm during different stages of our work. 1-bit feedback algorithm is an iterative gradient-ascent algorithm which causes the VAA nodes' signals to add constructively at a designated receiver. We present results to demonstrate the gains in the RSS at the receiver due to beamforming in the real-time settings. We also describe a distributed gradient-descent based algorithm that causes VAA nodes to achieve a null at a designated null target. We provide detailed convergence analysis for the proposed null-steering algorithm. This analysis shows that the algorithm always achieves practical null at null-target; moreover, all the spurious stationary points are locally unstable. Finally, we conclude by providing suggestions for future work.

CoordenaÃÃo de AperfeÃoamento de Pessoal de NÃvel Superior / This work presents a new structure for an all-digital BPSK demodulator developed for space communications that performs simultaneously the sampling and down-conversion of the the intermediate frequency signal to the baseband signal. The most important aspect of this work is the design of a new interpolator to retrieve lost samples during the down conversion process, and also to simplify the demodulator implementation. This interpolator correlates the samples of the output signal in such way that it was necessary to design a optimum filter appropriate to process the samples corrupted by gaussian and colored noise. The effects of the new interpolation at the noise are analyzed as well as the way it affects the whole demodulator performance. After performing the optimum filtering, the phase and symbol offsets are estimated and corrected. For the phase, for example, it was used a DPLL (Digital Phase Locked Loop), a digital variation of the PLL, a well known structure and largely utilized in analogical electronics. The DPLL is a closed-loop structure that estimates and corrects the values for the angular which corresponds to the phase deviation caused by the offset between the transmitter and receiver oscilators. For the timing parameter estimation, it was used the Oerder&Meyer estimator that is the digital equivalent to the well known square timing recovery structure. After that, the correction is performed by an interpolation operation over the samples of the received signal, where a filter, named Farrow filter, is applied to these samples, calculating the new samples of that signal at the corrected time instants. This system is mathematically described, all the signals expressions of every stage of the demodulator are analyzed, including the noise statistics. Some computational simulation results are shown and the performance degradation is discussed. / Este trabalho apresenta um modelo de demodulador que realiza simultaneamente a conversÃo analÃgico-digital e a conversÃo em frequÃncia por amostragem em banda passante de um sinal com modulaÃÃo BPSK (Binary Phase Shift Keying) para aplicaÃÃo em enlaces espaciais. O aspecto mais importante do trabalho foi o desenvolvimento de uma nova operaÃÃo de interpolaÃÃo para recuperaÃÃo das amostras perdidas na conversÃo de frequÃncia e que simplifica a implementaÃÃo do demodulador. O interpolador correlaciona as amostras do sinal de forma que torna-se necessÃrio o projeto de um filtro Ãtimo apropriado para processar as amostras corrompidas e mitigar os efeitos do ruÃdo gaussiano e colorido. Os efeitos deste novo interpolador no ruÃdo sÃo analisados, assim como a forma em que ele afeta a performance do sistema. ApÃs a filtragem Ãtima, segue a correÃÃo dos erros de sincronismo de atraso de simbolo e de fase. Para a recuperaÃÃo do sincronismo de fase foi utilizado um DPLL (Digital Phase Locked Loop), uma variante digital de uma estrutura bastante conhecida e utilizada em eletrÃnica analÃgica. O DPLL à uma estrutura em malha fechada que estima e corrige os valores do desvio angular das amostras, o que corresponde ao devio provocado pela diferenÃa de fase entre os osciladores do transmissor e do receptor. Para a recuperaÃÃo do atraso de sÃmbolo foi utilizada, para estimaÃÃo do tempo de atraso, o estimador de Oerder&Meyer que à o equivalente digital da conhecida recuperaÃÃo de temporizaÃÃo em tempo contÃnuo com a lei quadrÃtica. ApÃs a estimaÃÃo ser realizada, à feita a correÃÃo deste atraso nas amostras do sinal recebido atravÃs de uma operaÃÃo de interpolaÃÃo, onde novos valores do sinal sÃo calculados para os instantes de tempo corrigidos. Essa operaÃÃo à realizada por um filtro interpolador, uma estrutura especial conhecida como estrutura de Farrow. O sistema proposto foi descrito matematicamente, sendo analisadas as expressÃes dos sinais nos diferentes estÃgios do conversor, bem como as estatÃsticas dos sinais de ruÃdo. Apresentam-se os resultados da simulaÃÃo computacional nos quais se avalia a perda no desempenho do demodulador, analisando suas causas.

The thesis deals with the analysis and the reception of the freely available signals of the navigation satellites in the L1 and E1 bands of the GPS and Galileo systems. The described signal reception sections include the process of the acquisition, the carrier frequency and phase synchronization and tracking, the spreading code phase tracking, the signal demodulation and the channel decoding. The simulation of the entire receiver is performed in MATLAB. The deeply analyzed signal reception component is the one responsible for the carrier phase and frequency synchronization and tracking. In that case, more methods and their comparison are usually listed. The signal reception component, which is responsible for the carrier phase and frequency tracking and the spreading code phase tracking, is also implemented in FPGA.

No description available.

This thesis deals with computer simulation of the communication chain using the OFDM modulation. In the beginning of my thesis there is a brief description of digital modulations, especially OFDM. The model of the transmitter, radio channel and receiver, including a simple timing and frequency synchronization and equalization is designed and simulated in the Matlab environment. There is a designed communication system implemented into USRP development board in the Simulink environment. The development board could not work simultaneously as a transmitter and as a receiver. Function of the transmitter was verified by measuring on spectrum analyzer. Testing OFDM signal using the arbitrary waveform generator CompuGen 4302 was generated for the verification of the function of the receiver. Testing signal was received and demodulated on the development board which works as a receiver.

The onset of quantum computing threatens commonly used schemes for information secrecy across wireless communication channels, particularly key-based data-level encryption. This calls for secrecy schemes that can provide everlasting secrecy resistant to increased computational power of an adversary. One novel physical layer scheme proposes that an intended receiver capable of performing analog cancellation of a known key-based interference would hold a significant advantage in recovering small underlying messages versus an eavesdropper performing cancellation after analog-to-digital conversion. This advantage holds even in the event that an eavesdropper can recover and use the original key in their digital cancellation. Inspired by this scheme, a flexible software-defined radio receiver design capable of maintaining analog cancellation ratios consistently over 40 dB, reaching up to and over 50 dB, is implemented in this thesis. Maintaining this analog cancellation requires very precise time-frequency synchronization along with accurate modeling and simulation of the channel effects on the interference. The key sources of synchronization error preventing this test bed from achieving and maintaining perfect interference cancellation, sub-sample period timing errors and limited radio frequency stability, are explored for possible improvements. To further prove robustness of the implemented secrecy scheme, the testbed is shown to operate with both phase-shift keying and frequency-modulated waveforms. Differences in the synchronization algorithm used for the two waveforms are highlighted. Interference cancellation performance is measured for increasing interference bandwidth and shown to decrease with such. The implications this testbed has on security approaches based on intentional interference employed to confuse eavesdroppers is approached from the framework proposed in the motivating everlasting secrecy scheme. Using analog cancellation levels from the hardware testbed, it is calculated that secrecy rates up to 2.3 bits/symbol are gained by receivers (intended or not) performing interference cancellation in analog rather than on a digital signal processor. Inspired by the positive gains in secrecy over systems not performing analog cancellation prior to signal reception, a novel secrecy scheme that focuses on the advantage an analog canceller holds in receiver amplifier compression is proposed here. The adversary amplifier is assumed to perform linear cancellation after the interference has passed through their nonlinear amplifier. This is accomplished by deriving the distribution of the interference residual after undergoing an inverse tangent transfer function and perfect linear cancellation. Parameters of this scheme are fit for the radios and cancellation ratios observed in the testbed, resulting in a secrecy gain of 0.95 bits/symbol. The model shows that larger message powers can still be kept secure for the achieved levels of cancellation, thus providing an even greater secrecy gain with increased message transmission power.

No description available.

Approved for public release, distribution is unlimited / Synchronization of orthogonal frequency-division multiplexed (OFDM) signals is significantly more difficult than synchronization of a single-carrier system. The recently approved IEEE Standard 802.11g specifies a packet-based OFDM system that provides a basis for the discussion of OFDM synchronization in a packet-based environment. Algorithms that synchronize the receiver carrier demodulation frequency and phase, the data frame, the OFDM symbol timing, and the data symbol timing are discussed and analyzed in an AWGN channel. System View simulation is used to implement the frame and carrier frequency synchronization algorithms, where the performance of these algorithms is analyzed and they are shown to be useful detection algorithms for Standard 802.11g signal reception. / Lieutenant Commander, United States Navy