O uso de comportas ou válvulas em condutos para efetuar o controle de fluxo em estruturas hidráulicas é bastante usual. Uma das aplicações deste tipo de dispositivo de controle de vazões é para fazer o enchimento e esvaziamento de câmaras de eclusas de navegação. Entretanto, a sua aplicação deve ser feita com cuidado em função da complexidade do escoamento, o qual pode apresentar grandes variações de velocidade e pressões junto à base e ao teto da galeria a jusante da comporta. O gradiente de pressão pode variar no tempo e no espaço podendo vir a ocasionar danos por erosão (desgaste) e/ou cavitação. Assim, torna-se fundamental obter critérios para a estimativa de previsão do valor dessas pressões para, então, poder inferir a possibilidade de danos junto à superfície sólida, permitindo que se determinem as condições críticas de operação que devem ser evitadas ou minimizadas durante as operações de esvaziamento ou de enchimento da câmara da eclusa. Esta pesquisa procura apresentar o estado da arte em relação à distribuição longitudinal das pressões a jusante de comportas tipo segmento invertida e os resultados e análises desenvolvidas em um modelo físico de laboratório. Estes estudos permitiram compreender o comportamento das pressões e verificar se o método sugerido por Batistton (2013), para estimar os valores da distribuição longitudinal das pressões junto à base e o teto da galeria a jusante da comporta, podem ser aplicados para todas as aberturas da comporta. As análises desenvolvidas consentiram observar que as situações críticas ocorrem para aberturas entre 40% e 60% e que as pressões mínimas ocorrem em uma distância adimensional ( ) em torno de 2 a 6. Destaca-se que todos os resultados apresentados na presente pesquisa são válidos para coeficiente de pressão média para abertura de 100% da comporta, CP* 100%, entre 2,8 e 65,9. / The practice of using of gates or valves in conduits to control the flow in hydraulic structures is a common one. One of the applications for this type of device is the flow control for filling and emptying navigation locks. However proper care should be taken when applying those due to the inherit complexity of the flows, which can present significant pressure and velocity fluctuation in the regions next to the floor and ceiling downstream of these gates. Fluctuations in the pressure gradients can cause damage by erosion and/or cavitation. For these reasons its of interest the understanding of criteria for the estimative of those pressures to then infer the possibility of damage in the solid boundaries, allowing the determination of critical operation conditions which to avoid or minimize during the emptying and filling operations of lock chambers. This research aims to present the state of art regarding the longitudinal pressure distribution downstream of inverted tainter gates and the results of experimental data obtained in a physical model. These study allowed to comprehend the behavior of the aforementioned pressures and to verify the method proposed by Battiston (2013) to estimate longitudinal pressure distributions next to the ceiling and floor of those types of structures. The developed analysis showed that the critical conditions occur in between the 40% and 60% opening and that the minimum pressures occur in between a dimensionless distance (Ladm) 2 and 6. The presented results are valid for a mean pressure coefficient of 100% gate opening, CP*100%, between 2,81 and 65,9.

O uso de comportas ou válvulas em condutos para efetuar o controle de fluxo em estruturas hidráulicas é bastante usual. Uma das aplicações deste tipo de dispositivo de controle de vazões é para fazer o enchimento e esvaziamento de câmaras de eclusas de navegação. Entretanto, a sua aplicação deve ser feita com cuidado em função da complexidade do escoamento, o qual pode apresentar grandes variações de velocidade e pressões junto à base e ao teto da galeria a jusante da comporta. O gradiente de pressão pode variar no tempo e no espaço podendo vir a ocasionar danos por erosão (desgaste) e/ou cavitação. Assim, torna-se fundamental obter critérios para a estimativa de previsão do valor dessas pressões para, então, poder inferir a possibilidade de danos junto à superfície sólida, permitindo que se determinem as condições críticas de operação que devem ser evitadas ou minimizadas durante as operações de esvaziamento ou de enchimento da câmara da eclusa. Esta pesquisa procura apresentar o estado da arte em relação à distribuição longitudinal das pressões a jusante de comportas tipo segmento invertida e os resultados e análises desenvolvidas em um modelo físico de laboratório. Estes estudos permitiram compreender o comportamento das pressões e verificar se o método sugerido por Batistton (2013), para estimar os valores da distribuição longitudinal das pressões junto à base e o teto da galeria a jusante da comporta, podem ser aplicados para todas as aberturas da comporta. As análises desenvolvidas consentiram observar que as situações críticas ocorrem para aberturas entre 40% e 60% e que as pressões mínimas ocorrem em uma distância adimensional ( ) em torno de 2 a 6. Destaca-se que todos os resultados apresentados na presente pesquisa são válidos para coeficiente de pressão média para abertura de 100% da comporta, CP* 100%, entre 2,8 e 65,9. / The practice of using of gates or valves in conduits to control the flow in hydraulic structures is a common one. One of the applications for this type of device is the flow control for filling and emptying navigation locks. However proper care should be taken when applying those due to the inherit complexity of the flows, which can present significant pressure and velocity fluctuation in the regions next to the floor and ceiling downstream of these gates. Fluctuations in the pressure gradients can cause damage by erosion and/or cavitation. For these reasons its of interest the understanding of criteria for the estimative of those pressures to then infer the possibility of damage in the solid boundaries, allowing the determination of critical operation conditions which to avoid or minimize during the emptying and filling operations of lock chambers. This research aims to present the state of art regarding the longitudinal pressure distribution downstream of inverted tainter gates and the results of experimental data obtained in a physical model. These study allowed to comprehend the behavior of the aforementioned pressures and to verify the method proposed by Battiston (2013) to estimate longitudinal pressure distributions next to the ceiling and floor of those types of structures. The developed analysis showed that the critical conditions occur in between the 40% and 60% opening and that the minimum pressures occur in between a dimensionless distance (Ladm) 2 and 6. The presented results are valid for a mean pressure coefficient of 100% gate opening, CP*100%, between 2,81 and 65,9.

O uso de comportas ou válvulas em condutos para efetuar o controle de fluxo em estruturas hidráulicas é bastante usual. Uma das aplicações deste tipo de dispositivo de controle de vazões é para fazer o enchimento e esvaziamento de câmaras de eclusas de navegação. Entretanto, a sua aplicação deve ser feita com cuidado em função da complexidade do escoamento, o qual pode apresentar grandes variações de velocidade e pressões junto à base e ao teto da galeria a jusante da comporta. O gradiente de pressão pode variar no tempo e no espaço podendo vir a ocasionar danos por erosão (desgaste) e/ou cavitação. Assim, torna-se fundamental obter critérios para a estimativa de previsão do valor dessas pressões para, então, poder inferir a possibilidade de danos junto à superfície sólida, permitindo que se determinem as condições críticas de operação que devem ser evitadas ou minimizadas durante as operações de esvaziamento ou de enchimento da câmara da eclusa. Esta pesquisa procura apresentar o estado da arte em relação à distribuição longitudinal das pressões a jusante de comportas tipo segmento invertida e os resultados e análises desenvolvidas em um modelo físico de laboratório. Estes estudos permitiram compreender o comportamento das pressões e verificar se o método sugerido por Batistton (2013), para estimar os valores da distribuição longitudinal das pressões junto à base e o teto da galeria a jusante da comporta, podem ser aplicados para todas as aberturas da comporta. As análises desenvolvidas consentiram observar que as situações críticas ocorrem para aberturas entre 40% e 60% e que as pressões mínimas ocorrem em uma distância adimensional ( ) em torno de 2 a 6. Destaca-se que todos os resultados apresentados na presente pesquisa são válidos para coeficiente de pressão média para abertura de 100% da comporta, CP* 100%, entre 2,8 e 65,9. / The practice of using of gates or valves in conduits to control the flow in hydraulic structures is a common one. One of the applications for this type of device is the flow control for filling and emptying navigation locks. However proper care should be taken when applying those due to the inherit complexity of the flows, which can present significant pressure and velocity fluctuation in the regions next to the floor and ceiling downstream of these gates. Fluctuations in the pressure gradients can cause damage by erosion and/or cavitation. For these reasons its of interest the understanding of criteria for the estimative of those pressures to then infer the possibility of damage in the solid boundaries, allowing the determination of critical operation conditions which to avoid or minimize during the emptying and filling operations of lock chambers. This research aims to present the state of art regarding the longitudinal pressure distribution downstream of inverted tainter gates and the results of experimental data obtained in a physical model. These study allowed to comprehend the behavior of the aforementioned pressures and to verify the method proposed by Battiston (2013) to estimate longitudinal pressure distributions next to the ceiling and floor of those types of structures. The developed analysis showed that the critical conditions occur in between the 40% and 60% opening and that the minimum pressures occur in between a dimensionless distance (Ladm) 2 and 6. The presented results are valid for a mean pressure coefficient of 100% gate opening, CP*100%, between 2,81 and 65,9.

Submitted by Amanda Silva (amanda.osilva2@ufpe.br) on 2015-03-03T13:37:46Z No. of bitstreams: 2 Dissertacao Igor Fagner Vieira.pdf: 11971580 bytes, checksum: 9b20669e6b9542d3990f183c304ff233 (MD5) license_rdf: 1232 bytes, checksum: 66e71c371cc565284e70f40736c94386 (MD5) / Made available in DSpace on 2015-03-03T13:37:46Z (GMT). No. of bitstreams: 2 Dissertacao Igor Fagner Vieira.pdf: 11971580 bytes, checksum: 9b20669e6b9542d3990f183c304ff233 (MD5) license_rdf: 1232 bytes, checksum: 66e71c371cc565284e70f40736c94386 (MD5) Previous issue date: 2013 / CRCN-NE,CNEN e FACEPE / Há uma tendência cada vez mais crescente na comunidade cientifica, ou mesmo dentro das grandes empresas da área médica, de utilizar códigos de transporte das radiações para validar resultados experimentais ou mesmo para projetar novos experimentos e/ou equipamentos. Neste trabalho, um método para modelagem de tomógrafo por emissão de pósitrons utilizando o GATE (Geant4 Application for Tomographic Emission) foi proposto e inicialmente validado. O GATE é uma plataforma internacionalmente reconhecida e utilizada para desenvolvimento de Modelos Computacionais de Exposição (MCE) no contexto da Medicina Nuclear, embora atualmente hajam módulos dedicados para aplicações em Radioterapia e Tomografia Computadorizada (TC). O GATE usa métodos Monte Carlo (MC) e tem uma linguagem de script própria. A escrita dos scripts para simulação de um PET scanner no GATE envolve um conjunto de passos interligados, sendo a acurácia da simulação dependente do arranjo correto das geometrias envolvidas, já que os processos físicos dependem destas, bem como da modelagem da eletrônica dos detectores no módulo Digitizer, por exemplo. A realização manual desse setup pode ser fonte de erros, sobretudo para usuários que não tenham experiência alguma no campo das simulações ou familiaridade prévia com uma linguagem de programação, considerando também o fato de todo este processo de modelagem no GATE ainda permanecer vinculado ao terminal do LINUX/UNIX, um ambiente familiar apenas para poucos. Isso se torna um obstáculo para iniciantes e inviabiliza o uso do GATE por uma gama maior de usuários, interessados em otimizar seus experimentos e/ou protocolos clínicos por meio de um modo mais acessível, rápido e amigável. O objetivo deste trabalho consiste, portanto, em desenvolver um software amigável para modelagens de Tomógrafos por Emissão de Pósitrons, chamado GUIGATE (Graphical User Interface for GATE), com módulos específicos e dedicados a controle de qualidade em PET scanners. Os resultados obtidos exibem os recursos disponíveis no GUIGATE, presentes em um conjunto de janelas que permitem ao usuário criar seus arquivos de entrada (os inputs), executar e visualizar em tempo real o seu modelo, bem como analisar seus arquivo de saída (os outputs) em um único ambiente, viabilizando assim de modo intuitivo o acesso a toda a arquitetura de simulação do GATE e ao analisador de dados do CERN, o ROOT.

Les systèmes de communications sans fil n'ont cessé d'évoluer ces dernières années, poussés par de fortes demandes du marché en systèmes toujours plus autonomes et performants. Ainsi, de nouvelles contraintes de conception sont apparues de manière à mieux prendre en compte les aspects énergétiques et ainsi améliorer la durée de vie des batteries et des circuits. Actuellement, les systèmes de communications numériques sans fil consomment d'importantes quantités d'énergie. D'autre part, la complexité des systèmes croît de génération en génération afin de satisfaire toujours plus d'utilisateurs avec un haut niveau de performances. Dans ce contexte à fortes contraintes, les circuits de type FPGA apparaissent comme une technologie attractive, pouvant supporter des circuits numériques complexes grâce à leur grand nombre de ressources. Pour pouvoir concevoir les futurs systèmes de communications numériques sans fil sur ce type de circuit, les concepteurs de tels systèmes doivent pouvoir estimer la consommation et les performances au plus tôt dans la phase de conception. De cette façon, ils pourront explorer l'espace de conception et effectuer des choix d'implémentation afin d'optimiser leurs systèmes. Durant cette thèse, une méthodologie a été proposée dont les objectifs sont d'estimer rapidement et à haut niveau la consommation de leurs circuits implantés sur FPGA ainsi que leurs performances, d'explorer l'espace de conception, de comparer efficacement plusieurs systèmes entre eux, tout en assurant une bonne précision de l'estimation. La méthodologie repose sur une phase de caractérisation de composants IP matériels ainsi que de leur modélisation en Systeme. Dans un second temps, une représentation haut-niveau du système entier est réalisée à partir de la librairie des modèles Systeme de chaque IP. A travers des simulations haut-niveau, les utilisateurs peuvent tester rapidement de multiples configurations de leur système. Un des caractères innovants de l'approche repose sur l'utilisation de signaux clés qui permettent de tenir compte des comportements dynamiques des composants IP, c-à-d leur temps d'activité (actif/inactif), au sein du système et ainsi obtenir des estimations précises. Les nombreux gains de la méthodologie ont été démontrés à travers plusieurs exemples de systèmes de communications numériques sans fil comme une chaîne de traitement en bande de base de type SISO-OFDM générique, des émetteurs LTE etc. Pour conclure, les limitations ont été adressées et des solutions d'optimisation ont pu être envisagées puis mises en place. / Wireless communication systems are still evolving since the last decades, driven by the growing demand of the electronic market for energy efficient and high performance devices. Thereby, new design constraints have appeared that aim at taking into account power consumption in order to improve battery-life of circuits. Current wireless communication systems commonly dissipate a lot of power. On the other hand, the complexity of such systems keeps on increasing through the generations to always satisfy more users at a high degree of performance. In this highly constrained context, FPGA devices seem to be an attractive technology, able to support complex systems thanks to their important number of resources. According to the FPGA nature, designers need to estimate the power consumption and the performance of their wireless communication systems as soon as possible in the design flow. In this way, they will be able to perform efficient design space exploration and make decisive implementation and optimization choices. Throughout this thesis, a power estimation methodology for hardware-focused FPGA device is described and aims at making design space exploration a lot easier, providing early and fast power and performance estimation at high-level. It also proposes an efficient way to efficiently compare several systems. The methodology is effective through an lP characterisation step and the development of their SystemC models. Then, a high level description of the entire system is realized from the SystemC models that have been previously developed. High-level simulations enable to check the functionality and evaluate the power and performance of the system. One of the contributions consists in monitoring the JP time-activities during the simulation. We show that this has an important impact on both power and performances. The effectiveness of the methodology has been demonstrated throughout several baseband processing chains of the wireless communication domain such as a SISO-OFDM generic chain, LTE transmitters etc. To conclude, the main limitations of the proposed methodology have been investigated and addressed.

Compact Models are the physically based accurate mathematical description of the cir-cuit elements, which are computationally efficient enough to be incorporated in circuit simulators so that the outcome becomes useful for the circuit designers. As the multi-gate MOSFETs have appeared as replacements for bulk-MOSFETs in sub-32nm technology nodes, efficient compact models for these new transistors are required for their successful utilization in integrated circuits. Existing compact models for common double-gate (CDG) MOSFETs are based on the fundamental assumption of having symmetric gate oxide thickness. In this work we explore the possibility of developing models without this approximation, while preserving the computational efficiency at the same level. Such effort aims to generalize the compact model and also to capture the oxide thickness asymmetry effect, which might prevail in practical devices due to process uncertainties and thus affects the device performance significantly. However solution to this modeling problem is nontrivial due to the bias-dependent asym-metric nature of the electrostatic. Using the single implicit equation based Poisson so-lution and the unique quasi-linear relationship between the surface potentials, previous researchers of our laboratory have reported the core model for such asymmetric CDG MOSFET. In this work effort has been put to include Non-Quasistatic (NQS) effects, different small-geometry effects, and noise model to this core, so that the model becomes suitable for practical applications. It is demonstrated that the quasi-linear relationship between the surface potentials remains preserved under NQS condition, in the presence of all small geometry effects. This property of the device along with some other new techniques are used to develop the model while keeping the mathematical complexity at the same level of the models reported for the symmetric devices. Proposed model is verified against TCAD simulation for various device geometries and successfully imple-mented in professional circuit simulator. The model passes the source/drain symmetry test and good convergence is observed during standard circuit simulations.

Climate change is a global problem that is at least partially caused by human induced greenhouse gas emissions. Various initiatives were developed in the 1990’s to incentivise greenhouse gas emission reductions below legal limits. One of these systems is the Kyoto Protocol’s Clean Development Mechanism (CDM). In these incentive schemes parties can sell (the Seller) their greenhouse gas emission reductions to other parties (the Buyer) who need to offset their emissions. Emission reduction incentivised projects have technical aspects, financial aspects and regulatory requirements. The complexity of emission reduction schemes are further increased due to the levels of scrutiny and diverse sources of scrutiny that a project undergoes. As a developing country South Africa (SA) has a lot to gain by the successful implementation of CDM projects. Unfortunately very few successful CDM projects exist in South Africa. It was then the aim of this research to explore why there are so few projects and what are the current CDM project management approaches followed for CDM projects in SA? During the investigation aspects of the project management landscape of SA CDM projects were structured by means of a stage/phase and gate approach. This was done to aid in addressing the specific requirements of CDM projects and to combine this with the limited real world experience of successful CDM projects in SA. A stage/phase-gate model was developed because of the model’s ability to manage risk per stage/phase and overall risks, as well as the ability of these models to assist in portfolio management. Various research methods were used to develop the final proposed stage/phase and gate project management model (Model β). These methods included over and above literature reviews: <ul><li> Two rounds of questionnaires to develop the model; </li><li> Interviews with individual experts through identified cases to validate the first version of the model; and </li><li> Interaction with the South African Clean Development Industry Association to validate the second version of the model. </li></ul> Model β should not be seen as a stationary model. The model should rather be adapted by each emission reduction project developer to suit the developer’s company specific requirements. Furthermore the evolving regulatory environment of emission reduction systems will lead to the continued adapting and updating of Model β. The model could then be useful for: <ul><li> Project developers to plan and execute their projects; and </li><li> Buyers or Investors in projects as to quickly ascertain current project status and progression. </li></ul> It is envisaged that applying Model β, or a derivative, will: <ul><li> Manage risk due to increased project management through a stage/phase and gate approach; </li><li> Decrease project development time and ensure all required outputs are achieved quicker; and </li><li> Due to decreasing development time, costs could be managed better. </li></ul> / Thesis (PhD)--University of Pretoria, 2011. / Graduate School of Technology Management (GSTM) / unrestricted

FPGA clock frequencies are slow enough that only a fraction of the interconnect’s bandwidth is used. By exploiting this bandwidth, the transfer of large amounts of data can be greatly accelerated. Alternatively, it may also be possible to save area on fixed-bandwidth links by using on-chip serial signaling. For datapath-intensive designs which operate on words instead of bits, this can reduce wiring congestion as well. This thesis proposes relatively simple circuit-level modifications to FPGA interconnect to enable high-bandwidth communication. High-level area estimates indicate a potential interconnect area savings of 10 to 60% when serial links are used. Two interconnect pipelining techniques, wave pipelining and surfing, are adapted to FPGAs and compared against each other and against regular FPGA interconnect in terms of throughput, reliability, area, power, and latency. Source-synchronous signaling is used to achieve high data rates with simple receiver design. Statistical models for high-frequency power supply noise are developed and used to estimate the probability of error of wave pipelined and surfing links as a function of link length and operating speed. Surfing is generally found to be more reliable and less sensitive to noise than wave pipelining. Simulation results in a 65nm process demonstrate a throughput of 3Gbps per wire across a 50-stage, 25mm link. / Applied Science, Faculty of / Electrical and Computer Engineering, Department of / Graduate

The effectiveness of implementing field programmable gate arrays (FPGAs) in communication, military, space and high radiation environment applications, coupled with the increased accessibility of private individuals and researchers to launch satellites, has led to an increased interest in commercial off the shelf components. The metal oxide semiconductor (MOS) structures of FPGAs however, are sensitive to radiation effects which can lead to decreased reliability of the device. In order to successfully implement a FPGA based system in a radiation environment, such as on-board a satellite, the single event upset (SEU) and total ionizing dose (TID) characteristics of the device must first be established. This research experimentally determines a research procedure which could accurately determine the SEU cross sections and TID characteristics of various mitigation techniques as well as control circuits implemented in a ProASIC3 A3P1000 FPGA. To gain an understanding of the SEU effects of the implemented circuits, the test FPGA was irradiated by a 66MeV proton beam at the iTemba LABS facility. Through means of irradiation, the SEU cross section of various communication, motor control and mitigation schemes circuits, induced by high energy proton strikes was investigated. The implementation of a full global triple modular redundancy (TMR) and a combination of TMR and a AND-OR multiplexer filter was found to most effectively mitigate SEUs in comparison to the other techniques. When comparing the communication and motor control circuits, the high frequency I2C and SPI circuits experienced a higher number of upsets when compared to a low frequency servo motor control circuit. To gain a better understanding of the absorbed dose effects, experimental TID testing was conducted by irradiating the test FPGA with a cobalt-60 (Co-60) source. An accumulated absorbed dose resulted in the fluctuation of the device supply current and operating voltages as well as resulted in output errors. The TMR and TMR filtering combination mitigation techniques again were found to be the most effective methods of mitigation.

This research investigates three solutions to overcoming portability and scalability concerns in the Evolutionary Hardware (EHW) field. Firstly, the study explores if the V-FPGA—a new, portable Virtual-Reconfigurable-Circuit architecture—is a practical and viable evolution platform. Secondly, the research looks into two possible ways of making EHW systems more scalable: by optimising the system’s genetic algorithm; and by decomposing the solution circuit into smaller, evolvable sub-circuits or modules. GA optimisation is done is by: omitting a canonical GA’s crossover operator (i.e. by using an algorithm); applying evolution constraints; and optimising the fitness function. The circuit decomposition is done in order to demonstrate modular evolution. Three two-bit multiplier circuits and two sub-circuits of a simple, but real-world control circuit are evolved. The results show that the evolved multiplier circuits, when compared to a conventional multiplier, are either equal or more efficient. All the evolved circuits improve two of the four critical paths, and all are unique. Thus, it is experimentally shown that the V-FPGA is a viable hardware-platform on which hardware evolution can be implemented; and how hardware evolution is able to synthesise novel, optimised versions of conventional circuits. By comparing the and canonical GAs, the results verify that optimised GAs can find solutions quicker, and with fewer attempts. Part of the optimisation also includes a comprehensive critical-path analysis, where the findings show that the identification of dependent critical paths is vital in enhancing a GA’s efficiency. Finally, by demonstrating the modular evolution of a finite-state machine’s control circuit, it is found that although the control circuit as a whole makes use of more than double the available hardware resources on the V-FPGA and is therefore not evolvable, the evolution of each state’s sub-circuit is possible. Thus, modular evolution is shown to be a successful tool when dealing with scalability.