This thesis presents the low power design of a 916MHz Gilbert cell mixer and a Class-A power amplifier for the Bioluminescent Bioreporter Integrated Circuit (BBIC) transmitter. There has been increased use in the man-made sensors which can operate in environments unsuitable for humans and at locations remote from the observer. One such sensor is the bioluminescent bioreporter integrated circuit (BBIC). Bioluminescent bioreporters are the bacteria that are genetically engineered in order to achieve bioluminescence when in contact with the target substance. The BBIC has bioreporters placed on a single CMOS integrated circuit (IC) that detects the bioluminescence, performs the signal processing and finally transmits the senor data. The wireless transmission allows for remote sensing by eliminating the need of costly cabling to communicate with the sensor. The wireless data transmission is performed by the transmitter system. The digital data stream generated by the signal processing circuitry of the BBIC is ASK modulated for transmission. The direct conversion transmitter used in this design includes a PLL, Mixer and a Power amplifier. The PLL is used to generate a 916MHz frequency signal. This signal is mixed with the digital data signal generated from the signal processing circuitry of the BBIC. A double balanced Gilbert cell is used to perform the mixing operation. The mixer output is applied to a power amplifier which provides amplification of the RF output power. The Gilbert cell mixer and the power amplifier have been implemented in 90nm CMOS process available through MOSIS.

A pulse-width locked loop (PWLL) circuit is reported that compensates for process, voltage, and temperature (PVT) variations of a linear ramp generator within a 12-bit multi-channel Wilkinson (single-slope integrating) Analog-to-Digital (ADC). This PWLL was designed and fabricated in a 0.5-um Silicon Germanium (SiGe) BiCMOS process. The PWLL architecture that is comprised of a phase detector, a charge-pump, and a pulse width modulator (PWM), is discussed along with the design details of the primary blocks. Simulation and silicon measurement data are shown that demonstrate a large improvement in the accuracy of the PVT-compensated ADC over the uncompensated ADC.

No description available.

Currently, many machine vision, signal and image processing problems are solved on personal computers due to the low cost involved in these computers and the many excellent software tools that exist, such as MATLAB. However, computationally expensive tasks require the use of multi-processor computers that are expensive and difficult to use efficiently due to communications between the processors. In these cases, FPGAs (Field Programmable Gate Arrays) are the best choice but they are not as widely used because of lack of experience in using these devices, difficulties with algorithmic translation and immaturity of the design and implementation tools for FPGAs. Programming languages are always evolving and the programming languages for microprocessors have evolved significantly, from functional and procedural languages to object-oriented languages. Nowadays, a new paradigm called aspect-oriented software development (AOSD) is becoming more widespread. However, hardware programming languages have not evolved to the same extent as the software programming languages for microprocessors. They are still dominated by the technologies developed in 1980s, which have significant deficiencies described in this thesis. Recent advances in HDLs (Hardware Description Languages) have taken a conservative approach based on well-proven software techniques.

From mid-2000s, the realm of portable and embedded computing has expanded to include a wide variety of applications. Data mining is one of the many applications that are becoming common on these devices. Many of today’s data mining applications are compute and/or data intensive, requiring more processing power than ever before, thus speed performance is a major issue. In addition, embedded devices have stringent area and power requirements. At the same time manufacturing cost and time-to-market are decreasing rapidly. To satisfy the constraints associated with these devices, and also to improve the speed performance, it is imperative to incorporate some special-purpose hardware into embedded system design. In some cases, reconfigurable hardware support is desirable to provide the flexibility required in the ever-changing application environment. Our main objective is to provide chip-level and reconfigurable hardware support for data mining applications in portable, handheld, and embedded devices. We focus on the most widely used data mining tasks, clustering and classification. Our investigation on the hardware design and implementation of similarity computation (an important step in clustering/classification) illustrates that the chip-level hardware support for data mining operations is indeed a feasible and a worthwhile endeavour. Further performance gain is achieved with hardware optimizations such as parallel processing. To address the issue of limited hardware foot-print on portable and embedded devices, we investigate reconfigurable computing systems. We introduce dynamic reconfigurable hardware solutions for similarity computation using a multiplexer-based approach, and for principal component analysis (another important step in clustering/classification) using partial reconfiguration method. Experimental results are encouraging and show great potential in implementing data mining applications using reconfigurable platform. Finally, we formulate a design methodology for FPGA-based dynamic reconfigurable hardware, in order to select the most efficient FPGA-based reconfiguration method(s) for specific applications on portable and embedded devices. This design methodology can be generalized to other embedded applications and gives guidelines to the designer based on the computation model and characteristics of the application. / Graduate

No description available.

Zugl.: Saarbrücken, Univ., Diss., 2004

Thesis (M.S.)--Virginia Polytechnic Institute and State University, 1991. / Vita. Abstract. Includes bibliographical references (leaves 91-94). Also available via the Internet.

Stuttgart, Univ., Diss., 2007.

Thesis (M.S.)--Virginia Polytechnic Institute and State University, 1991. / Vita. Abstract. Includes bibliographical references (leaf 107). Also available via the Internet.